cstool: support riscv compressed instruction disassemble

[rrwhx]

The cstool does not support riscv compressed instruction mode. So the patch is used to add this function.

Signed-off-by: Xinyu Li lixinyu@loongson.cn

[aquynh]

Do you mean this mode is always on? Any sample input?

[rrwhx]

Yes, this mode is always on. RISC-V compressed instruction mode is a part of RV32/RV64/RV128, those 16-bit compressed instructions can be distinguished from normal 32-bit instructions. This figure from RISC-V manual can show that.
That is to say, lengths of instructions can be identified from the opcode, and length is encoded with the instruction itself.
Just set 32-bit mode or 64-bit mode, and the disassembler will handle the instruction length perfectly.

Example:
cs_open with CS_ARCH_RISCV, CS_MODE_RISCV64:

cstool -d riscv64 b19f
ERROR: invalid assembly code

cs_open with CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCVC:

cstool -d riscv64 b19f
0  b1 9f  c.addw       a5, a2
        ID: 97 (c.addw)
        op_count: 2
                operands[0].type: REG = a5
                operands[1].type: REG = a2

        Groups: hasStdExtC isrv64

Normal instruction with 32-bit length works unaffectedly.

cstool -d riscv64 1384811f
0  13 84 81 1f  addi   s0, gp, 0x1f8
        ID: 2 (addi)
        op_count: 3
                operands[0].type: REG = s0
                operands[1].type: REG = gp
                operands[2].type: IMM = 0x1f8

Actually, CS_MODE_RISCVC can be used as an enable, this determines whether the compressed instruction set is treated as an illegal instruction or decoded as 16-bit instructions.

Currently, RISC-V code is mixed with lengths of 16-bit and 32-bit, CS_MODE_RISCVC should be enabled usually.
This is code example from libc of riscv64-linux-gnu.

000000000002168c <strcmp>:
   2168c: 83 47 05 00   lbu a5, 0(a0)
   21690: 85 05         addi    a1, a1, 1
   21692: 05 05         addi    a0, a0, 1
   21694: 03 c7 f5 ff   lbu a4, -1(a1)
   21698: 91 c7         beqz    a5, 0x216a4 <strcmp+0x18>
   2169a: e3 89 e7 fe   beq a5, a4, 0x2168c <strcmp>
   2169e: 3b 85 e7 40   subw    a0, a5, a4
   216a2: 82 80         ret
   216a4: 3b 05 e0 40   negw    a0, a4
   216a8: 82 80         ret

[aquynh]

merged, thanks!