riscv64: Special-case f32const 0 and f64const 0
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This commit is inspired by discussion on bytecodealliance#8695 which made me remember the discussion around bytecodealliance#7162 historically. In lieu of a deeper fix for the issue of "why can't `iconst 0` use `(zero_reg)`" it's still possible to add special-cases to rules throughout the backend so this commit does that for generating zero-value floats.
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This commit is similar to bytecodealliance#8701 in that it adds a special case to `store` operations to use the `zero` register when applicable.
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This commit is similar to bytecodealliance#8701 in that it adds a special case to `store` operations to use the `zero` register when applicable.
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* riscv64: Optimize storing zero to memory by using `zero_reg` This commit is similar to #8701 in that it adds a special case to `store` operations to use the `zero` register when applicable. * Fix lowerings of `istore{8,16,32}` * Add test for compressed stores
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This commit is inspired by discussion on #8695 which made me remember the discussion around #7162 historically. In lieu of a deeper fix for the issue of "why can't
iconst 0use(zero_reg)" it's still possible to add special-cases to rules throughout the backend so this commit does that for generating zero-value floats.