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PCC: x64: insertlane instructions read only scalar-sized values. #8207

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merged 2 commits into from
Mar 21, 2024

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cfallin
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@cfallin cfallin commented Mar 21, 2024

@cfallin cfallin requested review from a team as code owners March 21, 2024 15:48
@cfallin cfallin requested review from fitzgen and removed request for a team March 21, 2024 15:48
@alexcrichton
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Mind adding more variants for loading floats, in addition to the variants for storing everything?

(module
  (memory 1)
  (func (param v128 i32) (result v128)
      local.get 0
      local.get 1
      f32.load
      f32x4.replace_lane 0)

  (func (param v128 i32) (result v128)
      local.get 0
      local.get 1
      f64.load
      f64x2.replace_lane 1)

  (func (param v128 i32) (result v128)
      local.get 0
      local.get 1
      f64.load
      f64x2.replace_lane 0)

  (func (param v128 i32)
      local.get 1
      local.get 0
      f64x2.extract_lane 1
      f64.store)

  (func (param v128 i32)
      local.get 1
      local.get 0
      f32x4.extract_lane 1
      f32.store)

  (func (param v128 i32)
      local.get 1
      local.get 0
      i8x16.extract_lane_s 1
      i32.store8)

  (func (param v128 i32)
      local.get 1
      local.get 0
      i16x8.extract_lane_s 1
      i32.store16)

  (func (param v128 i32)
      local.get 1
      local.get 0
      i32x4.extract_lane 1
      i32.store)

  (func (param v128 i32)
      local.get 1
      local.get 0
      i64x2.extract_lane 1
      i64.store)
)

@alexcrichton
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Also I'd recommend running the test with/without AVX to confirm that that all works too

@cfallin
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cfallin commented Mar 21, 2024

Sure, added additional cases, thanks! This surfaced another issue with the range-fact clamping on 128-bit values, now fixed.

The test cases already had distinct AVX and non-AVX variants; added your new cases to both.

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r=me with Alex's suggestion

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fitzgen commented Mar 21, 2024

race

@cfallin
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cfallin commented Mar 21, 2024

Yep, I imagine you'll want to review the new changes just pushed, sorry!

@fitzgen fitzgen enabled auto-merge March 21, 2024 16:41
@github-actions github-actions bot added cranelift Issues related to the Cranelift code generator cranelift:area:machinst Issues related to instruction selection and the new MachInst backend. cranelift:area:aarch64 Issues related to AArch64 backend. cranelift:area:x64 Issues related to x64 codegen labels Mar 21, 2024
@fitzgen fitzgen added this pull request to the merge queue Mar 21, 2024
@github-merge-queue github-merge-queue bot removed this pull request from the merge queue due to failed status checks Mar 21, 2024
Also fix `clamp_range` on greater-than-64-bit values: no range fact is
possible in this case (propagate `Option` a bit deeper to represent
this).

Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=67538.
@cfallin cfallin enabled auto-merge March 21, 2024 18:40
@cfallin cfallin added this pull request to the merge queue Mar 21, 2024
Merged via the queue into bytecodealliance:main with commit a79cf76 Mar 21, 2024
22 checks passed
@cfallin cfallin deleted the fix-pcc-insertlane branch March 21, 2024 19:27
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cranelift:area:aarch64 Issues related to AArch64 backend. cranelift:area:machinst Issues related to instruction selection and the new MachInst backend. cranelift:area:x64 Issues related to x64 codegen cranelift Issues related to the Cranelift code generator
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3 participants