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riscv64: Refactor and enable optimizing sign extensions #7121
riscv64: Refactor and enable optimizing sign extensions #7121
Commits on Oct 1, 2023
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riscv64: Refactor int-to-float emission
Use ISLE matching to generate different instructions rather than having a method deeper in the backend select which instruction to use. Additionally remove the usage of the `normalize_fcvt_to_int` helper.
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riscv64: Refactor and simplify
lower_bmask
Take a `Value` as input to simplify 128-bit handling and additionally simplify the rules a bit with other helpers.
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riscv64: Refactor
normalize_cmp_value
andtruthy_to_reg
Remove the normalization completely by folding it into callers and refactor `truthy_to_reg` to perform sign extension internally in addition to handling 128-vs-64
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riscv64: Remove 128-bit handling from extension helper
This is only needed in a small handful of spots which can pretty easily handle the sign extension on their own, and this further simplifies sign extension to purely dealing with a single register.
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riscv64: Remove destination type in extension
This is always `$I64`, so no need to pass it around.
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riscv64: Remove
ext_if_need
helperFold 128-bit handling into callers as necessary
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riscv64: Refactor
sext
to take aValue
This commit refactors the `sext` helper to take a single `Value` as an argument rather than an `XReg Type` combo. This will enable, in future commits, to pattern-match the structure of the input and skip the sign extension if possible. For example an `icmp` result is already sign-extended. This involved moving some `lower_*` declarations directly into `lower.isle`. Additionally a special-case of lowering `brif` was removed which caused regressions in generated code due to new `and` instructions being generated to sign-extend the result of an `icmp`. Once `zext` is also migrated to this pattern this regression should be fixed, so this should just be a temporary state of affairs.
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riscv64: Fold
lower_popcnt
intolower.isle
This slightly pessmizes codegen when the `zbb` extension isn't available due to a sign extension for smaller-than-64-bit types, but this is possible to fix in the future if necessary and helps simplify this in the meantime. Additionally this lifts the special cases for `has_zbb` directly into the lowering rule.
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This commit refactors the lowering rules for these two CLIF instructions to move the sext/zext operations to the top rather than having them buried in lowering rules. This additionally moves them to `lower.isle` instead of `inst.isle`. This did result in some minor duplication but overall feels a bit better due to them being less coupled now.
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riscv64: Move
gen_bswap
tolower.isle
Additionally shuffle rules around to remove the dependence on `zext` because when this zero-extension happens it's known that many of the extension-related optimizations are not applicable. This does pessimize code slightly but it's hopefully not too bad given the current size of the bswap lowering.
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riscv64: Change
zext
to taking aValue
This is similar to a prior commit for `sext` and will enable future optimizations to skip the zext entirely if the structure of the value allows.
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riscv64: Fold
extend
helper intozext
andsext
This commit folds the existing rules of the `extend` helper into the corresponding functions of `zext` and `sext`. They are the only callers of `extend` and this keeps the sign extension-related logic truly in one final resting place now at this point. A new matcher `val_already_extended` is additionally added to add more cases in a follow-up commit to enable skipping sign-extension operations based on the structure of the `Value` input.
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riscv64: Optimize some sign extensions
As the culmination of all prior commits, this commit adds a few cases where a sign extension is not necessary in the backend and can be skipped. For example extending a sign-extended value is not required because the backend always extends to the full register width. Additionally extending the result of an `icmp` is not necessary since that always produces a 0 or 1 value at the full register width.
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