cranelift: Add x < 0 -> x >>> bit_size(ty) - 1 lowering rule

[MaxGraey]

Feature

Simple optimization which rewrite x < 0 (icmp_imm slt x, 0) to x >>> bit_size(ty) - 1 (ushr_imm x, 31 | 63).

Benefit

x < 0 is pretty common operation. Although LLVM itself applies this rule, but some code generators / optimizers such as Binaryen (wasm-opt / wasm-pack use it) don't such peephole rewrites because replacing the constant 0 to 31 or 63 has a negative effect on entropy when compressing wasm module via gzip or brotli.

Besides, such optimization will improve cranelift IR itself, because it will remove the finalizing bint.i32 / bint.i64 after icmp. For ushr/ushr_imm it is not needed.

Implementation

• Add necessary rewrite for simple_opt before this line
• Add tests for filetests/simple_preopt/simplily32.clif and filetests/simple_preopt/simplily64.clif

Updated Implementation Plan

Write necessary rules on ISLE instead in simple_opt.rs

[bjorn3]

This wouldn't help on platforms without flag registers, right? Those have icmp and bint merged together already. If anything it would prevent icmp+brz/brnz fusion I think, even on platforms with flag registers.

[MaxGraey]

Hmm, so perhaps it's better to do on lower level (may be ISLE) for only specific platforms after icmp+brz/brnz fusion?

[bjorn3]

I think so.

[cfallin]

We can definitely incorporate this as a lowering rule case in the backends. The ISLE and lowering machinery is smart enough to do the right thing for the (brnz (icmp ...)) case and allow for a rule for (icmp (IntCC.NP) ...) when used directly to compute that value. cc @elliottt as he is in the middle of br+compare stuff in x86-64 right now...