winch aarch64 checked_uadd: use unsigned overflow condition

bytecodealliance · Sep 19, 2024 · 7eab647 · 7eab647
1 parent c83df7d
commit 7eab647
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Showing 3 changed files with 7 additions and 7 deletions.
diff --git a/tests/disas/winch/aarch64/load/dynamic_heap.wat b/tests/disas/winch/aarch64/load/dynamic_heap.wat
@@ -34,7 +34,7 @@
 ;;       ldur    x1, [x9, #0x68]
 ;;       mov     w2, w0
 ;;       add     x2, x2, #4
-;;       b.vs    #0x134
+;;       b.hs    #0x134
 ;;   3c: cmp     x2, x1, uxtx
 ;;       b.hi    #0x138
 ;;   44: ldur    x3, [x9, #0x60]
@@ -48,7 +48,7 @@
 ;;       ldur    x2, [x9, #0x68]
 ;;       mov     w3, w1
 ;;       add     x3, x3, #8
-;;       b.vs    #0x13c
+;;       b.hs    #0x13c
 ;;   74: cmp     x3, x2, uxtx
 ;;       b.hi    #0x140
 ;;   7c: ldur    x4, [x9, #0x60]
@@ -65,7 +65,7 @@
 ;;       mov     w16, #3
 ;;       movk    w16, #0x10, lsl #16
 ;;       add     x4, x4, x16, uxtx
-;;       b.vs    #0x144
+;;       b.hs    #0x144
 ;;   b8: cmp     x4, x3, uxtx
 ;;       b.hi    #0x148
 ;;   c0: ldur    x5, [x9, #0x60]

diff --git a/tests/disas/winch/aarch64/store/dynamic_heap.wat b/tests/disas/winch/aarch64/store/dynamic_heap.wat
@@ -37,7 +37,7 @@
 ;;       ldur    x2, [x9, #0x68]
 ;;       mov     w3, w1
 ;;       add     x3, x3, #4
-;;       b.vs    #0x108
+;;       b.hs    #0x108
 ;;   48: cmp     x3, x2, uxtx
 ;;       b.hi    #0x10c
 ;;   50: ldur    x4, [x9, #0x60]
@@ -52,7 +52,7 @@
 ;;       ldur    x2, [x9, #0x68]
 ;;       mov     w3, w1
 ;;       add     x3, x3, #8
-;;       b.vs    #0x110
+;;       b.hs    #0x110
 ;;   84: cmp     x3, x2, uxtx
 ;;       b.hi    #0x114
 ;;   8c: ldur    x4, [x9, #0x60]
@@ -70,7 +70,7 @@
 ;;       mov     w16, #3
 ;;       movk    w16, #0x10, lsl #16
 ;;       add     x3, x3, x16, uxtx
-;;       b.vs    #0x118
+;;       b.hs    #0x118
 ;;   cc: cmp     x3, x2, uxtx
 ;;       b.hi    #0x11c
 ;;   d4: ldur    x4, [x9, #0x60]

diff --git a/winch/codegen/src/isa/aarch64/masm.rs b/winch/codegen/src/isa/aarch64/masm.rs
@@ -259,7 +259,7 @@ impl Masm for MacroAssembler {
 
     fn checked_uadd(&mut self, dst: Reg, lhs: Reg, rhs: RegImm, size: OperandSize, trap: TrapCode) {
         self.add(dst, lhs, rhs, size);
-        self.asm.trapif(Cond::Vs, trap);
+        self.asm.trapif(Cond::Hs, trap);
     }
 
     fn sub(&mut self, dst: Reg, lhs: Reg, rhs: RegImm, size: OperandSize) {