0.2.1

0.2.1

0.2.0

0.2.0

0.1.0: Update to AWS 1.4.17 and Fletcher 0.0.18 (#55)

* Updated runtime to new API for AWS 1.4.17.

Copying data between host and card now uses burst library functions from Amazon.
These automatically issue multiple DMA transactions.
The code for splitting the transactions, and the use of multiple DMA queues, has been removed.

* Reverted back to using BAR1 (ocl AXI-Lite interface)

* Fixed wrong error message

* Added simulation version of the runtime using the C - SystemVerilog interface.

This is work-in-progess.
See https://github.com/aws/aws-fpga/blob/master/hdk/docs/RTL_Simulating_CL_Designs.md

* Changed platform name to match the library filename

* Added aws-fpga as submodule

* Moved runtimes into a subdir

* Removed most examples (stale)

* Updated skeleton and project generation script

* Fixed typo in path

* Fixed defining top-level module name

* Removed unneeded define

* Expanded sourceme to include sourcing aws-fpga setup scripts

* Removed questasim scripts (not supported)

* Fixed defining top-level module name part 2

* Changed aws-fpga submodule to a fork, for now.

We need the additional peek/poke functions for our cosimulation.

* Added the possibility to reference other source directories (e.g. fletcher/hardware dir)

* Updated Sum example

* Now referencing sourceme.sh in README

* submodule aws-fpga now using the branch where the needed changes live

* Fixed copy commands copied into encrypt.tcl

* Use https for submodules

* Using original aws-fpga instead of fork (PR was merged)

* Make vhdeps work in project gen script (and not fail silently) when its executable is not in PATH

* Updated runtime CMakeLists to reflect their new location

* Add env var to specify sim runtime build dir for linking

* TEMPORARILY use old ABI with extreme prejudice

* Clean up and revert 459eba55; just install the lib

* Make runtime header files public

* Cosimulation now works (if in an ugly way)

* Make cosim integration nicer #1

* Make cosim integration nicer #2

* Fix 4DDR skeleton cosimulation & runtime

* Assigning PCI device and vendor IDs

* Fixed shared object dependency in runtime build config

* Fix aws-fpga submodule

* Fix write response channel blocking bus

* Update to Fletcher 0.0.18

* Removed test circuitry from 4DDR, nr of DDRs now generic

* Fixed multi-driven nets

* Initializing DDR is no longer needed (test circuits have been removed)

* Connected DDR stat interfaces to the shell again

* Using DRAM DIMM C and D because B and C are on the same SLR

* Removed some nonsense

* Renamed files to prepare removing 1DDR vs 4DDR versions

* Removed 1DDR version.

The 4DDR version now by default operates with 1 DDR controller, but the others can be enabled by removing the defines in cl_fletcher_aws.sv

* Runtime now using DIMM C by default

* Fixes for new skeleton location

* Added early check for cosim cmdline args

* Wrote some open issues in the README

* Updated examples to latest skeleton

* Clean up runtime file structure

* Remove tidre example because it's out of date

* Remove broken symlinks

* Remove random sources.txt files

* Make projects moveable with only a single symlink

* Restructure and update README files

* Fix cosimulation

* Remove examples - was not much left of them

Co-authored-by: Joost Hoozemans <j.j.hoozemans@tudelft.nl>
Co-authored-by: Cloud User <centos@ip-172-31-44-76.eu-west-3.compute.internal>
Co-authored-by: Cloud User <centos@ip-172-31-93-146.ec2.internal>