Skip to content
View YqGe585's full-sized avatar
💭
I may be slow to respond.
💭
I may be slow to respond.

Highlights

  • Pro

Block or report YqGe585

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. Neural-Processing-Unit-on-FPGA Neural-Processing-Unit-on-FPGA Public

    Superscalar Out-of-Order NPU Design on FPGA

    Verilog 3

  2. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

    Forked from chipsalliance/Cores-VeeR-EH1

    VeeR EH1 core

    SystemVerilog

  3. cva6 cva6 Public

    Forked from openhwgroup/cva6

    The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

    Assembly

  4. openc910 openc910 Public

    Forked from XUANTIE-RV/openc910

    OpenXuantie - OpenC910 Core

    Verilog