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[Zero-Dim] support input 0D Tensor for some XPU kernel #47849

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merged 1 commit into from
Nov 15, 2022

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@zhwesky2010 zhwesky2010 commented Nov 10, 2022

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为部分XPU kernel支持0D Tensor输入

由于 xpu不支持输入shape为[]的0D,而shape为[]和[1]的计算逻辑是一致的,因此使用shape为[1]的1D方式在xpu API内部表达。不影响外部Tensor的计算结果和shape的准确性。

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paddle-bot bot commented Nov 10, 2022

你的PR提交成功,感谢你对开源项目的贡献!
请关注后续CI自动化测试结果,详情请参考Paddle-CI手册
Your PR has been submitted. Thanks for your contribution!
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@zhwesky2010 zhwesky2010 changed the title [Zero-Dim] support input 0D Tensor for xpu add/sub/mul/div kernel [Zero-Dim] support input 0D Tensor for some xpu kernel Nov 10, 2022
@zhwesky2010 zhwesky2010 force-pushed the 0d_xpu_add branch 6 times, most recently from fcfcf23 to 75ca6c4 Compare November 11, 2022 08:33
@zhwesky2010 zhwesky2010 changed the title [Zero-Dim] support input 0D Tensor for some xpu kernel [Zero-Dim] support input 0D Tensor for some XPU kernel Nov 14, 2022
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LGTM

@houj04 houj04 merged commit d4d3d7e into PaddlePaddle:develop Nov 15, 2022
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paddle-bot bot commented Nov 15, 2022

你的PR已合入Paddle库,请关注后续测试结果。
Your PR has been merged into the repository. An official integration test will be conducted later. Stay tuned.

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3 participants