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Integrate FPGA-accelerated PoW #50
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d8f0073
Begin at code of Lampa Lab
ajblane 2154f76
Implement related functions for using the accelerator
ajblane d2bf35d
Add the BUILD_FPGA_LAMPALAB option into Makefile
ajblane 6c3f646
Add the accelerator function into dcurl
ajblane c47bd82
Test FPGA PoW of Lampa Lab
ajblane 14dea4b
Fix the bug of returning local variable of function
ajblane aea24e3
Fix the bug by adding type translation
ajblane 01ab815
Typo for comments
ajblane 60503e9
Use clang-format for h files and c files
ajblane 98af4d4
Rename the functions but do it not well
ajblane 79ccfe3
Do not show print info when doing PoW
ajblane 269700f
Rewrite name scheme
ajblane a370a98
Add information of building FPGA accelerator to README
ajblane 48f419c
Use existing functions and remove useless files
ajblane 2eef531
Type consistency for all implemented PoW functions
ajblane a12c471
Correct spelling errors
ajblane 71a016f
Skip kernel message
ajblane 1e83b29
Make them with static
ajblane 38b346f
Drop the useless message
ajblane 5674857
Typo for the comment
ajblane 1da48e7
Rewrite consistent naming
ajblane 5b67f55
Drop extra blank lines
ajblane 1d5dc44
Advoid terminating program when fail PoW init
ajblane 4587adb
Declare it with type consistency and rename it
ajblane 2433b9c
Modify README
ajblane 252c1f1
Make it naming consistency
ajblane 1086c5a
Drop unnecessary header files included
ajblane 0537f5c
Modify copyright notice and remove blank line
ajblane 4f33b60
Change i = i + 1 to i++
ajblane 9f44c8a
Rename the file and set CFLAGS in Makefile
ajblane 31240dc
Advoid terminating the program when destroy
ajblane cd99478
Use malloc for output memory of PoW
ajblane 913afa0
Move the unnecessary global variable
ajblane c7bbf07
Validate resources for the outputs
ajblane 02a9780
Do not terminate the program when destroy fails
ajblane 3b4f93a
Move header inclusions to proper regions
ajblane df8eedf
Set FPGA configuration for device files
ajblane f60c26a
Use macros from constants.h
ajblane 2837ed9
Use goto to handle exception
ajblane 43a865f
Rename macros
ajblane 97be9ec
Maintain the coding style
ajblane a0f78de
Use low-level I/O
ajblane 20949ae
Use memcpy and remove not useful code
ajblane 2002c1e
Rename labels and use clang-format
ajblane 19ea794
Use assert
ajblane 6c98c16
Solve conflicts
ajblane 119e67d
Modify it to the new interface #59
ajblane fafa723
Drop fpga-accel.mk
ajblane f220b24
Modify README and add FPGA-ACCEL.md
ajblane 00711c8
Modify FPGA-ACCEL.md
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,16 @@ | ||
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# IOTA FPGA-accelerated solution for Dcurl | ||
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dcurl supports IOTA FPGA-accelerated solutions to improve PoW performance. PoW calculation time for MWM=14 is between 0.001 and 0.8 second and 0.14 second in average and The time for MWM=15 is between 0.01 and 2 second and 0.42 second in average. Currently, it is experimented and verified on Arrow Sockit board and Intel FPGA DE10-Nano board. We reuse the Lampa Lab-provided FPGA-accelerated solution. | ||
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Here is a brief summary of the tasks Lampa Lab have done: | ||
* Use Verilog to implement Curl & POW accelerators | ||
* Use System Verilog and UVM to verify the accelerators | ||
* Synthesize Curl & POW hardware accelerators for Intel FPGA DE10-Nano board and flash it into the board | ||
* Write Linux drivers in Gloden System Reference Design for Curl & POW hardware accelerators and verify them | ||
More information: [LampaLab/iota_fpga](https://github.com/LampaLab/iota_fpga) | ||
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Here is a brief summary of the tasks we have done: | ||
* Resynthesize the POW hardware accelerator for Arrow Sockit board and flash it into the board | ||
* Integrate the IOTA PoW hardware accelerator into dcurl's implementation interface | ||
* Test and verify it |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,232 @@ | ||
/* | ||
* Copyright (C) 2018 dcurl Developers. | ||
* Copyright (c) 2018 Ievgen Korokyi. | ||
* Use of this source code is governed by MIT license that can be | ||
* found in the LICENSE file. | ||
*/ | ||
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#include "pow_fpga_accel.h" | ||
#include <fcntl.h> | ||
#include <sys/mman.h> | ||
#include <unistd.h> | ||
#include "implcontext.h" | ||
#include "trinary.h" | ||
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#define HPS_TO_FPGA_BASE 0xC0000000 | ||
#define HPS_TO_FPGA_SPAN 0x0020000 | ||
#define HASH_CNT_REG_OFFSET 4 | ||
#define TICK_CNT_LOW_REG_OFFSET 5 | ||
#define TICK_CNT_HI_REG_OFFSET 6 | ||
#define MWM_MASK_REG_OFFSET 3 | ||
#define CPOW_BASE 0 | ||
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/* Set FPGA configuration for device files */ | ||
#define DEV_CTRL_FPGA "/dev/cpow-ctrl" | ||
#define DEV_IDATA_FPGA "/dev/cpow-idata" | ||
#define DEV_ODATA_FPGA "/dev/cpow-odata" | ||
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#define INT2STRING(I, S) \ | ||
{ \ | ||
S[0] = I & 0xff; \ | ||
S[1] = (I >> 8) & 0xff; \ | ||
S[2] = (I >> 16) & 0xff; \ | ||
S[3] = (I >> 24) & 0xff; \ | ||
} | ||
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static int devmem_fd; | ||
static void *fpga_regs_map; | ||
static uint32_t *cpow_map; | ||
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static bool PoWFPGAAccel(void *pow_ctx) | ||
{ | ||
PoW_FPGA_Accel_Context *ctx = (PoW_FPGA_Accel_Context *) pow_ctx; | ||
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int8_t fpga_out_nonce_trits[NonceTrinarySize]; | ||
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char result[4]; | ||
char buf[4]; | ||
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Trytes_t *object_trytes = | ||
initTrytes(ctx->input_trytes, (transactionTrinarySize) / 3); | ||
if (!object_trytes) | ||
return false; | ||
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Trits_t *object_trits = trits_from_trytes(object_trytes); | ||
if (!object_trits) | ||
return false; | ||
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if (write(ctx->in_fd, (char *) object_trits->data, transactionTrinarySize) < | ||
0) | ||
return false; | ||
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INT2STRING(ctx->mwm, buf); | ||
if (write(ctx->ctrl_fd, buf, sizeof(buf)) < 0) | ||
return false; | ||
if (read(ctx->ctrl_fd, result, sizeof(result)) < 0) | ||
return false; | ||
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if (read(ctx->out_fd, (char *) fpga_out_nonce_trits, NonceTrinarySize) < 0) | ||
return false; | ||
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Trits_t *object_nonce_trits = | ||
initTrits(fpga_out_nonce_trits, NonceTrinarySize); | ||
if (!object_nonce_trits) | ||
return false; | ||
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Trytes_t *nonce_trytes = trytes_from_trits(object_nonce_trits); | ||
if (!nonce_trytes) | ||
return false; | ||
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memcpy(ctx->output_trytes, ctx->input_trytes, (NonceTrinaryOffset) / 3); | ||
memcpy(ctx->output_trytes + ((NonceTrinaryOffset) / 3), nonce_trytes->data, | ||
((transactionTrinarySize) - (NonceTrinaryOffset)) / 3); | ||
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freeTrobject(object_trytes); | ||
freeTrobject(object_trits); | ||
freeTrobject(object_nonce_trits); | ||
freeTrobject(nonce_trytes); | ||
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return true; | ||
} | ||
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static bool PoWFPGAAccel_Context_Initialize(ImplContext *impl_ctx) | ||
{ | ||
int i = 0; | ||
devmem_fd = 0; | ||
fpga_regs_map = 0; | ||
cpow_map = 0; | ||
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PoW_FPGA_Accel_Context *ctx = (PoW_FPGA_Accel_Context *) malloc( | ||
sizeof(PoW_FPGA_Accel_Context) * impl_ctx->num_max_thread); | ||
if (!ctx) | ||
goto fail_to_malloc; | ||
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for (i = 0; i < impl_ctx->num_max_thread; i++) { | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Move There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. My fault. Skip the previous comment. |
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ctx[i].ctrl_fd = open(DEV_CTRL_FPGA, O_RDWR); | ||
if (ctx[i].ctrl_fd < 0) { | ||
perror("cpow-ctrl open fail"); | ||
goto fail_to_open_ctrl; | ||
} | ||
ctx[i].in_fd = open(DEV_IDATA_FPGA, O_RDWR); | ||
if (ctx[i].in_fd < 0) { | ||
perror("cpow-idata open fail"); | ||
goto fail_to_open_idata; | ||
} | ||
ctx[i].out_fd = open(DEV_ODATA_FPGA, O_RDWR); | ||
if (ctx[i].out_fd < 0) { | ||
perror("cpow-odata open fail"); | ||
goto fail_to_open_odata; | ||
} | ||
impl_ctx->bitmap = impl_ctx->bitmap << 1 | 0x1; | ||
} | ||
impl_ctx->context = ctx; | ||
pthread_mutex_init(&impl_ctx->lock, NULL); | ||
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devmem_fd = open("/dev/mem", O_RDWR | O_SYNC); | ||
if (devmem_fd < 0) { | ||
perror("devmem open"); | ||
goto fail_to_open_memopen; | ||
} | ||
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fpga_regs_map = | ||
(uint32_t *) mmap(NULL, HPS_TO_FPGA_SPAN, PROT_READ | PROT_WRITE, | ||
MAP_SHARED, devmem_fd, HPS_TO_FPGA_BASE); | ||
if (fpga_regs_map == MAP_FAILED) { | ||
perror("devmem mmap"); | ||
goto fail_to_open_memmap; | ||
} | ||
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cpow_map = (uint32_t *) (fpga_regs_map + CPOW_BASE); | ||
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return true; | ||
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fail_to_open_memmap: | ||
close(devmem_fd); | ||
fail_to_open_memopen: | ||
close(ctx[i].out_fd); | ||
fail_to_open_odata: | ||
close(ctx[i].in_fd); | ||
fail_to_open_idata: | ||
close(ctx[i].ctrl_fd); | ||
fail_to_open_ctrl: | ||
fail_to_malloc: | ||
for (int j = i - 1; j > 0; j--) { | ||
close(ctx[j].in_fd); | ||
close(ctx[j].out_fd); | ||
close(ctx[j].ctrl_fd); | ||
} | ||
return false; | ||
} | ||
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static void PoWFPGAAccel_Context_Destroy(ImplContext *impl_ctx) | ||
{ | ||
PoW_FPGA_Accel_Context *ctx = (PoW_FPGA_Accel_Context *) impl_ctx->context; | ||
for (int i = 0; i < impl_ctx->num_max_thread; i++) { | ||
close(ctx[i].in_fd); | ||
close(ctx[i].out_fd); | ||
close(ctx[i].ctrl_fd); | ||
} | ||
free(ctx); | ||
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int result = munmap(fpga_regs_map, HPS_TO_FPGA_SPAN); | ||
if (result < 0) { | ||
perror("devmem munmap"); | ||
} | ||
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close(devmem_fd); | ||
} | ||
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static void *PoWFPGAAccel_getPoWContext(ImplContext *impl_ctx, | ||
int8_t *trytes, | ||
int mwm) | ||
{ | ||
pthread_mutex_lock(&impl_ctx->lock); | ||
for (int i = 0; i < impl_ctx->num_max_thread; i++) { | ||
if (impl_ctx->bitmap & (0x1 << i)) { | ||
impl_ctx->bitmap &= ~(0x1 << i); | ||
pthread_mutex_unlock(&impl_ctx->lock); | ||
PoW_FPGA_Accel_Context *ctx = | ||
impl_ctx->context + sizeof(PoW_FPGA_Accel_Context) * i; | ||
memcpy(ctx->input_trytes, trytes, (transactionTrinarySize) / 3); | ||
ctx->mwm = mwm; | ||
ctx->indexOfContext = i; | ||
return ctx; | ||
} | ||
} | ||
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pthread_mutex_unlock(&impl_ctx->lock); | ||
return NULL; /* It should not happen */ | ||
} | ||
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static bool PoWFPGAAccel_freePoWContext(ImplContext *impl_ctx, void *pow_ctx) | ||
{ | ||
pthread_mutex_lock(&impl_ctx->lock); | ||
impl_ctx->bitmap |= 0x1 | ||
<< ((PoW_FPGA_Accel_Context *) pow_ctx)->indexOfContext; | ||
pthread_mutex_unlock(&impl_ctx->lock); | ||
return true; | ||
} | ||
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static int8_t *PoWFPGAAccel_getPoWResult(void *pow_ctx) | ||
{ | ||
int8_t *ret = | ||
(int8_t *) malloc(sizeof(int8_t) * ((transactionTrinarySize) / 3)); | ||
if (!ret) | ||
return NULL; | ||
memcpy(ret, ((PoW_FPGA_Accel_Context *) pow_ctx)->output_trytes, | ||
(transactionTrinarySize) / 3); | ||
return ret; | ||
} | ||
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ImplContext PoWFPGAAccel_Context = { | ||
.context = NULL, | ||
.bitmap = 0, | ||
.num_max_thread = 1, // num_max_thread >= 1 | ||
.num_working_thread = 0, | ||
.initialize = PoWFPGAAccel_Context_Initialize, | ||
.destroy = PoWFPGAAccel_Context_Destroy, | ||
.getPoWContext = PoWFPGAAccel_getPoWContext, | ||
.freePoWContext = PoWFPGAAccel_freePoWContext, | ||
.doThePoW = PoWFPGAAccel, | ||
.getPoWResult = PoWFPGAAccel_getPoWResult, | ||
}; |
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Since file
fpga-accel.mk
is empty, you don't have to include at the moment.There was a problem hiding this comment.
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Can you fix?