Notes after working with Zynq platform using vivado and petalinux
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Updated
Feb 26, 2024 - SystemVerilog
Notes after working with Zynq platform using vivado and petalinux
Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis
Simple safe lock mechanism written in SystemVerilog.
VHDL implementation of VGA controller. Implemented on Zybo Zynq-7000 board which uses switches to change output color.
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