vhdl
Here are 110 public repositories matching this topic...
An abstraction library for interfacing EDA tools
-
Updated
Aug 22, 2024 - Python
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
-
Updated
Sep 24, 2024 - Python
Repurposing existing HDL tools to help writing better code
-
Updated
Jun 6, 2024 - Python
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
-
Updated
Jun 1, 2021 - Python
Translates IPXACT XML to synthesizable VHDL or SystemVerilog
-
Updated
Jun 22, 2024 - Python
An abstract language model of VHDL written in Python.
-
Updated
Sep 27, 2024 - Python
A package for Sublime Text that aids coding in the VHDL language.
-
Updated
Aug 18, 2023 - Python
hardware library for hwt (= ipcore repo)
-
Updated
Jun 6, 2024 - Python
Cross EDA Abstraction and Automation
-
Updated
Sep 27, 2024 - Python
Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
-
Updated
Jun 6, 2024 - Python
Generator for CRC HDL code (VHDL, Verilog, MyHDL)
-
Updated
Oct 13, 2023 - Python
VHDLproc is a VHDL preprocessor
-
Updated
May 12, 2022 - Python
Improve this page
Add a description, image, and links to the vhdl topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the vhdl topic, visit your repo's landing page and select "manage topics."