A half adder is a digital circuit that performs addition of two binary digits, generating the sum bit and the carry bit.

[DONE] AND/OR gate example in VHDL

[DONE] Adder/Subtractor example in VHDL

Some basic VHDL projects.

This is our final project for Digital Systems Course

A 4-bit down counter is a digital circuit that counts down from a preset value to zero, decreasing by one with each clock pulse.

This Repository contains the basic VHDL code for different circuits we learn in Computer Architecture. All the provided codes run on EdaPlayground platform, thus divided into testbench code (that goes under testbench.vhd window )and design code (goes under design.vhd) for clarity.

Programas Basicos en Lenguaje VHDL de Diseño Logico y Diseño de Circuitos Digitales para Uso y simulacion con QuartusII y los FPGA Cyclone III de Altera (Compilados y compatibles con la FPGA EP3C16F484C6N) Para Practica en la Licenciatura de Ingenieria Electrica Electronica e Ingenieria en Computación Bajo Licencia MIT

[DONE] ALU example in VHDL

Sample VHDL Example

Simple RISC processor in VHDL

Vhdl coursework

Aqui eu tento documentar o que fiz enquanto estudava a linguagem de descrição de hardware VHDL. Pretendo aumentar a lista e categorizar também.

EGR 480 - Digital Integrated Circuit Design and FPGAs

The VHDL code implements a 2x4 decoder, converting two input signals into four output signals based on the input combinations.

A 4x2 priority encoder is a digital circuit that takes four input lines and encodes them into a two-bit binary output based on the priority of the input lines.

Implementation of a MIPS processor on VHDL

UAH Telecommunication Engineering Master's Electronic Design Subject