Verilog Mini Projects
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Updated
Aug 9, 2024 - Verilog
Verilog Mini Projects
basic implementation of logic structures using verilog (revising github)
FSM: Sequence Detector using Verilog HDL
Mealy Finite State Machine type overlapping sequence detector of "1011" in SystemVerilog.
sequence detector with overlapped 2 patterns 010111 or 1101
Verilog Codes for various Design
All my submissions to assignments in CS254 - Digital Logic Design Lab ( Spring Course 2019 IIT BOMBAY)
Generates a Finite State Machine to detect a binary sequence
A hardware-based teaching aid for students to get familiarized with sequential logic using Basys FPGA boards.
Verilog implementation of different concepts in Digital Logic Design such as OTHFSM, AFG and Accelerators
Verilog for ASIC Design
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