de1-soc
Here are 56 public repositories matching this topic...
Audio Signal Processing SoC Project Website
-
Updated
Apr 6, 2017 - HTML
Trivia game programmed in Assembly using NIOS II instruction set - FINISHED BETA TESTING - VERSION 1.00 RELEASED!
-
Updated
Apr 27, 2017 - Assembly
FPGA Verilog HDL design project (DE1-SoC)
-
Updated
Jan 19, 2018 - Verilog
Audio Signal Processing SoC
-
Updated
Mar 13, 2018 - VHDL
Guitar amp sim for Altera DE1-SoC NIOS2
-
Updated
Apr 1, 2018 - Assembly
Plasma MIPS (I) SoC
-
Updated
Sep 17, 2018 - C
OpenCL wrapper for Intel's unique chip ID function built for the Cyclone V chip on the DE1-SoC board
-
Updated
May 6, 2019 - C++
A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.
-
Updated
Oct 11, 2019 - Verilog
Implementation of Hopfield network using Verilog
-
Updated
Nov 18, 2019 - Verilog
Division Algorithms in FPGAs
-
Updated
Nov 24, 2019 - VHDL
A language learning solution to learn vocabulary from day-to-day objects with front-end on De1-SoC Cyclone V FPGA and backend on a Raspberry Pi, incorporating Microsoft Azure Cognitive Services
-
Updated
Apr 8, 2020 - HTML
FPGA Cripto Algorithm Hummingbird
-
Updated
May 30, 2020 - HTML
Improve this page
Add a description, image, and links to the de1-soc topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the de1-soc topic, visit your repo's landing page and select "manage topics."