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Aug 12, 2016 - C
altera-fpga
Here are 56 public repositories matching this topic...
A MIPS processor implementation for the Altera DE2 Cyclone II FPGA dev board
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Dec 8, 2016 - Verilog
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Dec 8, 2017 - VHDL
This an experimental app for a research and design project for controlling content generated from an Altera FPGA and displayed on a LED matrix.
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Jan 6, 2018 - Java
Guitar amp sim for Altera DE1-SoC NIOS2
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Apr 1, 2018 - Assembly
FPGA implementation of the popular logic game using VHDL and Altera DE1
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Apr 21, 2018 - VHDL
Thesis covers research on digital signal processing with software defined radio techniques applied in FPGA environment. It is written entirely in Polish language, except english abstract
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May 22, 2018 - Verilog
Hardware Praktikum at Uni Freiburg
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Nov 8, 2018 - VHDL
a state-machine based implementation of a multiplayer battle simulator on an Altera FPGA using VGA video output
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Dec 11, 2018 - VHDL
An 8-bit processor in VHDL based on a simple instruction set
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Mar 7, 2019 - VHDL
A simple sram controller and test for the altera DE1 FPGA board
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Apr 2, 2019 - VHDL
Simple seven segment display controller for the 4 seven segment displays for the terasic de1 altera board
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Apr 12, 2019 - VHDL
Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.
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Apr 25, 2019 - Verilog
Play and learn with the Terasic DE0-Atlas/Nano-SoC Kit featuring a Altera/Intel Cyclone V 5CSEMA4U23C6N FPGA with integrated dual-core ARM Cortex-A9.
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Sep 6, 2019 - Verilog
This repo is the lab materials for NTUEE DCLAB (http://dclab.ee.ntu.edu.tw).
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Oct 26, 2019 - SystemVerilog
Controle de motor DC + Sensores fim de curso implementado em VHDL para o kit DE0-CV utilizado na matéria de Elementos de sistemas do 3 semestre de Engenharia da computação do Insper.
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Nov 1, 2019 - VHDL
Digital clock in VHDL, on Altera Cyclone IV FPGA Board A-C4E6. This work was presented on PLP discipline during electrical engineer course at Mackenzie Presbyterian University.
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Nov 23, 2019 - VHDL
The work presented is designed to simulate the operation of an automatic coffee machine. It will manage the machine operation by exploiting the processing capabilities of the FPGA.
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Dec 16, 2019 - VHDL
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