Produce diff of ASIC resources during CI

[ccascone]

Wouldn't it be nice if we could get something like a codecov report for each PR, but instead of showing the coverage diff, it would show the diff in terms of utilization of PHV, stages, memory, etc.?

Today, we assume PR authors use p4i to check the impact on ASIC resource utilization when making design decisions. However, it's easy to forget and/or get confused when we have so many different build profiles, and it takes so long to build one.

Posting such ASIC resource diff would reduce the burden on PR authors to manually build and compare profiles, and would provide reviewers with more data to perform more informed reviews in less time. This issue was motivated by this comment on PR #246.

If there's a legal problem publishing the output of p4i as a PR comment, we could upload it as a Jenkins artifact, accessible only to ONF community members who have an agreement with Intel (like we do for the PR verification job).