[rtl] add CUSTOM_ID generic

CHANGELOG.md

@@ -32,6 +32,7 @@ mimpid = 0x01040312 => 01.04.03.12 => Version 01.04.03.12 => v1.4.3.12
 
 | Date (*dd.mm.yyyy*) | Version | Comment |
 |:-------------------:|:-------:|:--------|
+| 22.07.2022 | 1.7.4.5 | add `CUSTOM_ID` generic; update bootloader; [#374](https://github.com/stnolting/neorv32/pull/374) |
 | 21.07.2022 | 1.7.4.4 | :lock: specify **physical memory attributes (PMA)** ;[#372](https://github.com/stnolting/neorv32/pull/372) |
 | 18.07.2022 | 1.7.4.3 | minor rtl edits and updates; [#369](https://github.com/stnolting/neorv32/pull/369) |
 | 15.07.2022 | 1.7.4.2 | :bug: fixed PMP configuration error when `PMP_NUM_REGIONS` = 0; [#368](https://github.com/stnolting/neorv32/pull/368) |

docs/datasheet/rationale.adoc

@@ -62,7 +62,7 @@ https://github.com/olofk/serv[SERV] in terms of size. It was build having a diff
 
 The project aims to provide _another option_ in the RISC-V / soft-core design space with a different performance
 vs. size trade-off and a different focus: _embrace_ concepts like documentation, platform-independence / portability,
-RISC-V compatibility, _ extensibility & customization_ and _ease of use_ (see the <<_project_key_features>> below).
+RISC-V compatibility, _extensibility & customization_ and _ease of use_ (see the <<_project_key_features>> below).
 
 Furthermore, the NEORV32 pays special focus on _execution safety_ using <<_full_virtualization>>. The CPU aims to
 provide fall-backs for _everything that could go wrong_. This includes malformed instruction words, privilege escalations

docs/datasheet/soc.adoc

@@ -234,6 +234,18 @@ Note that hart IDs must be unique within a system.
 |======
 
 
+:sectnums!:
+===== _CUSTOM_ID_
+
+[cols="4,4,2"]
+[frame="all",grid="none"]
+|======
+| **CUSTOM_ID** | _std_ulogic_vector(31 downto 0)_ | 0x00000000
+3+| User-defined identifier (to identify a certain setup or to pass user-defined flags).
+Software can retrieve this value from the <<_system_configuration_information_memory_sysinfo>> `CUSTOM_ID` register.
+|======
+
+
 :sectnums!:
 ===== _ON_CHIP_DEBUGGER_EN_
 

docs/datasheet/soc_sysinfo.adoc

@@ -34,7 +34,7 @@ will signal a "DEVICE ERROR" in this case.
 |=======================
 | Address | Name [C] | Function
 | `0xffffffe0` | `NEORV32_SYSINFO.CLK`         | clock speed in Hz (via top's <<_clock_frequency>> generic)
-| `0xffffffe4` | -                             | _reserved_, read as zero
+| `0xffffffe4` | `NEORV32_SYSINFO.CUSTOM_ID    | custom user-defined ID (via top's <<_custom_id>> generic)
 | `0xffffffe8` | `NEORV32_SYSINFO.SOC`         | specific SoC configuration (see <<_sysinfo_soc_configuration>>)
 | `0xffffffec` | `NEORV32_SYSINFO.CACHE`       | cache configuration information (see <<_sysinfo_cache_configuration>>)
 | `0xfffffff0` | `NEORV32_SYSINFO.ISPACE_BASE` | instruction address space base (via package's `ispace_base_c` constant)

docs/datasheet/software_bootloader.adoc

@@ -90,6 +90,7 @@ following intro screen shows up:
 
 BLDV: Jul 11 2022
 HWV:  0x01070307
+CID:  0x00000000
 CLK:  0x05f5e100
 ISA:  0x40901104 + 0xc0000783
 SOC:  0x7c5f400f
@@ -106,6 +107,7 @@ The start-up screen gives some brief information about the bootloader and severa
 |=======================
 | `BLDV` | Bootloader version (built date).
 | `HWV`  | Processor hardware version (the <<_mimpid>> CSR); in BCD format; example: `0x01040606` = v1.4.6.6).
+| `CID`  | Custom user-defined ID (via the `CUSTOM_ID` register from <<_system_configuration_information_memory_sysinfo>>; defined by the <<_custom_id>> generic).
 | `CLK`  | Processor clock speed in Hz (via the `CLK` register from <<_system_configuration_information_memory_sysinfo>>; defined by the <<_clock_frequency>> generic).
 | `ISA`  | CPU extensions (<<_misa>> CSR + <<_mxisa>> CSR).
 | `SOC`  | Processor configuration (via the `SOC` register from the <<_system_configuration_information_memory_sysinfo>>; mainly defined by the `IO_*` and `MEM_*` configuration generics).