DMEM/IMEM Portability of Closed Toolchains / Vivado / Intel / Lattice / GoWin

[timaosan]

First a great thank you for the great stuff you provide. I just recently started to work with RV and do digital logic since 1996.

While bringing a mini implementation up with all internal memories in both Vivado and Quartus as well as Lattice I noticed that mainly the optimizers like to optimize away ROM - content leading to futher "optisation" of the RAM rendering synthesis faulty.

I changed the following for quartus (Board: DE0-NANO):
=>Use dedicated ROM/RAM components to infer RAMS, split up processes
=>Blink Check and Debugging okay
For Modelsim:
=>Guard read access (I use 3 kbyte ROM/RAM) from illeagal addresses
=>Blink Check and Debugging okay
For Vivado (Board: Colorlight i9+):
=>Use dont_touch and keep attributes on the write-enables,read-enables of the RAM and address, data on ROM/ROM
=>Blink Check and Debugging okay
For Lattice (Board: Colorlight i9):
=>So far no success, RAM access (dmem) not working
but I will try to get it running as well, need to prevent the Synplify Optimizer from overdoing.

For GoWin (Arora Board):
=> Project just started.

If you have any hints on that pls let me know. I can also contribute generic RAMs and a changed ROM.

[stnolting]

Hey @timaosan!

First of all, the memory modules from neorv32/rtl/core/mem were designed in a platform-agnostic way. So they can (should) be synthesized for any platform resulting in the correct inference of block RAM. I have tested this on Xilinx (Vivado), Intel (Quartus) and Lattice (Diamond + Radiant) FPGAs.

I use 3 kbyte ROM/RAM

Better use a power of two for the memory sizes - otherwise the synthesizer might have issues inferring block RAM.

For Lattice (Board: Colorlight i9):
=>So far no success, RAM access (dmem) not working

Have you checked the final synthesis reports? There should be a notification if the tool was not able to infer block RAM.

[timaosan]

Thank you for your reply, I am now working on the full system first on the Altera/Intel toolchain and will come back to this once I am finished as debugging on Quartus is the most efficient for me.

[stnolting]

Are there any updates on this?
Otherwise we can close this (for now 😉).

[timaosan]

Thank you for your reminder... We are working on a multitude of aspects, please allow another week and I will follow up on this and other items.