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optimize mul
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@ashWhiteHat
ashWhiteHat committed Jan 21, 2022
1 parent 81f05dc commit 1ab05a5
Showing 1 changed file with 25 additions and 30 deletions.
55 changes: 25 additions & 30 deletions src/bn256/fr.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -388,7 +388,6 @@ impl Fr {
let mut r5: u64;
let mut r6: u64;
let mut r7: u64;
let rhs = self.clone();
unsafe {
asm!(
// schoolbook multiplication
Expand All @@ -399,79 +398,82 @@ impl Fr {
// b3 | b3 * a0 | b3 * a1 | b3 * a2 | b3 * a3

// init registers
"xor r13, r13",
"xor r14, r14",
"xor r15, r15",
"mov r13, qword ptr [{a_ptr} + 0]",
"mov r14, qword ptr [{a_ptr} + 8]",
"mov r15, qword ptr [{a_ptr} + 16]",

// `a0`
"mov rdx, qword ptr [{a_ptr} + 0]",
"mov rdx, r13",

// a0 * b0
"mulx r9, r8, qword ptr [{b_ptr} + 0]",
"mulx r9, r8, r13",

// a0 * b1
"mulx r10, rax, qword ptr [{b_ptr} + 8]",
"mulx r10, rax, r14",
"add r9, rax",

// a0 * b2
"mulx r11, rax, qword ptr [{b_ptr} + 16]",
"mulx r11, rax, r15",
"adcx r10, rax",

// a0 * b3
"mulx r12, rax, qword ptr [{b_ptr} + 24]",
"mulx r12, rax, qword ptr [{a_ptr} + 24]",
"adcx r11, rax",
"adc r12, 0",

// `a1`
"mov rdx, [{a_ptr} + 8]",
"mov rdx, r14",

// a1 * b0
"mulx rcx, rax, qword ptr [{b_ptr} + 0]",
"mulx rcx, rax, r13",
"add r9, rax",
"adcx r10, rcx",
"adc r11, 0",

// a1 * b1
"mulx rcx, rax, qword ptr [{b_ptr} + 8]",
"mulx rcx, rax, r14",
"add r10, rax",
"adcx r11, rcx",
"adc r12, 0",
"xor r13, r13",

// a1 * b2
"mulx rcx, rax, qword ptr [{b_ptr} + 16]",
"mulx rcx, rax, r15",
"add r11, rax",
"adcx r12, rcx",
"adc r13, 0",
"xor r14, r14",

// a1 * b3
"mulx rcx, rax, qword ptr [{b_ptr} + 24]",
"mulx rcx, rax, qword ptr [{a_ptr} + 24]",
"add r12, rax",
"adcx r13, rcx",
"adc r14, 0",

// `a2`
"mov rdx, [{a_ptr} + 16]",
"mov rdx, r15",

// a2 * b0
"mulx rcx, rax, qword ptr [{b_ptr} + 0]",
"mulx rcx, rax, qword ptr [{a_ptr} + 0]",
"add r10, rax",
"adcx r11, rcx",
"adc r12, 0",

// a2 * b1
"mulx rcx, rax, qword ptr [{b_ptr} + 8]",
"mulx rcx, rax, qword ptr [{a_ptr} + 8]",
"add r11, rax",
"adcx r12, rcx",
"adc r13, 0",

// a2 * b2
"mulx rcx, rax, qword ptr [{b_ptr} + 16]",
"mulx rcx, rax, r15",
"add r12, rax",
"adcx r13, rcx",
"adc r14, 0",
"xor r15, r15",

// a2 * b3
"mulx rcx, rax, qword ptr [{b_ptr} + 24]",
"mulx rcx, rax, qword ptr [{a_ptr} + 24]",
"adcx r13, rax",
"adcx r14, rcx",
"adc r15, 0",
Expand All @@ -480,30 +482,29 @@ impl Fr {
"mov rdx, [{a_ptr} + 24]",

// a3 * b0
"mulx rcx, rax, qword ptr [{b_ptr} + 0]",
"mulx rcx, rax, qword ptr [{a_ptr} + 0]",
"add r11, rax",
"adcx r12, rcx",
"adc r13, 0",

// a3 * b1
"mulx rcx, rax, qword ptr [{b_ptr} + 8]",
"mulx rcx, rax, qword ptr [{a_ptr} + 8]",
"adcx r12, rax",
"adcx r13, rcx",
"adc r14, 0",

// a3 * b2
"mulx rcx, rax, qword ptr [{b_ptr} + 16]",
"mulx rcx, rax, qword ptr [{a_ptr} + 16]",
"adcx r13, rax",
"adcx r14, rcx",
"adc r15, 0",

// a3 * b3
"mulx rcx, rax, qword ptr [{b_ptr} + 24]",
"mulx rcx, rax, qword ptr [{a_ptr} + 24]",
"adcx r14, rax",
"adc r15, rcx",

a_ptr = in(reg) self.0.as_ptr(),
b_ptr = in(reg) rhs.0.as_ptr(),
out("rax") _,
out("rcx") _,
out("rdx") _,
Expand Down Expand Up @@ -1015,11 +1016,6 @@ impl Fr {
options(pure, readonly, nostack)
)
}
if self.0 == [0, 0, 0, 0] {
println!("{:?}", MODULUS.0);
println!("{:?}", [r0, r1, r2, r3]);
println!("{:?}", r4);
}
Self([r0, r1, r2, r3])
}
}
Expand Down Expand Up @@ -1274,7 +1270,6 @@ mod fr_tests {
let b = a * a;
assert!(b != Fr::one());
let c = b * a;
println!("{:?}", c);
assert!(c == Fr::one());
}

Expand Down

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