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Releases: oneapi-src/oneDNN

graph-v0.6

14 Oct 15:05
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graph-v0.6 Pre-release
Pre-release

This is the Beta release for oneDNN Graph based on oneDNN v2.7 release.

Functionality

  • Introduced FP32, BF16, FP16, and INT8 inference support on GPU.
  • Introduced FP32 and BF16 training support on GPU.
  • Introduced support for floating point math mode at graph construction phase. The mode allows the implementation to use low precision datatype for computations when possible.
  • Added graph::finalize() function to indicate that the user has finished adding operations into the graph and the graph is ready for partitioning.
  • Added operations AbsBackprop, Mish, MishBackprop, and LeakyReLU.
  • Updated API and operation definitions to comply with oneDNN Graph Specification 1.0-beta.

Usability

  • Integrated Graph component headers, source and build system into oneDNN:
    • Headers moved to include/oneapi/dnnl.
    • Source moved to src/graph.
    • Graph functionality is included into single shared object or dynamic library produced by the build system.
  • Aligned API with oneDNN:
    • Shared common dnnl::engine and dnnl::stream. The original dnnl::graph::engine and dnnl::graph::stream API were removed.
    • Added a new make_engine_with_allocator() API to create dnnl::engine with dnnl::graph::allocator.
    • A few common basic types were shared between oneDNN and oneDNN Graph, including dnnl_status_t, dnnl_data_type_t, and dnnl_dims_t, etc.
  • Introduced ONEDNN_BUILD_GRAPH build option to manage Graph component build.

Validation

  • Introduced ONEDNN_GRAPH_DUMP environment variable that serialized library graph and subgraph into JSON files.
  • Added the initial version of benchdnn graph driver which can be used to benchmark the performance with a dumped graph JSON file.

Breaking changes

  • Removed operations HardTanh, Index, Pow, etc. Please check the operation kind list for details.

Known Issues and Limitations

  • Graph Compiler component is not included with this release. It will be reinstated in oneDNN Graph Beta Update release.
  • The weight’s opaque layout can be queried only from a compiled partition, which requires that input tensor shapes must be known at compilation time.
  • Build option ONEDNN_BUILD_GRAPH is not compatible with some of the build options supported by the build system including ONEDNN_GPU_RUNTIME=OCL, ONEDNN_ENABLE_WORKLOAD=INFERENCE, ONEDNN_ENABLE_PRIMITIVE, and others.

Thanks to the Contributors

This release contains contributions from the project core teams as well as Jiong Gong, Chunyuan Wu, Sanchit Jain, Yiqiang Li, Yunfei Mao, Kiefer Kuah and others.

v2.7

27 Sep 22:17
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Performance Optimizations

  • Intel Architecture Processors
    • Improved performance for future Intel Xeon Scalable processors (code name Sapphire Rapids).
    • Introduced performance optimizations for bf16 floating point math mode on Intel Xeon Scalable processors (code name Sapphire Rapids). The bf16 math mode allows oneDNN to use bf16 arithmetic and Intel AMX instructions in computations on fp32 data.
  • Intel Graphics Products
    • Improved performance for future Xe Architecture graphics (code name Ponte Vecchio).
    • Introduced performance optimizations for tf32 floating point math mode on future Xe Architecture graphics (code name Ponte Vecchio). The tf32 math mode allows oneDNN to use tf32 arithmetic in computations on fp32 data.
    • Improved performance for Intel Arc graphics (formerly Alchemist and DG2) and Intel Data Center GPU Flex Series (formerly Arctic Sound-M)
  • AArch64-based Processors
    • Improved convolution and binary primitive performance for processors with SVE 512 support.
    • Improved shuffle and eltwise primitives performance for processors with SVE 256 and SVE 128 support.
    • Improved PReLU, batch normalization, and pooling primitives performance via Compute Library for the Arm Architecture (ACL).
    • Improved performance of inner product, matmul, convolution, and batch norm primitives with post-ops via ACL.
  • PowerPC64-based Processors
    • Introduced performance optimizations for int8 and bfloat16 GEMM.

Functionality

  • Introduced runtime output scales support in all primitives.
  • Introduced scales support in concat primitive.
  • Extended floating point math mode API with tf32 data type option.
  • Extended eltwise primitive with support for hardsigmoid algorithm.
  • Extended layer normalization primitive with support for mixed source and destination data types.
  • Extended depthwise post-op with support for arbitrary padding size. The implementation is available only on Intel processors.
  • Added limited fp64 data type support in convolution primitive. Optimized implementation is available for future Xe Architecture graphics (code name Ponte Vecchio).
  • Extended int8 convolution and deconvolution implementations on GPUs with arbitrary destination data type support.
  • Extended batch normalization primitive with dnnl_fuse_norm_add_relu flag that allows to fuse sum and relu operations. The implementation is available for Intel GPUs.
  • Extended GPU deconvolution primitive implementation with support for output scales and zero points.
  • Introduced threadpool threading support for AArch64-based processors.
  • Introduced Unified Shared Memory (USM) support for SYCL backend on NVIDIA GPUs.
  • Introduced initial support for AMD GPUs via MIOpen library. Supported primitives include Local Response Normalization (LRN), softmax, and eltwise.

Usability

  • Added matmul_perf example that benchmarks matmul primitive for all supported data types.
  • Introduced annotations for JIT kernels to allow profilers like Linux perf to correctly label JIT code.
  • Extended verbose logs converter with RNN primitive support.
  • Added verbose output for dnnl_*gemm* calls.
  • Removed Level Zero headers from the list of build time dependencies.
  • Adjusted NVIDIA GPU implementation to comply with oneDNN numerical behavior. Implicit downconvert to fp16 and tf32 are now managed via math mode API.

Validation

  • Added benchdnn driver for validation of internal BRGEMM implementation.
  • Improved benchdnn reference implementation performance with threadpool threading model.
  • Extended benchdnn performance benchmarking capabilities on GPU with device-side performance measurement mode (mode=po).

Deprecated Functionality

  • Support for SYCL 1.2.1 (aka SYCL 2017 standard) is deprecated and will be removed in the future releases.
  • Static output scales are deprecated and will be removed in the next release.
  • Convolution Winograd algorithm implementation for int8 data type is deprecated and will be removed in the next release.

Breaking Changes

  • Changed formula for AUGRU RNN cell to align with Tensorflow. See proposal for details.

Thanks to the Contributors

This release contains contributions from the project core team as well as Aidan Belton @AidanBeltonS, @akshatasangelkar, Alex Bojan @lb991, Crefeda Rodrigues @cfRod, Damian Szwichtenberg @dszwicht, Diana Bite @diaena, Divakar Mariyanna @bmdivakar, Emilio Cota @cota, Gordon Fossum @austinpagan, Hugh Delaney @hdelan, Jacek Czaja @jczaja, @jakpiase, Jonathan Deakin @jondea, Kentaro Kawakami @kawakami-k, Kotha Sowmya @Sowmyakotha1999, Louie Tsai @louie-tsai, Mark Ryan @markdryan, MITSUNARI Shigeo @herumi, Mona Minakshi @monaminakshi, @NaNAGISaSA, Nathan John Sircombe @nSircombe, Peter Caday @petercad, @pgorlani, Sreekanth Yalachigere @sreekanth-yalachigere, Tadej Ciglarič @t4c1, and Thiago Macieira @thiagomacieira. We would also like to thank everyone who asked questions and reported issues.

v2.7-rc

16 Sep 17:31
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v2.7-rc Pre-release
Pre-release

This is a release candidate for oneDNN v2.7. Please provide feedback and submit defect reports via Github issues.

Performance Optimizations

  • Intel Architecture Processors
    • Improved performance for future Intel Xeon Scalable processors (code name Sapphire Rapids).
    • Introduced performance optimizations for bf16 floating point math mode on Intel Xeon Scalable processors (code name Sapphire Rapids). The bf16 math mode allows oneDNN to use bf16 arithmetic and Intel AMX instructions in computations on fp32 data.
  • Intel Graphics Products
    • Improved performance for future Xe Architecture graphics (code name Ponte Vecchio).
    • Introduced performance optimizations for tf32 floating point math mode on future Xe Architecture graphics (code name Ponte Vecchio). The tf32 math mode allows oneDNN to use tf32 arithmetic in computations on fp32 data.
    • Improved performance for Intel Arc graphics (formerly Alchemist and DG2) and Intel Data Center GPU Flex Series (formerly Arctic Sound-M)
  • AArch64-based Processors
    • Improved convolution and binary primitive performance for processors with SVE 512 support.
    • Improved eltwise and shuffle primitives performance for processors with SVE 256 and SVE 128 support.
    • Improved PReLU, batch normalization, and pooling primitives performance via Compute Library for the Arm Architecture (ACL).
    • Improved performance of inner product, matmul, convolution, and batch norm primitives with post-ops via ACL.
  • PowerPC64-based Processors
    • Introduced performance optimizations for int8 and bfloat16 GEMM.

Functionality

  • Introduced runtime output scales support in all primitives.
  • Introduced scales support in concat primitive.
  • Extended floating point math mode API with tf32 data type option.
  • Extended eltwise primitive with support for hardsigmoid algorithm.
  • Extended layer normalization primitive with support for mixed source and destination data types.
  • Extended depthwise post-op with support for arbitrary padding size. The implementation is available only on Intel processors.
  • Added limited fp64 data type support in convolution primitive. Optimized implementation is available for future Xe Architecture graphics (code name Ponte Vecchio).
  • Extended int8 convolution and deconvolution implementations on GPUs with arbitrary destination data type support.
  • Extended batch normalization primitive with dnnl_fuse_norm_add_relu flag that allows to fuse sum and relu operations. The implementation is available for Intel GPUs.
  • Extended GPU deconvolution primitive implementation with support for output scales and zero points.
  • Introduced threadpool threading support for AArch64-based processors.
  • Introduced Unified Shared Memory (USM) support for SYCL backend on NVIDIA GPUs.
  • Introduced initial support for AMD GPUs via MIOpen library. Supported primitives include Local Response Normalization (LRN), softmax, and eltwise.

Usability

  • Introduced annotations for JIT kernels to allow profilers like Linux perf to correctly label JIT code.
  • Extended verbose logs converter with RNN primitive support.
  • Added verbose output for dnnl_*gemm* calls.
  • Removed Level Zero headers from the list of build time dependencies.
  • Adjusted NVIDIA GPU implementation to comply with oneDNN numerical behavior. Implicit downconvert to fp16 and tf32 are now managed via math mode API.

Validation

  • Added benchdnn driver for validation of internal BRGEMM implementation.
  • Improved benchdnn reference implementation performance with threadpool threading model.
  • Extended benchdnn performance benchmarking capabilities on GPU with device-side performance measurement mode (mode=po).

Deprecated Functionality

  • Support for SYCL 1.2.1 (aka SYCL 2017 standard) is deprecated and will be removed in the future releases.
  • Static output scales are deprecated and will be removed in the next release.
  • Convolution Winograd algorithm implementation for int8 data type is deprecated and will be removed in the next release.

Breaking Changes

  • Changed formula for AUGRU RNN cell to align with Tensorflow. See proposal for details.

Thanks to the Contributors

This release contains contributions from the project core team as well as Aidan Belton @AidanBeltonS, @akshatasangelkar, Alex Bojan @lb991, Crefeda Rodrigues @cfRod, Damian Szwichtenberg @dszwicht, Diana Bite @diaena, Divakar Mariyanna @bmdivakar, Emilio Cota @cota, Gordon Fossum @austinpagan, Hugh Delaney @hdelan, Jacek Czaja @jczaja, @jakpiase, Jonathan Deakin @jondea, Kentaro Kawakami @kawakami-k, Kotha Sowmya @Sowmyakotha1999, Louie Tsai @louie-tsai, Mark Ryan @markdryan, MITSUNARI Shigeo @herumi, Mona Minakshi @monaminakshi, @NaNAGISaSA, Nathan John Sircombe @nSircombe, Peter Caday @petercad, @pgorlani, Sreekanth Yalachigere @sreekanth-yalachigere, Tadej Ciglarič @t4c1, and Thiago Macieira @thiagomacieira. We would also like to thank everyone who asked questions and reported issues.

v2.6.2

09 Sep 22:36
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This is a patch release containing the following changes to v2.6.1:

  • Removed unused variables (2500b0f, b4e0032)
  • Fixed correctness issue in fp32 convolution implementation for cases with large spatial size (207af06)
  • Fixed correctness issue in bfloat16 matmul implementation for processors with Intel AMX support (404b762)
  • Fixed correctness issue in int8 reorder implementation with zero points (b340cba)
  • Improved int8 matmul and inner product primitives performance with small matrices for processors with Intel AMX support (73b7572, 58b386a)
  • Improved int8 convolution performance for processors with Intel DL Boost support (f35a62f)
  • Aligned AUGRU formula with Tensorflow definition (e47c6c5, 4ba0a57, b311e24)
  • Suppressed 'unvectorized loop' warning for Intel C/C++ Compiler (3932d04)

graph-v0.5.2

12 Aug 20:38
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graph-v0.5.2 Pre-release
Pre-release

This is a patch release containing the following changes to graph-v0.5.1:

  • Deprecated quantized ReLU fusion patterns (85405a9)

v2.6.1

12 Jul 22:20
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This is a patch release containing the following changes to v2.6:

  • Extended depthwise convolution post-op with support for arbitrary filter size, stride, and padding (79b019b)
  • Improved GEMM performance with threadpool threading on system with Intel AVX2 instruction set (2be0060)
  • Fixed runtime error in GPU reduction primitive for specific tensor sizes (efbf9b5)
  • Improved convolution performance on GPUs with Xe-HPG IP (f8de0c9, c1fb8ac)
  • Updated ITT API to 3.22.5 (9b18676)
  • Fixed correctness issues in reorder implementation for non-x64 systems (9961b86, 1020631, 8b960df, ef1d9fa, 8edd859, 39edcf6, 3e0a0d9, 1dff625, 8661958)
  • Fixed handling on inf and -inf values in eltwise log algorithm (732cbdd, 3fd0f2e)
  • Improved depthwise convolution performance on GPUs with Xe-HPG IP (7a6fe1d)
  • Addressed fails in test_isa_hints gtest on GPUs (78c1c68)
  • Fixed issues with bfloat16 GEMM producing NaNs in certain cases on GPUs with Xe-HPC IP (5d65970)
  • Changed default layout to blocked for depthwise convolutions to avoid spurious reorders (78f231b)
  • Addressed issue with incorrect values in padded areas for convolution with post-ops on GPUs (2e4ad3a)
  • Fixed build issues with -Werror=odr option (27668dd)
  • Addressed issues detected by clang USAN in BRGEMM kernel (2bbaa30, 9b3826f, b59b027)

graph-v0.5.1

28 Jun 16:48
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graph-v0.5.1 Pre-release
Pre-release

This is a patch release containing the following changes to graph-v0.5:

  • Fixed the layout propagation of Reshape and Transpose operators in oneDNN backend (3b681d4, 09863f9)
  • Enabled scalar Divide + MatMul fusion in oneDNN backend (d4c7dc6)
  • Enabled Convolution + LeakyReLU fusion in oneDNN backend (b0f4dbb, c8fb4c1, e15979e)
  • Improved the document of fusion patterns (b9a5238)
  • Fixed operands swapping for binary operators (a07bfda, d2567d7)
  • Worked around a false positive build issue in GCC11 for compiler backend (17a40d0)

graph-v0.4.3

03 May 18:32
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graph-v0.4.3 Pre-release
Pre-release

This is a patch release containing the following changes to graph-v0.4.2:

  • Upgraded to oneDNN v2.5.4 patch release (3418ec1)
  • Fixed compiler backend to build with downstream projects when LLVM is used (c73dd85)
  • Fixed the layout propagation of Reshape and Transpose operators in oneDNN backend (cbdb736)

graph-v0.5

01 Apr 22:30
888a87a
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graph-v0.5 Pre-release
Pre-release

This is the Alpha release for oneDNN Graph API based on oneDNN v2.6 release.

Functionality

  • Introduced FP32 and BF16 training support on CPU.

  • Introduced multiple layer perceptron (MLP) fusion supported by oneDNN Graph compiler with optimized code generation (experimental).

  • Updated API to comply with oneDNN Graph API specification v1.0-alpha.

Known Issues and Limitations

  • The weight’s opaque layout can be queried only from a compiled partition, which requires that input tensor shapes must be known at compilation time.

  • MHA and MLP fusion are not activated on machines without AVX-512 support, as oneDNN Graph compiler generates AVX-512 and newer instructions.

Thanks to the Contributors

This release contains contributions from the project core teams as well as Jiong Gong, Chunyuan Wu, Sanchit Jain, Yiqiang Li, Yunfei Mao, Kiefer Kuah and others.

v2.6

29 Mar 21:57
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Performance Optimizations

  • Intel Architecture Processors
    • Improved performance for future Intel Xeon® Scalable processors (code name Sapphire Rapids). The functionality requires Linux kernel 5.16 or later.
    • Improved performance of matmul primitive for processors with Intel AVX-512 support.
  • Intel Graphics Products
    • Improved performance for future Xe Architecture graphics (code name Ponte Vecchio).
    • Improved performance for future Intel Arc graphics (code name Alchemist and DG2).
  • AArch64-based Processors
    • Improved binary primitive performance with Arm Compute Library (ACL).
    • Improved shuffle primitive performance for processors with SVE 512 support.

Functionality

  • Introduced bfloat16 destination support for int8 convolution, matmul and inner product primitives for processors with Intel AVX-512 support and or future Intel Xeon® Scalable processors (code name Sapphire Rapids)
  • Extended RNN primitive with support for AUGRU cell.
  • Added support for non-zero negative slope in ReLU post-op for batch normalization primitive.
  • Introduced support for mixed source and destination data types in softmax primitive.
  • Introduced persistent cache API. This functionality allows to serialize and reuse JIT kernels.

Usability

  • Added build time options to manage the set of supported instruction set architectures on Intel Graphics Products. See ONEDNN_ENABLE_PRIMITIVE_GPU_ISA for more details. This feature further reduces the binary footprint.
  • Extended built time options ONEDNN_ENABLE_PRIMITIVE and ONEDNN_ENABLE_WORKLOAD to GPU implementations. This feature further reduces the binary footprint.
  • Reduced stack consumption in GEMM implementation.
  • Added command line help to benchdnn.

Deprecated Functionality

  • Support for SYCL 1.2.1 (aka SYCL 2017 standard) is deprecated and will be removed in future releases.

Breaking Changes

  • Removed performance optimizations for Intel Xeon Phi processors. oneDNN will continue to be functional on these processors using Intel AVX2 codepath.

Thanks to the Contributors

This release contains contributions from the project core team as well as Arthur Mitrano @aaraujom, Aslan @aslanxie, Attila T. Áfra @atafra, Damian Szwichtenberg @dszwicht, Diana Bite @diaena, Joel Dippold @jedippold, Jonathan Deakin @jondea, Jonathan Louis Kaplan @JLouisKaplan-Arm, Kentaro Kawakami @kawakami-k, Luke Ireland @LukeIreland1, Mesut Meterelliyoz @mmeterel, Nathan John Sircombe @nSircombe, Peter Caday @petercad, Tengfei Han @Tengfei09, and Thiago Macieira @thiagomacieira. We would also like to thank everyone who asked questions and reported issues.