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pcm-latency write-ddr latency is wrong? #565
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thanks for reporting this. We will take a look with the developer |
Thanks. |
Hi @ZouTaooo, Thank you reporting this bug. Thank you |
I hava two quesitons:
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In Ice Lake micro architecture, the relevent event is below (come from some intel manual.):
I found the event of DRAM WPQ Occupany is incorrect. It should be 0x82. And the umask of rpq-occupancy should be zero, the umask of wpq-insert should be one.
The source code is below, in cpucounters.cpp.
Or I am wrong?
Please give a answer. Thank you!
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