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rtsx.c
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rtsx.c
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/*-
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
* Copyright (c) 2012 Stefan Sperling <stsp@openbsd.org>
* Copyright (c) 2020 Henri Hennebert <hlh@restart.be>
* Copyright (c) 2020 Gary Jennejohn <gj@freebsd.org>
* Copyright (c) 2020 Jesper Schmitz Mouridsen <jsm@FreeBSD.org>
* All rights reserved.
*
* Patch from:
* - Lutz Bichler <Lutz.Bichler@gmail.com>
*
* Base on OpenBSD /sys/dev/pci/rtsx_pci.c & /dev/ic/rtsx.c
* on Linux /drivers/mmc/host/rtsx_pci_sdmmc.c,
* /include/linux/rtsx_pci.h &
* /drivers/misc/cardreader/rtsx_pcr.c
* on NetBSD /sys/dev/ic/rtsx.c
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/param.h>
#include <sys/module.h>
#include <sys/systm.h> /* For FreeBSD 11 */
#include <sys/types.h> /* For FreeBSD 11 */
#include <sys/errno.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/endian.h>
#include <machine/bus.h>
#include <sys/mutex.h>
#include <sys/malloc.h>
#include <sys/rman.h>
#include <sys/queue.h>
#include <sys/taskqueue.h>
#include <sys/sysctl.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/mmc/bridge.h>
#include <dev/mmc/mmcreg.h>
#include <dev/mmc/mmcbrvar.h>
#include <machine/_inttypes.h>
#include "opt_mmccam.h"
#ifdef MMCCAM
#include <cam/cam.h>
#include <cam/cam_ccb.h>
#include <cam/cam_debug.h>
#include <cam/cam_sim.h>
#include <cam/cam_xpt_sim.h>
#include <cam/mmc/mmc_sim.h>
#include "mmc_sim_if.h"
#endif /* MMCCAM */
#include "rtsxreg.h"
/* The softc holds our per-instance data. */
struct rtsx_softc {
struct mtx rtsx_mtx; /* device mutex */
device_t rtsx_dev; /* device */
uint16_t rtsx_flags; /* device flags */
uint16_t rtsx_device_id; /* device ID */
device_t rtsx_mmc_dev; /* device of mmc bus */
uint32_t rtsx_intr_enabled; /* enabled interrupts */
uint32_t rtsx_intr_status; /* soft interrupt status */
int rtsx_irq_res_id; /* bus IRQ resource id */
struct resource *rtsx_irq_res; /* bus IRQ resource */
void *rtsx_irq_cookie; /* bus IRQ resource cookie */
struct callout rtsx_timeout_callout; /* callout for timeout */
int rtsx_timeout_cmd; /* interrupt timeout for setup commands */
int rtsx_timeout_io; /* interrupt timeout for I/O commands */
void (*rtsx_intr_trans_ok)(struct rtsx_softc *sc);
/* function to call if transfer succeed */
void (*rtsx_intr_trans_ko)(struct rtsx_softc *sc);
/* function to call if transfer fail */
struct timeout_task
rtsx_card_insert_task; /* card insert delayed task */
struct task rtsx_card_remove_task; /* card remove task */
int rtsx_mem_res_id; /* bus memory resource id */
struct resource *rtsx_mem_res; /* bus memory resource */
bus_space_tag_t rtsx_mem_btag; /* host register set tag */
bus_space_handle_t rtsx_mem_bhandle; /* host register set handle */
bus_dma_tag_t rtsx_cmd_dma_tag; /* DMA tag for command transfer */
bus_dmamap_t rtsx_cmd_dmamap; /* DMA map for command transfer */
void *rtsx_cmd_dmamem; /* DMA mem for command transfer */
bus_addr_t rtsx_cmd_buffer; /* device visible address of the DMA segment */
int rtsx_cmd_index; /* index in rtsx_cmd_buffer */
bus_dma_tag_t rtsx_data_dma_tag; /* DMA tag for data transfer */
bus_dmamap_t rtsx_data_dmamap; /* DMA map for data transfer */
void *rtsx_data_dmamem; /* DMA mem for data transfer */
bus_addr_t rtsx_data_buffer; /* device visible address of the DMA segment */
#ifdef MMCCAM
union ccb *rtsx_ccb; /* CAM control block */
struct mmc_sim rtsx_mmc_sim; /* CAM generic sim */
struct mmc_request rtsx_cam_req; /* CAM MMC request */
#endif /* MMCCAM */
struct mmc_request *rtsx_req; /* MMC request */
struct mmc_host rtsx_host; /* host parameters */
int rtsx_pcie_cap; /* PCIe capability offset */
int8_t rtsx_bus_busy; /* bus busy status */
int8_t rtsx_ios_bus_width; /* current host.ios.bus_width */
int32_t rtsx_ios_clock; /* current host.ios.clock */
int8_t rtsx_ios_power_mode; /* current host.ios.power mode */
int8_t rtsx_ios_timing; /* current host.ios.timing */
int8_t rtsx_ios_vccq; /* current host.ios.vccq */
uint8_t rtsx_read_only; /* card read only status */
uint8_t rtsx_inversion; /* inversion of card detection and read only status */
uint8_t rtsx_force_timing; /* force bus_timing_uhs_sdr50 */
uint8_t rtsx_debug_mask; /* debugging mask */
#define RTSX_DEBUG_BASIC 0x01 /* debug basic flow */
#define RTSX_TRACE_SD_CMD 0x02 /* trace SD commands */
#define RTSX_DEBUG_TUNING 0x04 /* debug tuning */
#ifdef MMCCAM
uint8_t rtsx_cam_status; /* CAM status - 1 if card in use */
#endif /* MMCCAM */
uint64_t rtsx_read_count; /* count of read operations */
uint64_t rtsx_write_count; /* count of write operations */
bool rtsx_discovery_mode; /* are we in discovery mode? */
bool rtsx_tuning_mode; /* are we tuning */
bool rtsx_double_clk; /* double clock freqency */
bool rtsx_vpclk; /* voltage at Pulse-width Modulation(PWM) clock? */
uint8_t rtsx_ssc_depth; /* Spread spectrum clocking depth */
uint8_t rtsx_card_drive_sel; /* value for RTSX_CARD_DRIVE_SEL */
uint8_t rtsx_sd30_drive_sel_3v3;/* value for RTSX_SD30_DRIVE_SEL */
};
/* rtsx_flags values */
#define RTSX_F_DEFAULT 0x0000
#define RTSX_F_CARD_PRESENT 0x0001
#define RTSX_F_SDIO_SUPPORT 0x0002
#define RTSX_F_VERSION_A 0x0004
#define RTSX_F_VERSION_B 0x0008
#define RTSX_F_VERSION_C 0x0010
#define RTSX_F_VERSION_D 0x0020
#define RTSX_F_8411B_QFN48 0x0040
#define RTSX_F_REVERSE_SOCKET 0x0080
#define RTSX_REALTEK 0x10ec
#define RTSX_RTS5209 0x5209
#define RTSX_RTS5227 0x5227
#define RTSX_RTS5229 0x5229
#define RTSX_RTS522A 0x522a
#define RTSX_RTS525A 0x525a
#define RTSX_RTS5249 0x5249
#define RTSX_RTS5260 0x5260
#define RTSX_RTL8402 0x5286
#define RTSX_RTL8411 0x5289
#define RTSX_RTL8411B 0x5287
#define RTSX_VERSION "2.1g"
static const struct rtsx_pciids {
uint16_t device_id;
const char *desc;
} rtsx_ids[] = {
{ RTSX_RTS5209, RTSX_VERSION " Realtek RTS5209 PCIe SD Card Reader" },
{ RTSX_RTS5227, RTSX_VERSION " Realtek RTS5227 PCIe SD Card Reader" },
{ RTSX_RTS5229, RTSX_VERSION " Realtek RTS5229 PCIe SD Card Reader" },
{ RTSX_RTS522A, RTSX_VERSION " Realtek RTS522A PCIe SD Card Reader" },
{ RTSX_RTS525A, RTSX_VERSION " Realtek RTS525A PCIe SD Card Reader" },
{ RTSX_RTS5249, RTSX_VERSION " Realtek RTS5249 PCIe SD Card Reader" },
{ RTSX_RTS5260, RTSX_VERSION " Realtek RTS5260 PCIe SD Card Reader" },
{ RTSX_RTL8402, RTSX_VERSION " Realtek RTL8402 PCIe SD Card Reader" },
{ RTSX_RTL8411, RTSX_VERSION " Realtek RTL8411 PCIe SD Card Reader" },
{ RTSX_RTL8411B, RTSX_VERSION " Realtek RTL8411B PCIe SD Card Reader" },
};
/* See `kenv | grep smbios.system` */
static const struct rtsx_inversion_model {
char *maker;
char *family;
char *product;
} rtsx_inversion_models[] = {
{ "LENOVO", "ThinkPad T470p", "20J7S0PM00"},
{ "LENOVO", "ThinkPad X13 Gen 1", "20UF000QRT"},
{ NULL, NULL, NULL}
};
static int rtsx_dma_alloc(struct rtsx_softc *sc);
static void rtsx_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error);
static void rtsx_dma_free(struct rtsx_softc *sc);
static void rtsx_intr(void *arg);
static void rtsx_handle_card_present(struct rtsx_softc *sc);
static void rtsx_card_task(void *arg, int pending __unused);
static bool rtsx_is_card_present(struct rtsx_softc *sc);
static int rtsx_init(struct rtsx_softc *sc);
static int rtsx_map_sd_drive(int index);
static int rtsx_rts5227_fill_driving(struct rtsx_softc *sc);
static int rtsx_rts5249_fill_driving(struct rtsx_softc *sc);
static int rtsx_rts5260_fill_driving(struct rtsx_softc *sc);
static int rtsx_read(struct rtsx_softc *, uint16_t, uint8_t *);
static int rtsx_read_cfg(struct rtsx_softc *sc, uint8_t func, uint16_t addr, uint32_t *val);
static int rtsx_write(struct rtsx_softc *sc, uint16_t addr, uint8_t mask, uint8_t val);
static int rtsx_read_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t *val);
static int rtsx_write_phy(struct rtsx_softc *sc, uint8_t addr, uint16_t val);
static int rtsx_bus_power_off(struct rtsx_softc *sc);
static int rtsx_bus_power_on(struct rtsx_softc *sc);
static int rtsx_set_bus_width(struct rtsx_softc *sc, enum mmc_bus_width width);
static int rtsx_set_sd_timing(struct rtsx_softc *sc, enum mmc_bus_timing timing);
static int rtsx_set_sd_clock(struct rtsx_softc *sc, uint32_t freq);
static int rtsx_stop_sd_clock(struct rtsx_softc *sc);
static int rtsx_switch_sd_clock(struct rtsx_softc *sc, uint8_t clk, uint8_t n, uint8_t div, uint8_t mcu);
#ifndef MMCCAM
static void rtsx_sd_change_tx_phase(struct rtsx_softc *sc, uint8_t sample_point);
static void rtsx_sd_change_rx_phase(struct rtsx_softc *sc, uint8_t sample_point);
static void rtsx_sd_tuning_rx_phase(struct rtsx_softc *sc, uint32_t *phase_map);
static int rtsx_sd_tuning_rx_cmd(struct rtsx_softc *sc, uint8_t sample_point);
static int rtsx_sd_tuning_rx_cmd_wait(struct rtsx_softc *sc, struct mmc_command *cmd);
static void rtsx_sd_tuning_rx_cmd_wakeup(struct rtsx_softc *sc);
static void rtsx_sd_wait_data_idle(struct rtsx_softc *sc);
static uint8_t rtsx_sd_search_final_rx_phase(struct rtsx_softc *sc, uint32_t phase_map);
static int rtsx_sd_get_rx_phase_len(uint32_t phase_map, int start_bit);
#endif /* !MMCCAM */
#if 0 /* For led */
static int rtsx_led_enable(struct rtsx_softc *sc);
static int rtsx_led_disable(struct rtsx_softc *sc);
#endif /* For led */
static uint8_t rtsx_response_type(uint16_t mmc_rsp);
static void rtsx_init_cmd(struct rtsx_softc *sc, struct mmc_command *cmd);
static void rtsx_push_cmd(struct rtsx_softc *sc, uint8_t cmd, uint16_t reg,
uint8_t mask, uint8_t data);
static void rtsx_set_cmd_data_len(struct rtsx_softc *sc, uint16_t block_cnt, uint16_t byte_cnt);
static void rtsx_send_cmd(struct rtsx_softc *sc);
static void rtsx_ret_resp(struct rtsx_softc *sc);
static void rtsx_set_resp(struct rtsx_softc *sc, struct mmc_command *cmd);
static void rtsx_stop_cmd(struct rtsx_softc *sc);
static void rtsx_clear_error(struct rtsx_softc *sc);
static void rtsx_req_done(struct rtsx_softc *sc);
static int rtsx_send_req(struct rtsx_softc *sc, struct mmc_command *cmd);
static int rtsx_xfer_short(struct rtsx_softc *sc, struct mmc_command *cmd);
static void rtsx_ask_ppbuf_part1(struct rtsx_softc *sc);
static void rtsx_get_ppbuf_part1(struct rtsx_softc *sc);
static void rtsx_get_ppbuf_part2(struct rtsx_softc *sc);
static void rtsx_put_ppbuf_part1(struct rtsx_softc *sc);
static void rtsx_put_ppbuf_part2(struct rtsx_softc *sc);
static void rtsx_write_ppbuf(struct rtsx_softc *sc);
static int rtsx_xfer(struct rtsx_softc *sc, struct mmc_command *cmd);
static void rtsx_xfer_begin(struct rtsx_softc *sc);
static void rtsx_xfer_start(struct rtsx_softc *sc);
static void rtsx_xfer_finish(struct rtsx_softc *sc);
static void rtsx_timeout(void *arg);
#ifdef MMCCAM
static int rtsx_get_tran_settings(device_t dev, struct ccb_trans_settings_mmc *cts);
static int rtsx_set_tran_settings(device_t dev, struct ccb_trans_settings_mmc *cts);
static int rtsx_cam_request(device_t dev, union ccb *ccb);
#endif /* MMCCAM */
static int rtsx_read_ivar(device_t bus, device_t child, int which, uintptr_t *result);
static int rtsx_write_ivar(device_t bus, device_t child, int which, uintptr_t value);
static int rtsx_mmcbr_update_ios(device_t bus, device_t child __unused);
static int rtsx_mmcbr_switch_vccq(device_t bus, device_t child __unused);
static int rtsx_mmcbr_request(device_t bus, device_t child __unused, struct mmc_request *req);
#ifndef MMCCAM
static int rtsx_mmcbr_tune(device_t bus, device_t child __unused, bool hs400 __unused);
static int rtsx_mmcbr_retune(device_t bus, device_t child __unused, bool reset __unused);
static int rtsx_mmcbr_get_ro(device_t bus, device_t child __unused);
static int rtsx_mmcbr_acquire_host(device_t bus, device_t child __unused);
static int rtsx_mmcbr_release_host(device_t bus, device_t child __unused);
#endif /* !MMCCAM */
static int rtsx_probe(device_t dev);
static int rtsx_attach(device_t dev);
static int rtsx_detach(device_t dev);
static int rtsx_shutdown(device_t dev);
static int rtsx_suspend(device_t dev);
static int rtsx_resume(device_t dev);
#define RTSX_LOCK_INIT(_sc) mtx_init(&(_sc)->rtsx_mtx, \
device_get_nameunit(sc->rtsx_dev), "rtsx", MTX_DEF)
#define RTSX_LOCK(_sc) mtx_lock(&(_sc)->rtsx_mtx)
#define RTSX_UNLOCK(_sc) mtx_unlock(&(_sc)->rtsx_mtx)
#define RTSX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rtsx_mtx)
#define RTSX_SDCLK_OFF 0
#define RTSX_SDCLK_250KHZ 250000
#define RTSX_SDCLK_400KHZ 400000
#define RTSX_SDCLK_25MHZ 25000000
#define RTSX_SDCLK_50MHZ 50000000
#define RTSX_SDCLK_100MHZ 100000000
#define RTSX_SDCLK_208MHZ 208000000
#define RTSX_MIN_DIV_N 80
#define RTSX_MAX_DIV_N 208
#define RTSX_MAX_DATA_BLKLEN 512
#define RTSX_DMA_ALIGN 4
#define RTSX_HOSTCMD_MAX 256
#define RTSX_DMA_CMD_BIFSIZE (sizeof(uint32_t) * RTSX_HOSTCMD_MAX)
#define RTSX_DMA_DATA_BUFSIZE maxphys
#define ISSET(t, f) ((t) & (f))
#define READ4(sc, reg) \
(bus_space_read_4((sc)->rtsx_mem_btag, (sc)->rtsx_mem_bhandle, (reg)))
#define WRITE4(sc, reg, val) \
(bus_space_write_4((sc)->rtsx_mem_btag, (sc)->rtsx_mem_bhandle, (reg), (val)))
#define RTSX_READ(sc, reg, val) \
do { \
int err = rtsx_read((sc), (reg), (val)); \
if (err) \
return (err); \
} while (0)
#define RTSX_WRITE(sc, reg, val) \
do { \
int err = rtsx_write((sc), (reg), 0xff, (val)); \
if (err) \
return (err); \
} while (0)
#define RTSX_CLR(sc, reg, bits) \
do { \
int err = rtsx_write((sc), (reg), (bits), 0); \
if (err) \
return (err); \
} while (0)
#define RTSX_SET(sc, reg, bits) \
do { \
int err = rtsx_write((sc), (reg), (bits), 0xff);\
if (err) \
return (err); \
} while (0)
#define RTSX_BITOP(sc, reg, mask, bits) \
do { \
int err = rtsx_write((sc), (reg), (mask), (bits)); \
if (err) \
return (err); \
} while (0)
/*
* We use two DMA buffers: a command buffer and a data buffer.
*
* The command buffer contains a command queue for the host controller,
* which describes SD/MMC commands to run, and other parameters. The chip
* runs the command queue when a special bit in the RTSX_HCBAR register is
* set and signals completion with the RTSX_TRANS_OK_INT interrupt.
* Each command is encoded as a 4 bytes sequence containing command number
* (read, write, or check a host controller register), a register address,
* and a data bit-mask and value.
* SD/MMC commands which do not transfer any data from/to the card only use
* the command buffer.
*
* The data buffer is used for transfer longer than 512. Data transfer is
* controlled via the RTSX_HDBAR register and completion is signalled by
* the RTSX_TRANS_OK_INT interrupt.
*
* The chip is unable to perform DMA above 4GB.
*/
/*
* Main commands in the usual seqence used:
*
* CMD0 Go idle state
* CMD8 Send interface condition
* CMD55 Application Command for next ACMD
* ACMD41 Send Operation Conditions Register (OCR: voltage profile of the card)
* CMD2 Send Card Identification (CID) Register
* CMD3 Send relative address
* CMD9 Send Card Specific Data (CSD)
* CMD13 Send status (32 bits - bit 25: card password protected)
* CMD7 Select card (before Get card SCR)
* ACMD51 Send SCR (SD CARD Configuration Register - [51:48]: Bus widths supported)
* CMD6 SD switch function
* ACMD13 Send SD status (512 bits)
* ACMD42 Set/Clear card detect
* ACMD6 Set bus width
* CMD19 Send tuning block
* CMD12 Stop transmission
*
* CMD17 Read single block (<=512)
* CMD18 Read multiple blocks (>512)
* CMD24 Write single block (<=512)
* CMD25 Write multiple blocks (>512)
*
* CMD52 IO R/W direct
* CMD5 Send Operation Conditions
*/
static int
rtsx_dma_alloc(struct rtsx_softc *sc)
{
int error = 0;
error = bus_dma_tag_create(bus_get_dma_tag(sc->rtsx_dev), /* inherit from parent */
RTSX_DMA_ALIGN, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
RTSX_DMA_CMD_BIFSIZE, 1, /* maxsize, nsegments */
RTSX_DMA_CMD_BIFSIZE, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->rtsx_cmd_dma_tag);
if (error) {
device_printf(sc->rtsx_dev,
"Can't create cmd parent DMA tag\n");
return (error);
}
error = bus_dmamem_alloc(sc->rtsx_cmd_dma_tag, /* DMA tag */
&sc->rtsx_cmd_dmamem, /* will hold the KVA pointer */
BUS_DMA_COHERENT | BUS_DMA_WAITOK | BUS_DMA_ZERO, /* flags */
&sc->rtsx_cmd_dmamap); /* DMA map */
if (error) {
device_printf(sc->rtsx_dev,
"Can't create DMA map for command transfer\n");
goto destroy_cmd_dma_tag;
}
error = bus_dmamap_load(sc->rtsx_cmd_dma_tag, /* DMA tag */
sc->rtsx_cmd_dmamap, /* DMA map */
sc->rtsx_cmd_dmamem, /* KVA pointer to be mapped */
RTSX_DMA_CMD_BIFSIZE, /* size of buffer */
rtsx_dmamap_cb, /* callback */
&sc->rtsx_cmd_buffer, /* first arg of callback */
0); /* flags */
if (error || sc->rtsx_cmd_buffer == 0) {
device_printf(sc->rtsx_dev,
"Can't load DMA memory for command transfer\n");
error = (error) ? error : EFAULT;
goto destroy_cmd_dmamem_alloc;
}
error = bus_dma_tag_create(bus_get_dma_tag(sc->rtsx_dev), /* inherit from parent */
RTSX_DMA_DATA_BUFSIZE, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
RTSX_DMA_DATA_BUFSIZE, 1, /* maxsize, nsegments */
RTSX_DMA_DATA_BUFSIZE, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->rtsx_data_dma_tag);
if (error) {
device_printf(sc->rtsx_dev,
"Can't create data parent DMA tag\n");
goto destroy_cmd_dmamap_load;
}
error = bus_dmamem_alloc(sc->rtsx_data_dma_tag, /* DMA tag */
&sc->rtsx_data_dmamem, /* will hold the KVA pointer */
BUS_DMA_WAITOK | BUS_DMA_ZERO, /* flags */
&sc->rtsx_data_dmamap); /* DMA map */
if (error) {
device_printf(sc->rtsx_dev,
"Can't create DMA map for data transfer\n");
goto destroy_data_dma_tag;
}
error = bus_dmamap_load(sc->rtsx_data_dma_tag, /* DMA tag */
sc->rtsx_data_dmamap, /* DMA map */
sc->rtsx_data_dmamem, /* KVA pointer to be mapped */
RTSX_DMA_DATA_BUFSIZE, /* size of buffer */
rtsx_dmamap_cb, /* callback */
&sc->rtsx_data_buffer, /* first arg of callback */
0); /* flags */
if (error || sc->rtsx_data_buffer == 0) {
device_printf(sc->rtsx_dev,
"Can't load DMA memory for data transfer\n");
error = (error) ? error : EFAULT;
goto destroy_data_dmamem_alloc;
}
return (error);
destroy_data_dmamem_alloc:
bus_dmamem_free(sc->rtsx_data_dma_tag, sc->rtsx_data_dmamem, sc->rtsx_data_dmamap);
destroy_data_dma_tag:
bus_dma_tag_destroy(sc->rtsx_data_dma_tag);
destroy_cmd_dmamap_load:
bus_dmamap_unload(sc->rtsx_cmd_dma_tag, sc->rtsx_cmd_dmamap);
destroy_cmd_dmamem_alloc:
bus_dmamem_free(sc->rtsx_cmd_dma_tag, sc->rtsx_cmd_dmamem, sc->rtsx_cmd_dmamap);
destroy_cmd_dma_tag:
bus_dma_tag_destroy(sc->rtsx_cmd_dma_tag);
return (error);
}
static void
rtsx_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
{
if (error) {
printf("rtsx_dmamap_cb: error %d\n", error);
return;
}
*(bus_addr_t *)arg = segs[0].ds_addr;
}
static void
rtsx_dma_free(struct rtsx_softc *sc)
{
if (sc->rtsx_cmd_dma_tag != NULL) {
if (sc->rtsx_cmd_dmamap != NULL)
bus_dmamap_unload(sc->rtsx_cmd_dma_tag,
sc->rtsx_cmd_dmamap);
if (sc->rtsx_cmd_dmamem != NULL)
bus_dmamem_free(sc->rtsx_cmd_dma_tag,
sc->rtsx_cmd_dmamem,
sc->rtsx_cmd_dmamap);
sc->rtsx_cmd_dmamap = NULL;
sc->rtsx_cmd_dmamem = NULL;
sc->rtsx_cmd_buffer = 0;
bus_dma_tag_destroy(sc->rtsx_cmd_dma_tag);
sc->rtsx_cmd_dma_tag = NULL;
}
if (sc->rtsx_data_dma_tag != NULL) {
if (sc->rtsx_data_dmamap != NULL)
bus_dmamap_unload(sc->rtsx_data_dma_tag,
sc->rtsx_data_dmamap);
if (sc->rtsx_data_dmamem != NULL)
bus_dmamem_free(sc->rtsx_data_dma_tag,
sc->rtsx_data_dmamem,
sc->rtsx_data_dmamap);
sc->rtsx_data_dmamap = NULL;
sc->rtsx_data_dmamem = NULL;
sc->rtsx_data_buffer = 0;
bus_dma_tag_destroy(sc->rtsx_data_dma_tag);
sc->rtsx_data_dma_tag = NULL;
}
}
static void
rtsx_intr(void *arg)
{
struct rtsx_softc *sc = arg;
uint32_t enabled;
uint32_t status;
RTSX_LOCK(sc);
enabled = sc->rtsx_intr_enabled;
status = READ4(sc, RTSX_BIPR); /* read Bus Interrupt Pending Register */
sc->rtsx_intr_status = status;
if (sc->rtsx_debug_mask & RTSX_TRACE_SD_CMD)
device_printf(sc->rtsx_dev, "Interrupt handler - enabled: 0x%08x, status: 0x%08x\n", enabled, status);
/* Ack interrupts. */
WRITE4(sc, RTSX_BIPR, status);
if (((enabled & status) == 0) || status == 0xffffffff) {
device_printf(sc->rtsx_dev, "Spurious interrupt - enabled: 0x%08x, status: 0x%08x\n", enabled, status);
RTSX_UNLOCK(sc);
return;
}
/* Detect write protect. */
if (status & RTSX_SD_WRITE_PROTECT)
sc->rtsx_read_only = 1;
else
sc->rtsx_read_only = 0;
/* Start task to handle SD card status change (from dwmmc.c). */
if (status & RTSX_SD_INT) {
device_printf(sc->rtsx_dev, "Interrupt card inserted/removed\n");
rtsx_handle_card_present(sc);
}
if (sc->rtsx_req == NULL) {
RTSX_UNLOCK(sc);
return;
}
if (status & RTSX_TRANS_OK_INT) {
sc->rtsx_req->cmd->error = MMC_ERR_NONE;
if (sc->rtsx_intr_trans_ok != NULL)
sc->rtsx_intr_trans_ok(sc);
} else if (status & RTSX_TRANS_FAIL_INT) {
uint8_t stat1;
sc->rtsx_req->cmd->error = MMC_ERR_FAILED;
if (rtsx_read(sc, RTSX_SD_STAT1, &stat1) == 0 &&
(stat1 & RTSX_SD_CRC_ERR)) {
device_printf(sc->rtsx_dev, "CRC error\n");
sc->rtsx_req->cmd->error = MMC_ERR_BADCRC;
}
if (!sc->rtsx_tuning_mode)
device_printf(sc->rtsx_dev, "Transfer fail - status: 0x%08x\n", status);
rtsx_stop_cmd(sc);
if (sc->rtsx_intr_trans_ko != NULL)
sc->rtsx_intr_trans_ko(sc);
}
RTSX_UNLOCK(sc);
}
/*
* Function called from the IRQ handler (from dwmmc.c).
*/
static void
rtsx_handle_card_present(struct rtsx_softc *sc)
{
bool was_present;
bool is_present;
#ifdef MMCCAM
was_present = sc->rtsx_cam_status;
#else /* !MMCCAM */
was_present = sc->rtsx_mmc_dev != NULL;
#endif /* MMCCAM */
is_present = rtsx_is_card_present(sc);
if (is_present)
device_printf(sc->rtsx_dev, "Card present\n");
else
device_printf(sc->rtsx_dev, "Card absent\n");
if (!was_present && is_present) {
/*
* The delay is to debounce the card insert
* (sometimes the card detect pin stabilizes
* before the other pins have made good contact).
*/
taskqueue_enqueue_timeout(taskqueue_swi_giant,
&sc->rtsx_card_insert_task, -hz);
} else if (was_present && !is_present) {
taskqueue_enqueue(taskqueue_swi_giant, &sc->rtsx_card_remove_task);
}
}
/*
* This function is called at startup.
*/
static void
rtsx_card_task(void *arg, int pending __unused)
{
struct rtsx_softc *sc = arg;
if (rtsx_is_card_present(sc)) {
sc->rtsx_flags |= RTSX_F_CARD_PRESENT;
/* Card is present, attach if necessary. */
#ifdef MMCCAM
if (sc->rtsx_cam_status == 0) {
#else /* !MMCCAM */
if (sc->rtsx_mmc_dev == NULL) {
#endif /* MMCCAM */
if (sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "Card inserted\n");
sc->rtsx_read_count = sc->rtsx_write_count = 0;
#ifdef MMCCAM
sc->rtsx_cam_status = 1;
mmc_cam_sim_discover(&sc->rtsx_mmc_sim);
#else /* !MMCCAM */
RTSX_LOCK(sc);
sc->rtsx_mmc_dev = device_add_child(sc->rtsx_dev, "mmc", -1);
RTSX_UNLOCK(sc);
if (sc->rtsx_mmc_dev == NULL) {
device_printf(sc->rtsx_dev, "Adding MMC bus failed\n");
} else {
device_set_ivars(sc->rtsx_mmc_dev, sc);
device_probe_and_attach(sc->rtsx_mmc_dev);
}
#endif /* MMCCAM */
}
} else {
sc->rtsx_flags &= ~RTSX_F_CARD_PRESENT;
/* Card isn't present, detach if necessary. */
#ifdef MMCCAM
if (sc->rtsx_cam_status != 0) {
#else /* !MMCCAM */
if (sc->rtsx_mmc_dev != NULL) {
#endif /* MMCCAM */
if (sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "Card removed\n");
if (sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "Read count: %" PRIu64 ", write count: %" PRIu64 "\n",
sc->rtsx_read_count, sc->rtsx_write_count);
#ifdef MMCCAM
sc->rtsx_cam_status = 0;
mmc_cam_sim_discover(&sc->rtsx_mmc_sim);
#else /* !MMCCAM */
if (device_delete_child(sc->rtsx_dev, sc->rtsx_mmc_dev))
device_printf(sc->rtsx_dev, "Detaching MMC bus failed\n");
sc->rtsx_mmc_dev = NULL;
#endif /* MMCCAM */
}
}
}
static bool
rtsx_is_card_present(struct rtsx_softc *sc)
{
uint32_t status;
status = READ4(sc, RTSX_BIPR);
if (sc->rtsx_inversion == 0)
return (status & RTSX_SD_EXIST);
else
return !(status & RTSX_SD_EXIST);
}
static int
rtsx_init(struct rtsx_softc *sc)
{
uint8_t version;
uint8_t val;
int error;
sc->rtsx_host.host_ocr = RTSX_SUPPORTED_VOLTAGE;
sc->rtsx_host.f_min = RTSX_SDCLK_250KHZ;
sc->rtsx_host.f_max = RTSX_SDCLK_208MHZ;
sc->rtsx_host.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED |
MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25;
sc->rtsx_host.caps |= MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104;
if (sc->rtsx_device_id == RTSX_RTS5209)
sc->rtsx_host.caps |= MMC_CAP_8_BIT_DATA;
pci_find_cap(sc->rtsx_dev, PCIY_EXPRESS, &(sc->rtsx_pcie_cap));
/*
* Check IC version.
*/
switch (sc->rtsx_device_id) {
case RTSX_RTS5229:
/* Read IC version from dummy register. */
RTSX_READ(sc, RTSX_DUMMY_REG, &version);
if ((version & 0x0F) == RTSX_IC_VERSION_C)
sc->rtsx_flags |= RTSX_F_VERSION_C;
break;
case RTSX_RTS522A:
/* Read IC version from dummy register. */
RTSX_READ(sc, RTSX_DUMMY_REG, &version);
if ((version & 0x0F) == RTSX_IC_VERSION_A)
sc->rtsx_flags |= RTSX_F_VERSION_A;
break;
case RTSX_RTS525A:
/* Read IC version from dummy register. */
RTSX_READ(sc, RTSX_DUMMY_REG, &version);
if ((version & 0x0F) == RTSX_IC_VERSION_A)
sc->rtsx_flags |= RTSX_F_VERSION_A;
break;
case RTSX_RTL8411B:
RTSX_READ(sc, RTSX_RTL8411B_PACKAGE, &version);
if (version & RTSX_RTL8411B_QFN48)
sc->rtsx_flags |= RTSX_F_8411B_QFN48;
break;
}
/*
* Fetch vendor settings.
*/
/*
* Normally OEMs will set vendor setting to the config space
* of Realtek card reader in BIOS stage. This statement reads
* the setting and configure the internal registers according
* to it, to improve card reader's compatibility condition.
*/
sc->rtsx_card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
switch (sc->rtsx_device_id) {
uint32_t reg;
uint32_t reg1;
uint8_t reg3;
case RTSX_RTS5209:
sc->rtsx_card_drive_sel = RTSX_RTS5209_CARD_DRIVE_DEFAULT;
sc->rtsx_sd30_drive_sel_3v3 = RTSX_DRIVER_TYPE_D;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG2, 4);
if (!(reg & 0x80)) {
sc->rtsx_card_drive_sel = (reg >> 8) & 0x3F;
sc->rtsx_sd30_drive_sel_3v3 = reg & 0x07;
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg: 0x%08x\n", reg);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "card_drive_sel: 0x%02x, sd30_drive_sel_3v3: 0x%02x\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
break;
case RTSX_RTS5227:
case RTSX_RTS522A:
sc->rtsx_sd30_drive_sel_3v3 = RTSX_CFG_DRIVER_TYPE_B;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG1, 4);
if (!(reg & 0x1000000)) {
sc->rtsx_card_drive_sel &= 0x3F;
sc->rtsx_card_drive_sel |= ((reg >> 25) & 0x01) << 6;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG2, 4);
sc->rtsx_sd30_drive_sel_3v3 = (reg >> 5) & 0x03;
if (reg & 0x4000)
sc->rtsx_flags |= RTSX_F_REVERSE_SOCKET;
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg: 0x%08x\n", reg);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev,
"card_drive_sel: 0x%02x, sd30_drive_sel_3v3: 0x%02x, reverse_socket is %s\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3,
(sc->rtsx_flags & RTSX_F_REVERSE_SOCKET) ? "true" : "false");
break;
case RTSX_RTS5229:
sc->rtsx_sd30_drive_sel_3v3 = RTSX_DRIVER_TYPE_D;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG1, 4);
if (!(reg & 0x1000000)) {
sc->rtsx_card_drive_sel &= 0x3F;
sc->rtsx_card_drive_sel |= ((reg >> 25) & 0x01) << 6;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG2, 4);
sc->rtsx_sd30_drive_sel_3v3 = rtsx_map_sd_drive((reg >> 5) & 0x03);
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg: 0x%08x\n", reg);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "card_drive_sel: 0x%02x, sd30_drive_sel_3v3: 0x%02x\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
break;
case RTSX_RTS525A:
case RTSX_RTS5249:
case RTSX_RTS5260:
sc->rtsx_sd30_drive_sel_3v3 = RTSX_CFG_DRIVER_TYPE_B;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG1, 4);
if ((reg & 0x1000000)) {
sc->rtsx_card_drive_sel &= 0x3F;
sc->rtsx_card_drive_sel |= ((reg >> 25) & 0x01) << 6;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG2, 4);
sc->rtsx_sd30_drive_sel_3v3 = (reg >> 5) & 0x03;
if (reg & 0x4000)
sc->rtsx_flags |= RTSX_F_REVERSE_SOCKET;
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg: 0x%08x\n", reg);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev,
"card_drive_sel = 0x%02x, sd30_drive_sel_3v3: 0x%02x, reverse_socket is %s\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3,
(sc->rtsx_flags & RTSX_F_REVERSE_SOCKET) ? "true" : "false");
break;
case RTSX_RTL8402:
case RTSX_RTL8411:
sc->rtsx_card_drive_sel = RTSX_RTL8411_CARD_DRIVE_DEFAULT;
sc->rtsx_sd30_drive_sel_3v3 = RTSX_DRIVER_TYPE_D;
reg1 = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG1, 4);
if (reg1 & 0x1000000) {
sc->rtsx_card_drive_sel &= 0x3F;
sc->rtsx_card_drive_sel |= ((reg1 >> 25) & 0x01) << 6;
reg3 = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG3, 1);
sc->rtsx_sd30_drive_sel_3v3 = (reg3 >> 5) & 0x07;
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg1: 0x%08x\n", reg1);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev,
"card_drive_sel: 0x%02x, sd30_drive_sel_3v3: 0x%02x\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
break;
case RTSX_RTL8411B:
sc->rtsx_card_drive_sel = RTSX_RTL8411_CARD_DRIVE_DEFAULT;
sc->rtsx_sd30_drive_sel_3v3 = RTSX_DRIVER_TYPE_D;
reg = pci_read_config(sc->rtsx_dev, RTSX_PCR_SETTING_REG1, 4);
if (!(reg & 0x1000000)) {
sc->rtsx_sd30_drive_sel_3v3 = rtsx_map_sd_drive(reg & 0x03);
} else if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC) {
device_printf(sc->rtsx_dev, "pci_read_config() error - reg: 0x%08x\n", reg);
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev,
"card_drive_sel: 0x%02x, sd30_drive_sel_3v3: 0x%02x\n",
sc->rtsx_card_drive_sel, sc->rtsx_sd30_drive_sel_3v3);
break;
}
if (bootverbose || sc->rtsx_debug_mask & RTSX_DEBUG_BASIC)
device_printf(sc->rtsx_dev, "rtsx_init() rtsx_flags: 0x%04x\n", sc->rtsx_flags);
/* Enable interrupts. */
sc->rtsx_intr_enabled = RTSX_TRANS_OK_INT_EN | RTSX_TRANS_FAIL_INT_EN | RTSX_SD_INT_EN;
WRITE4(sc, RTSX_BIER, sc->rtsx_intr_enabled);
/* Power on SSC clock. */
RTSX_CLR(sc, RTSX_FPDCTL, RTSX_SSC_POWER_DOWN);
/* Wait SSC power stable. */
DELAY(200);
/* Disable ASPM */
val = pci_read_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL, 1);
pci_write_config(sc->rtsx_dev, sc->rtsx_pcie_cap + PCIER_LINK_CTL, val & 0xfc, 1);
/*
* Optimize phy.
*/
switch (sc->rtsx_device_id) {
case RTSX_RTS5209:
/* Some magic numbers from Linux driver. */
if ((error = rtsx_write_phy(sc, 0x00, 0xB966)))
return (error);
break;
case RTSX_RTS5227:
RTSX_CLR(sc, RTSX_PM_CTRL3, RTSX_D3_DELINK_MODE_EN);
/* Optimize RX sensitivity. */
if ((error = rtsx_write_phy(sc, 0x00, 0xBA42)))
return (error);
break;
case RTSX_RTS5229:
/* Optimize RX sensitivity. */
if ((error = rtsx_write_phy(sc, 0x00, 0xBA42)))
return (error);
break;
case RTSX_RTS522A:
RTSX_CLR(sc, RTSX_RTS522A_PM_CTRL3, RTSX_D3_DELINK_MODE_EN);
if (sc->rtsx_flags & RTSX_F_VERSION_A) {
if ((error = rtsx_write_phy(sc, RTSX_PHY_RCR2, RTSX_PHY_RCR2_INIT_27S)))
return (error);
}
if ((error = rtsx_write_phy(sc, RTSX_PHY_RCR1, RTSX_PHY_RCR1_INIT_27S)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_FLD0, RTSX_PHY_FLD0_INIT_27S)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_FLD3, RTSX_PHY_FLD3_INIT_27S)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_FLD4, RTSX_PHY_FLD4_INIT_27S)))
return (error);
break;
case RTSX_RTS525A:
if ((error = rtsx_write_phy(sc, RTSX__PHY_FLD0,
RTSX__PHY_FLD0_CLK_REQ_20C | RTSX__PHY_FLD0_RX_IDLE_EN |
RTSX__PHY_FLD0_BIT_ERR_RSTN | RTSX__PHY_FLD0_BER_COUNT |
RTSX__PHY_FLD0_BER_TIMER | RTSX__PHY_FLD0_CHECK_EN)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX__PHY_ANA03,
RTSX__PHY_ANA03_TIMER_MAX | RTSX__PHY_ANA03_OOBS_DEB_EN |
RTSX__PHY_CMU_DEBUG_EN)))
return (error);
if (sc->rtsx_flags & RTSX_F_VERSION_A)
if ((error = rtsx_write_phy(sc, RTSX__PHY_REV0,
RTSX__PHY_REV0_FILTER_OUT | RTSX__PHY_REV0_CDR_BYPASS_PFD |
RTSX__PHY_REV0_CDR_RX_IDLE_BYPASS)))
return (error);
break;
case RTSX_RTS5249:
RTSX_CLR(sc, RTSX_PM_CTRL3, RTSX_D3_DELINK_MODE_EN);
if ((error = rtsx_write_phy(sc, RTSX_PHY_REV,
RTSX_PHY_REV_RESV | RTSX_PHY_REV_RXIDLE_LATCHED |
RTSX_PHY_REV_P1_EN | RTSX_PHY_REV_RXIDLE_EN |
RTSX_PHY_REV_CLKREQ_TX_EN | RTSX_PHY_REV_RX_PWST |
RTSX_PHY_REV_CLKREQ_DT_1_0 | RTSX_PHY_REV_STOP_CLKRD |
RTSX_PHY_REV_STOP_CLKWR)))
return (error);
DELAY(1000);
if ((error = rtsx_write_phy(sc, RTSX_PHY_BPCR,
RTSX_PHY_BPCR_IBRXSEL | RTSX_PHY_BPCR_IBTXSEL |
RTSX_PHY_BPCR_IB_FILTER | RTSX_PHY_BPCR_CMIRROR_EN)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_PCR,
RTSX_PHY_PCR_FORCE_CODE | RTSX_PHY_PCR_OOBS_CALI_50 |
RTSX_PHY_PCR_OOBS_VCM_08 | RTSX_PHY_PCR_OOBS_SEN_90 |
RTSX_PHY_PCR_RSSI_EN | RTSX_PHY_PCR_RX10K)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_RCR2,
RTSX_PHY_RCR2_EMPHASE_EN | RTSX_PHY_RCR2_NADJR |
RTSX_PHY_RCR2_CDR_SR_2 | RTSX_PHY_RCR2_FREQSEL_12 |
RTSX_PHY_RCR2_CDR_SC_12P | RTSX_PHY_RCR2_CALIB_LATE)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_FLD4,
RTSX_PHY_FLD4_FLDEN_SEL | RTSX_PHY_FLD4_REQ_REF |
RTSX_PHY_FLD4_RXAMP_OFF | RTSX_PHY_FLD4_REQ_ADDA |
RTSX_PHY_FLD4_BER_COUNT | RTSX_PHY_FLD4_BER_TIMER |
RTSX_PHY_FLD4_BER_CHK_EN)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_RDR,
RTSX_PHY_RDR_RXDSEL_1_9 | RTSX_PHY_SSC_AUTO_PWD)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_RCR1,
RTSX_PHY_RCR1_ADP_TIME_4 | RTSX_PHY_RCR1_VCO_COARSE)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_FLD3,
RTSX_PHY_FLD3_TIMER_4 | RTSX_PHY_FLD3_TIMER_6 |
RTSX_PHY_FLD3_RXDELINK)))
return (error);
if ((error = rtsx_write_phy(sc, RTSX_PHY_TUNE,
RTSX_PHY_TUNE_TUNEREF_1_0 | RTSX_PHY_TUNE_VBGSEL_1252 |
RTSX_PHY_TUNE_SDBUS_33 | RTSX_PHY_TUNE_TUNED18 |
RTSX_PHY_TUNE_TUNED12 | RTSX_PHY_TUNE_TUNEA12)))
return (error);
break;
}
/* Set mcu_cnt to 7 to ensure data can be sampled properly. */
RTSX_BITOP(sc, RTSX_CLK_DIV, 0x07, 0x07);
/* Disable sleep mode. */