The reDIP CIA is an open source FPGA board which combines the following in a DIP-40 size package:
- Lattice iCE5LP1K FPGA
- 1Mbit FLASH
- 5V tolerant I/O
The reDIP CIA provides an open source hardware platform for MOS 6520 PIA / MOS 6522 VIA / MOS 6526/8520/8521 CIA replacements.
Designs for the iCE5LP1K FPGA can be processed by yosys and nextpnr.
- 5V input
- 35 FPGA GPIO
- 3 FPGA open-drain I/O
- GND
All FPGA header I/O is 5V tolerant, and can drive 5V TTL.
A separate header footprint is provided for (Q)SPI flash programming, with pinout borrowed from the iCEBreaker Bitsy.