Failure while executing pass pipeline

[jcasas00]

Getting the following error:

File "/home/jcasas/dprive/heterocl_mlir/python/heterocl/build_module.py", line 38, in _mlir_lower_pipeline
mlir_pass_manager.parse(pipeline).run(module)
RuntimeError: Failure while executing pass pipeline.

Here's the ast file that generated this error:
cpu_top.ast.gz

[jcasas00]

Here's the IR that was printed out ...
cpu_top.out.gz

I missed the message that this was another instance of "operand #1 does not dominate this use" exception.

[zzzDavid]

Could you isolate the program that corresponds to this part of the AST?

 while (legacy_prefix[0]) {
      read_addr = compute((1,), UInt(33)) (x) {
        read_addr[x] = (cpu0.archstate.RIP[0][0:31] + offset[0])
      }

      _addr = compute((1,), UInt(33)) (x) {
        _addr[x] = read_addr[0]
      }

      assert_cond = compute((1,), UInt(1)) (x) {
        assert_cond[x] = ((_addr[0] + 1) le 4096)
      }

      if (assert_cond[0] eq 0) {
        print(_addr[0][0:15], _addr[0][16:31], _addr[0][32:32], (_addr[0] + 1)[0:15], (_addr[0] + 1)[16:31], (_addr[0] + 1)[32:34], 
        while ((assert_cond[0] ne 1)) {
          assert_cond[0] = 0
        }
      }
      Mem.read_c = compute((1,), UInt(8)) (i) {
        Mem.read_c[i] = mem[(read_addr[0] + i)]
      }

      byte[0] = Mem.read_c[0]
      if (byte[0] eq 38) {
        es_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 46)) {
        cs_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 54)) {
        ss_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 62)) {
        ds_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 100)) {
        fs_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 101)) {
        gs_override_prefix_present[0] = 1
      }
      else if ((byte[0] eq 102)) {
        osz_prefix_present[0] = 1
      }
      else if ((byte[0] eq 103)) {
        asz_prefix_present[0] = 1
      }
      else if ((byte[0] eq 240)) {
        lock_prefix_present[0] = 1
      }
      else if ((byte[0] eq 242)) {
        repne_prefix_present[0] = 1
      }
      else if ((byte[0] eq 243)) {
        rep_prefix_present[0] = 1
      }
      else {
        legacy_prefix[0] = 0
      }
      if legacy_prefix[0] {
        offset[0] = (offset[0] + 1)
      }
    }
    if ((1 && (UInt(1)) is_mode64[0]) && (UInt(1)) (byte[0] eq 98)) {
      read_addr_59 = compute((1,), Int(65)) (x) {
        read_addr_59[x] = (cpu0.archstate.RIP[0][0:31] + (offset[0] & 18446744073709551615))
      }
...

Some how the bit slice indices in cpu0.archstate.RIP[0][0:31] was not built correctly, but I couldn't reproduce it with a smaller example.

[jcasas00]

I was also trying to isolate it before filing the issue but could not narrow it down which is why I sent the full AST instead and the IR was (fortunately) still in a log file I saved.
Anyway, will look at it again. May take a while though – I don’t have the original code anymore as I only saw this issue in one of my modeling experiments.