We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
When disassembling some 68k code, I noticed that the disassembly for the MOVEC instruction produced by the Capstone engine is wrong.
Expected output:
0x4E7A 0002 MOVEC CACR, D0
Capstone output (wrong):
0x4E7A 0002 MOVEC D0, CACR
A short peek into the corresponding source revealed the following buggy code: https://github.com/aquynh/capstone/blob/0dc008920f8345274b4a596f9a1bbe703d083123/arch/M68K/M68KDisassembler.c#L2623
The above code checks bit 1 of the instruction opcode, but it should be actually bit 0 as described in the Motorola manual:
I'll send a PR in short.
The text was updated successfully, but these errors were encountered:
Fixed in #1663
Sorry, something went wrong.
Successfully merging a pull request may close this issue.
When disassembling some 68k code, I noticed that the disassembly for the MOVEC instruction produced by the Capstone engine is wrong.
Expected output:
0x4E7A 0002 MOVEC CACR, D0
Capstone output (wrong):
0x4E7A 0002 MOVEC D0, CACR
A short peek into the corresponding source revealed the following buggy code:
https://github.com/aquynh/capstone/blob/0dc008920f8345274b4a596f9a1bbe703d083123/arch/M68K/M68KDisassembler.c#L2623
The above code checks bit 1 of the instruction opcode, but it should be actually bit 0 as described in the Motorola manual:
I'll send a PR in short.
The text was updated successfully, but these errors were encountered: