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lsm6dso32x_reg.c
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lsm6dso32x_reg.c
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/**
******************************************************************************
* @file lsm6dso32x_reg.c
* @author Sensors Software Solution Team
* @brief LSM6DSO32X driver file
******************************************************************************
* @attention
*
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "lsm6dso32x_reg.h"
/**
* @defgroup LSM6DSO32X
* @brief This file provides a set of functions needed to drive the
* lsm6dso32x enhanced inertial module.
* @{
*
*/
/**
* @defgroup LSM6DSO32X_Interfaces_Functions
* @brief This section provide a set of functions used to read and
* write a generic register of the device.
* MANDATORY: return 0 -> no Error.
* @{
*
*/
/**
* @brief Read generic device register
*
* @param ctx communication interface handler.(ptr)
* @param reg first register address to read.
* @param data buffer for data read.(ptr)
* @param len number of consecutive register to read.
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t __weak lsm6dso32x_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
uint8_t *data,
uint16_t len)
{
int32_t ret;
if (ctx == NULL)
{
return -1;
}
ret = ctx->read_reg(ctx->handle, reg, data, len);
return ret;
}
/**
* @brief Write generic device register
*
* @param ctx communication interface handler.(ptr)
* @param reg first register address to write.
* @param data the buffer contains data to be written.(ptr)
* @param len number of consecutive register to write.
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t __weak lsm6dso32x_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
uint8_t *data,
uint16_t len)
{
int32_t ret;
if (ctx == NULL)
{
return -1;
}
ret = ctx->write_reg(ctx->handle, reg, data, len);
return ret;
}
/**
* @}
*
*/
/**
* @defgroup LSM6DSO32X_Private_functions
* @brief Section collect all the utility functions needed by APIs.
* @{
*
*/
static void bytecpy(uint8_t *target, uint8_t *source)
{
if ((target != NULL) && (source != NULL))
{
*target = *source;
}
}
/**
* @}
*
*/
/**
* @defgroup LSM6DSO32X_Sensitivity
* @brief These functions convert raw-data into engineering units.
* @{
*
*/
float_t lsm6dso32x_from_fs4_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.122f;
}
float_t lsm6dso32x_from_fs8_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.244f;
}
float_t lsm6dso32x_from_fs16_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.488f;
}
float_t lsm6dso32x_from_fs32_to_mg(int16_t lsb)
{
return ((float_t)lsb) * 0.976f;
}
float_t lsm6dso32x_from_fs125_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 4.375f;
}
float_t lsm6dso32x_from_fs500_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 17.50f;
}
float_t lsm6dso32x_from_fs250_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 8.750f;
}
float_t lsm6dso32x_from_fs1000_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 35.0f;
}
float_t lsm6dso32x_from_fs2000_to_mdps(int16_t lsb)
{
return ((float_t)lsb) * 70.0f;
}
float_t lsm6dso32x_from_lsb_to_celsius(int16_t lsb)
{
return (((float_t)lsb / 256.0f) + 25.0f);
}
float_t lsm6dso32x_from_lsb_to_nsec(int16_t lsb)
{
return ((float_t)lsb * 25000.0f);
}
/**
* @}
*
*/
/**
* @defgroup LSM6DSO32X_Data_Generation
* @brief This section groups all the functions concerning
* data generation.
*
*/
/**
* @brief Accelerometer full-scale selection.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of fs_xl in reg CTRL1_XL
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_xl_full_scale_set(const stmdev_ctx_t *ctx, lsm6dso32x_fs_xl_t val)
{
lsm6dso32x_ctrl1_xl_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
if (ret == 0)
{
reg.fs_xl = (uint8_t) val;
ret = lsm6dso32x_write_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
}
return ret;
}
/**
* @brief Accelerometer full-scale selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of fs_xl in reg CTRL1_XL
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_xl_full_scale_get(const stmdev_ctx_t *ctx,
lsm6dso32x_fs_xl_t *val)
{
lsm6dso32x_ctrl1_xl_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
switch (reg.fs_xl)
{
case LSM6DSO32X_16g:
*val = LSM6DSO32X_16g;
break;
case LSM6DSO32X_4g:
*val = LSM6DSO32X_4g;
break;
case LSM6DSO32X_8g:
*val = LSM6DSO32X_8g;
break;
case LSM6DSO32X_32g:
*val = LSM6DSO32X_32g;
break;
default:
*val = LSM6DSO32X_4g;
break;
}
return ret;
}
/**
* @brief Accelerometer UI data rate selection.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of odr_xl in reg CTRL1_XL
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_xl_data_rate_set(const stmdev_ctx_t *ctx, lsm6dso32x_odr_xl_t val)
{
lsm6dso32x_odr_xl_t odr_xl = val;
lsm6dso32x_emb_fsm_enable_t fsm_enable;
lsm6dso32x_fsm_odr_t fsm_odr;
lsm6dso32x_emb_sens_t emb_sens;
lsm6dso32x_mlc_odr_t mlc_odr;
lsm6dso32x_ctrl1_xl_t reg;
int32_t ret;
/* Check the Finite State Machine data rate constraints */
ret = lsm6dso32x_fsm_enable_get(ctx, &fsm_enable);
if (ret == 0)
{
if ((fsm_enable.fsm_enable_a.fsm1_en |
fsm_enable.fsm_enable_a.fsm2_en |
fsm_enable.fsm_enable_a.fsm3_en |
fsm_enable.fsm_enable_a.fsm4_en |
fsm_enable.fsm_enable_a.fsm5_en |
fsm_enable.fsm_enable_a.fsm6_en |
fsm_enable.fsm_enable_a.fsm7_en |
fsm_enable.fsm_enable_a.fsm8_en |
fsm_enable.fsm_enable_b.fsm9_en |
fsm_enable.fsm_enable_b.fsm10_en |
fsm_enable.fsm_enable_b.fsm11_en |
fsm_enable.fsm_enable_b.fsm12_en |
fsm_enable.fsm_enable_b.fsm13_en |
fsm_enable.fsm_enable_b.fsm14_en |
fsm_enable.fsm_enable_b.fsm15_en |
fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
{
ret = lsm6dso32x_fsm_data_rate_get(ctx, &fsm_odr);
if (ret == 0)
{
switch (fsm_odr)
{
case LSM6DSO32X_ODR_FSM_12Hz5:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_12Hz5;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_FSM_26Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_26Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_26Hz;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_FSM_52Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else if (val == LSM6DSO32X_XL_ODR_26Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_FSM_104Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_26Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_52Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else
{
odr_xl = val;
}
break;
default:
odr_xl = val;
break;
}
}
}
}
/* Check the Machine Learning Core data rate constraints */
emb_sens.mlc = PROPERTY_DISABLE;
if (ret == 0)
{
ret = lsm6dso32x_embedded_sens_get(ctx, &emb_sens);
if ((ret == 0) && (emb_sens.mlc == PROPERTY_ENABLE))
{
ret = lsm6dso32x_mlc_data_rate_get(ctx, &mlc_odr);
if (ret == 0)
{
switch (mlc_odr)
{
case LSM6DSO32X_ODR_PRGS_12Hz5:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_12Hz5;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_PRGS_26Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_26Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_26Hz;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_PRGS_52Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else if (val == LSM6DSO32X_XL_ODR_26Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_52Hz;
}
else
{
odr_xl = val;
}
break;
case LSM6DSO32X_ODR_PRGS_104Hz:
if (val == LSM6DSO32X_XL_ODR_OFF)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_12Hz5)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_26Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else if (val == LSM6DSO32X_XL_ODR_52Hz)
{
odr_xl = LSM6DSO32X_XL_ODR_104Hz;
}
else
{
odr_xl = val;
}
break;
default:
odr_xl = val;
break;
}
}
}
}
if (ret == 0)
{
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
}
if (ret == 0)
{
reg.odr_xl = (uint8_t) odr_xl;
ret = lsm6dso32x_write_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
}
return ret;
}
/**
* @brief Accelerometer UI data rate selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of odr_xl in reg CTRL1_XL
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_xl_data_rate_get(const stmdev_ctx_t *ctx, lsm6dso32x_odr_xl_t *val)
{
lsm6dso32x_ctrl1_xl_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL1_XL, (uint8_t *)®, 1);
switch (reg.odr_xl)
{
case LSM6DSO32X_XL_ODR_OFF:
*val = LSM6DSO32X_XL_ODR_OFF;
break;
case LSM6DSO32X_XL_ODR_12Hz5:
*val = LSM6DSO32X_XL_ODR_12Hz5;
break;
case LSM6DSO32X_XL_ODR_26Hz:
*val = LSM6DSO32X_XL_ODR_26Hz;
break;
case LSM6DSO32X_XL_ODR_52Hz:
*val = LSM6DSO32X_XL_ODR_52Hz;
break;
case LSM6DSO32X_XL_ODR_104Hz:
*val = LSM6DSO32X_XL_ODR_104Hz;
break;
case LSM6DSO32X_XL_ODR_208Hz:
*val = LSM6DSO32X_XL_ODR_208Hz;
break;
case LSM6DSO32X_XL_ODR_417Hz:
*val = LSM6DSO32X_XL_ODR_417Hz;
break;
case LSM6DSO32X_XL_ODR_833Hz:
*val = LSM6DSO32X_XL_ODR_833Hz;
break;
case LSM6DSO32X_XL_ODR_1667Hz:
*val = LSM6DSO32X_XL_ODR_1667Hz;
break;
case LSM6DSO32X_XL_ODR_3333Hz:
*val = LSM6DSO32X_XL_ODR_3333Hz;
break;
case LSM6DSO32X_XL_ODR_6667Hz:
*val = LSM6DSO32X_XL_ODR_6667Hz;
break;
case LSM6DSO32X_XL_ODR_1Hz6:
*val = LSM6DSO32X_XL_ODR_1Hz6;
break;
default:
*val = LSM6DSO32X_XL_ODR_OFF;
break;
}
return ret;
}
/**
* @brief Gyroscope UI chain full-scale selection.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of fs_g in reg CTRL2_G
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_gy_full_scale_set(const stmdev_ctx_t *ctx, lsm6dso32x_fs_g_t val)
{
lsm6dso32x_ctrl2_g_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
if (ret == 0)
{
reg.fs_g = (uint8_t) val;
ret = lsm6dso32x_write_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
}
return ret;
}
/**
* @brief Gyroscope UI chain full-scale selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of fs_g in reg CTRL2_G
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_gy_full_scale_get(const stmdev_ctx_t *ctx, lsm6dso32x_fs_g_t *val)
{
lsm6dso32x_ctrl2_g_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
switch (reg.fs_g)
{
case LSM6DSO32X_250dps:
*val = LSM6DSO32X_250dps;
break;
case LSM6DSO32X_125dps:
*val = LSM6DSO32X_125dps;
break;
case LSM6DSO32X_500dps:
*val = LSM6DSO32X_500dps;
break;
case LSM6DSO32X_1000dps:
*val = LSM6DSO32X_1000dps;
break;
case LSM6DSO32X_2000dps:
*val = LSM6DSO32X_2000dps;
break;
default:
*val = LSM6DSO32X_250dps;
break;
}
return ret;
}
/**
* @brief Gyroscope UI data rate selection.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of odr_g in reg CTRL2_G
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_gy_data_rate_set(const stmdev_ctx_t *ctx, lsm6dso32x_odr_g_t val)
{
lsm6dso32x_odr_g_t odr_gy = val;
lsm6dso32x_emb_fsm_enable_t fsm_enable;
lsm6dso32x_fsm_odr_t fsm_odr;
lsm6dso32x_emb_sens_t emb_sens;
lsm6dso32x_mlc_odr_t mlc_odr;
lsm6dso32x_ctrl2_g_t reg;
int32_t ret;
/* Check the Finite State Machine data rate constraints */
ret = lsm6dso32x_fsm_enable_get(ctx, &fsm_enable);
if (ret == 0)
{
if ((fsm_enable.fsm_enable_a.fsm1_en |
fsm_enable.fsm_enable_a.fsm2_en |
fsm_enable.fsm_enable_a.fsm3_en |
fsm_enable.fsm_enable_a.fsm4_en |
fsm_enable.fsm_enable_a.fsm5_en |
fsm_enable.fsm_enable_a.fsm6_en |
fsm_enable.fsm_enable_a.fsm7_en |
fsm_enable.fsm_enable_a.fsm8_en |
fsm_enable.fsm_enable_b.fsm9_en |
fsm_enable.fsm_enable_b.fsm10_en |
fsm_enable.fsm_enable_b.fsm11_en |
fsm_enable.fsm_enable_b.fsm12_en |
fsm_enable.fsm_enable_b.fsm13_en |
fsm_enable.fsm_enable_b.fsm14_en |
fsm_enable.fsm_enable_b.fsm15_en |
fsm_enable.fsm_enable_b.fsm16_en) == PROPERTY_ENABLE)
{
ret = lsm6dso32x_fsm_data_rate_get(ctx, &fsm_odr);
if (ret == 0)
{
switch (fsm_odr)
{
case LSM6DSO32X_ODR_FSM_12Hz5:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_12Hz5;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_FSM_26Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_26Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_26Hz;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_FSM_52Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else if (val == LSM6DSO32X_GY_ODR_26Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_FSM_104Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_26Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_52Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else
{
odr_gy = val;
}
break;
default:
odr_gy = val;
break;
}
}
}
}
/* Check the Machine Learning Core data rate constraints */
emb_sens.mlc = PROPERTY_DISABLE;
if (ret == 0)
{
ret = lsm6dso32x_embedded_sens_get(ctx, &emb_sens);
if (emb_sens.mlc == PROPERTY_ENABLE)
{
ret = lsm6dso32x_mlc_data_rate_get(ctx, &mlc_odr);
if (ret == 0)
{
switch (mlc_odr)
{
case LSM6DSO32X_ODR_PRGS_12Hz5:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_12Hz5;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_PRGS_26Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_26Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_26Hz;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_PRGS_52Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else if (val == LSM6DSO32X_GY_ODR_26Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_52Hz;
}
else
{
odr_gy = val;
}
break;
case LSM6DSO32X_ODR_PRGS_104Hz:
if (val == LSM6DSO32X_GY_ODR_OFF)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_12Hz5)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_26Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else if (val == LSM6DSO32X_GY_ODR_52Hz)
{
odr_gy = LSM6DSO32X_GY_ODR_104Hz;
}
else
{
odr_gy = val;
}
break;
default:
odr_gy = val;
break;
}
}
}
}
if (ret == 0)
{
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
}
if (ret == 0)
{
reg.odr_g = (uint8_t) odr_gy;
ret = lsm6dso32x_write_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
}
return ret;
}
/**
* @brief Gyroscope UI data rate selection.[get]
*
* @param ctx read / write interface definitions
* @param val Get the values of odr_g in reg CTRL2_G
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_gy_data_rate_get(const stmdev_ctx_t *ctx, lsm6dso32x_odr_g_t *val)
{
lsm6dso32x_ctrl2_g_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL2_G, (uint8_t *)®, 1);
switch (reg.odr_g)
{
case LSM6DSO32X_GY_ODR_OFF:
*val = LSM6DSO32X_GY_ODR_OFF;
break;
case LSM6DSO32X_GY_ODR_12Hz5:
*val = LSM6DSO32X_GY_ODR_12Hz5;
break;
case LSM6DSO32X_GY_ODR_26Hz:
*val = LSM6DSO32X_GY_ODR_26Hz;
break;
case LSM6DSO32X_GY_ODR_52Hz:
*val = LSM6DSO32X_GY_ODR_52Hz;
break;
case LSM6DSO32X_GY_ODR_104Hz:
*val = LSM6DSO32X_GY_ODR_104Hz;
break;
case LSM6DSO32X_GY_ODR_208Hz:
*val = LSM6DSO32X_GY_ODR_208Hz;
break;
case LSM6DSO32X_GY_ODR_417Hz:
*val = LSM6DSO32X_GY_ODR_417Hz;
break;
case LSM6DSO32X_GY_ODR_833Hz:
*val = LSM6DSO32X_GY_ODR_833Hz;
break;
case LSM6DSO32X_GY_ODR_1667Hz:
*val = LSM6DSO32X_GY_ODR_1667Hz;
break;
case LSM6DSO32X_GY_ODR_3333Hz:
*val = LSM6DSO32X_GY_ODR_3333Hz;
break;
case LSM6DSO32X_GY_ODR_6667Hz:
*val = LSM6DSO32X_GY_ODR_6667Hz;
break;
default:
*val = LSM6DSO32X_GY_ODR_OFF;
break;
}
return ret;
}
/**
* @brief Block data update.[set]
*
* @param ctx read / write interface definitions
* @param val change the values of bdu in reg CTRL3_C
* @retval interface status (MANDATORY: return 0 -> no Error).
*
*/
int32_t lsm6dso32x_block_data_update_set(const stmdev_ctx_t *ctx, uint8_t val)
{
lsm6dso32x_ctrl3_c_t reg;
int32_t ret;
ret = lsm6dso32x_read_reg(ctx, LSM6DSO32X_CTRL3_C, (uint8_t *)®, 1);
if (ret == 0)
{
reg.bdu = val;
ret = lsm6dso32x_write_reg(ctx, LSM6DSO32X_CTRL3_C, (uint8_t *)®, 1);
}
return ret;
}
/**