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The first output should be the last cell not -1 #4

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kelalaka153 opened this issue Apr 18, 2021 · 4 comments
Closed

The first output should be the last cell not -1 #4

kelalaka153 opened this issue Apr 18, 2021 · 4 comments

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@kelalaka153
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I've used this library to answer this question in cryptography.se. During my implementation, I've seen that the first output is -1. This creates inconsistency or extra code to mitigate.

This is very unusual, at least for me. The output should be the last cell of the LFSR, not -1. The easiest solution should be setting the output immediately.

@Nikeshbajaj
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Nikeshbajaj commented Apr 20, 2021

Hi, the output of LFSR is indeed the last bit of intial state, but there is no output bit, if no clock cycle (L.next() ) is excuted. -1 has been intentionally used to show that LSFR has not been passed any clock input. In other words, Imagine LFSR has been initialize, but no clock is attached yet, in that case, no bit will be shifted out.

I checked the code for this question, the print line is used at wrong place. It should be at end of the first cycle.

import numpy as np
from pylfsr import LFSR

state = [1,1,1,1,1]
fpoly = [5, 4, 3, 2]
L = LFSR(fpoly=fpoly,initstate =state, verbose=False)
L.info()

for i in range(1,21):
    if L.outbit == 0:
        L.next()
    else :
        L.next()
        L.next()
    print(L.outbit, end=",")
print("\n")
print("1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1") 

Output::

5 bit LFSR with feedback polynomial  x^5 + x^4 + x^3 + x^2 + 1
Expected Period (if polynomial is primitive) =  31
Current :
 State        :  [1 1 1 1 1]
 Count        :  0
 Output bit   :  -1
 feedback bit :  -1
1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1,1,

1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1

I think, author in given paper consider the first output as initial value, without any clock, in that case, L.output is just a shifted version. To get what you exactly expect, here is alternative code

state = [1,1,1,1,1]
fpoly = [5, 4, 3, 2]
L = LFSR(fpoly=fpoly,initstate =state, verbose=False)
L.info()

for i in range(1,21):
    print(L.state[-1], end=",")
    if L.outbit == 0:
        L.next()
    else :
        L.next()
        L.next()
    #
print("\n")
print("1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1") 

which produces

5 bit LFSR with feedback polynomial  x^5 + x^4 + x^3 + x^2 + 1
Expected Period (if polynomial is primitive) =  31
Current :
 State        :  [1 1 1 1 1]
 Count        :  0
 Output bit   :  -1
 feedback bit :  -1
1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1,

1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1

@Nikeshbajaj
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Nikeshbajaj commented Apr 20, 2021

I hope above code answers the issue. I should add this functionality to library, to use first output as last bit of LFSR.
Thanks to bring this,

@kelalaka153
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kelalaka153 commented Apr 20, 2021

Thanks for the response. I've considered using state[-1] however, that required the knowledge of the indexes that was not clear from the MD. It is better written clearly in the md file, too. When the LFSR circuit is considered, as far as I know, the last bit always the output as seen in this picture https://www.oocities.org/siliconvalley/screen/2257/vhdl/lfsr/lfsrfig1.gif

@Nikeshbajaj Nikeshbajaj reopened this Apr 21, 2021
@Nikeshbajaj
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Nikeshbajaj commented Apr 21, 2021

@kelalaka153 You were right, I checked it in detail, somehow it was missing first output bit, which should not be the case.

I have fixed it in latest version 1.0.5, along with detailed examples and help docstring. Check out here. I have added an option counter_start_zero, which is by default True to keep output -1 untill first clock is passed, but it can be set to False.

Now, answer to your original question with your original code comes out to be correct with counter_start_zero=False

import numpy as np
from pylfsr import LFSR
print('pylfsr version : ',pylfsr.__version__)
print()

state = [1,1,1,1,1]
fpoly = [5, 4, 3, 2]
L = LFSR(fpoly=fpoly,initstate =state, verbose=False,counter_start_zero=False)
L.info()

for i in range(1,21):
    print(L.outbit, end=",")
    if L.outbit == 0:
        L.next()
    else :
        L.next()
        L.next()
print("\n")
print("1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1")

Output

pylfsr version :  1.0.5

5 bit LFSR with feedback polynomial  x^5 + x^4 + x^3 + x^2 + 1
Expected Period (if polynomial is primitive) =  31
Current :
 State        :  [1 1 1 1 1]
 Count        :  1
 Output bit   :  1
 feedback bit :  1
 Output Sequence 1
1,1,1,0,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,

1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1

OR Alternatively run first cycle before checking the output for first time

state = [1,1,1,1,1]
fpoly = [5, 4, 3, 2]
L = LFSR(fpoly=fpoly,initstate =state, verbose=False)
L.info()
L.next()  # to run first cycle before checking output 

for i in range(1,21):
    print(L.outbit, end=",")
    if L.outbit == 0:
        L.next()
    else :
        L.next()
        L.next()
print("\n")
print("1,1,1,0,1,0,1,0,0,0,0,1,1,0,1,1,0,0,1,1") 

I think, now this issue is properly closed 👍 :)
Thanks for pointing out.

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