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Fix compilation with CPU specific optimizations #79

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merged 1 commit into from
Oct 23, 2023
Merged

Fix compilation with CPU specific optimizations #79

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2 changes: 1 addition & 1 deletion share/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,6 @@ target_sources(OM3_share PRIVATE
CESM_share/include/shr_assert.h
CESM_share/src/shr_abort_mod.F90
CESM_share/src/shr_cal_mod.F90
CESM_share/src/shr_const_mod.F90
CESM_share/src/shr_file_mod.F90
CESM_share/src/shr_kind_mod.F90
CESM_share/src/shr_log_mod.F90
Expand All @@ -46,6 +45,7 @@ target_sources(OM3_share PRIVATE
# The following file is a stub.
stubs/mct_mod.F90
)
add_patched_source(OM3_share CESM_share/src/shr_const_mod.F90)
if(CMAKE_Fortran_COMPILER_ID MATCHES "Intel")
# CESM reduces the precision and increases speed for the following file
set_source_files_properties(CESM_share/src/shr_wv_sat_mod.F90 PROPERTIES COMPILE_FLAGS "-fimf-precision=low -fp-model fast")
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14 changes: 14 additions & 0 deletions share/patches/shr_const_mod.F90.patch
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
diff --git a/src/shr_const_mod.F90 b/src/shr_const_mod.F90
index 8437190..9696c81 100644
--- shr_const_mod.F90.old
+++ shr_const_mod.F90.new
@@ -87,9 +87,8 @@ contains
!-----------------------------------------------------------------------------

elemental logical function shr_const_isspval(rval)
-!$omp declare simd(shr_const_isspval)

real(r8), intent(in) :: rval

if (rval > SHR_CONST_SPVAL_TOLMIN .and. &
rval < SHR_CONST_SPVAL_TOLMAX) then