diff --git a/Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml b/Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml new file mode 100644 index 0000000000000..0bf2d36c50491 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/starfive,jh7100-gpio.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/starfive,jh7100-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7100 GPIO controller + +maintainers: + - Huan Feng + - Drew Fustini + +properties: + compatible: + items: + - const: starfive,jh7100-gpio + + reg: + maxItems: 1 + + interrupts: + description: + Interrupt mapping, one per GPIO. Maximum 32 GPIOs. + minItems: 1 + maxItems: 32 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + gpio@11910000 { + compatible = "starfive,jh7100-gpio"; + reg = <0x0 0x11910000 0x0 0x10000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <32>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b868cefc7c550..3dd6a42fbbad2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1085,6 +1085,8 @@ patternProperties: (formerly part of MStar Semiconductor, Inc.) "^st,.*": description: STMicroelectronics + "^starfive,.*": + description: StarFive Technology Co. Ltd. "^starry,.*": description: Starry Electronic Technology (ShenZhen) Co., LTD "^startek,.*": diff --git a/README.md b/README.md index bdf5a81b7fdec..775aaf18b7242 100644 --- a/README.md +++ b/README.md @@ -61,7 +61,7 @@ arch/riscv/boot/Image ``` You'll also need the matching device tree at ```shell -arch/riscv/boot/dts/starfive/jh7100-starlight.dtb +arch/riscv/boot/dts/starfive/beaglev-starlight-jh7100.dtb ``` These two files should be copied to the boot partition on the SD card. That is onto the same file system that contains the `extlinux/extlinux.conf`. On the @@ -71,7 +71,7 @@ Now add the following entry to the `extlinux/extlinux.conf` file: ``` label My New Kernel kernel /Image -fdt /jh7100-starlight.dtb +fdt /beaglev-starlight-jh7100.dtb append earlycon console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait stmmac.chain_mode=1 ``` diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 685e57c1bf5c1..094606f610eea 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_STARFIVE_VIC7100) += jh7100-starlight.dtb +dtb-$(CONFIG_SOC_STARFIVE_VIC7100) += beaglev-starlight-jh7100.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7100-starlight.dts b/arch/riscv/boot/dts/starfive/beaglev-starlight-jh7100.dts similarity index 98% rename from arch/riscv/boot/dts/starfive/jh7100-starlight.dts rename to arch/riscv/boot/dts/starfive/beaglev-starlight-jh7100.dts index 6b18845345e35..1685f676815db 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-starlight.dts +++ b/arch/riscv/boot/dts/starfive/beaglev-starlight-jh7100.dts @@ -1,3 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2021 StarFive Technology Co., Ltd. */ + /dts-v1/; #include "jh7100.dtsi" #include diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 7fd9b4ee7471c..89832c281e8d0 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -1,3 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2021 StarFive Technology Co., Ltd. */ + /dts-v1/; #include #include @@ -343,14 +346,13 @@ }; gpio: gpio@11910000 { - compatible = "starfive,gpio0"; - interrupts = <32>; + compatible = "starfive,jh7100-gpio"; reg = <0x0 0x11910000 0x0 0x10000>; - reg-names = "control"; - interrupt-controller; - #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <32>; }; i2c0: i2c@118b0000 { diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 32f3a4a2eeefa..26630e4852c07 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -542,13 +542,13 @@ config GPIO_SIFIVE help Say yes here to support the GPIO device on SiFive SoCs. -config GPIO_STARFIVE_VIC - bool "Starfive VIC GPIO support" +config GPIO_STARFIVE_JH7100 + bool "StarFive JH7100 GPIO support" depends on OF_GPIO select GPIOLIB_IRQCHIP default y if SOC_STARFIVE_VIC7100 help - Say yes here to support the GPIO device on Starfive VIC SoCs. + Say yes here to support the GPIO device on StarFive JH7100 SoC. config GPIO_SIOX tristate "SIOX GPIO support" diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index cb5dd75e61f5c..939922eaf5f35 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -132,7 +132,7 @@ obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o -obj-$(CONFIG_GPIO_STARFIVE_VIC) += gpio-starfive-vic.o +obj-$(CONFIG_GPIO_STARFIVE_JH7100) += gpio-starfive-jh7100.o obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o obj-$(CONFIG_GPIO_SL28CPLD) += gpio-sl28cpld.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o diff --git a/drivers/gpio/gpio-starfive-vic.c b/drivers/gpio/gpio-starfive-jh7100.c similarity index 89% rename from drivers/gpio/gpio-starfive-vic.c rename to drivers/gpio/gpio-starfive-jh7100.c index 484677c1eb43b..d1a8d1a517b34 100755 --- a/drivers/gpio/gpio-starfive-vic.c +++ b/drivers/gpio/gpio-starfive-jh7100.c @@ -1,21 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* - ****************************************************************************** - * @file gpio-starfive-vic.c - * @author StarFive Technology - * @version V1.0 - * @date 08/13/2020 - * @brief - ****************************************************************************** - * @copy + * GPIO driver for StarFive JH7100 SoC * - * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - * COPYRIGHT 2020 Shanghai StarFive Technology Co., Ltd. + * Copyright (C) 2020 Shanghai StarFive Technology Co., Ltd. */ #include @@ -47,22 +34,20 @@ #define MAX_GPIO 64 -#define PROC_VIC "vic_gpio" - struct starfive_gpio { raw_spinlock_t lock; void __iomem *base; struct gpio_chip gc; unsigned long enabled; - unsigned trigger[MAX_GPIO]; + unsigned int trigger[MAX_GPIO]; unsigned int irq_parent[MAX_GPIO]; }; static DEFINE_SPINLOCK(sfg_lock); -static void __iomem *gpio_base = NULL; +static void __iomem *gpio_base; -static int starfive_direction_input(struct gpio_chip *gc, unsigned offset) +static int starfive_direction_input(struct gpio_chip *gc, unsigned int offset) { struct starfive_gpio *chip = gpiochip_get_data(gc); unsigned long flags; @@ -77,7 +62,7 @@ static int starfive_direction_input(struct gpio_chip *gc, unsigned offset) return 0; } -static int starfive_direction_output(struct gpio_chip *gc, unsigned offset, int value) +static int starfive_direction_output(struct gpio_chip *gc, unsigned int offset, int value) { struct starfive_gpio *chip = gpiochip_get_data(gc); unsigned long flags; @@ -93,7 +78,7 @@ static int starfive_direction_output(struct gpio_chip *gc, unsigned offset, int return 0; } -static int starfive_get_direction(struct gpio_chip *gc, unsigned offset) +static int starfive_get_direction(struct gpio_chip *gc, unsigned int offset) { struct starfive_gpio *chip = gpiochip_get_data(gc); @@ -103,7 +88,7 @@ static int starfive_get_direction(struct gpio_chip *gc, unsigned offset) return readl_relaxed(chip->base + GPIO_DOEN_X_REG + offset * 8) & 0x1; } -static int starfive_get_value(struct gpio_chip *gc, unsigned offset) +static int starfive_get_value(struct gpio_chip *gc, unsigned int offset) { struct starfive_gpio *chip = gpiochip_get_data(gc); int value; @@ -113,14 +98,16 @@ static int starfive_get_value(struct gpio_chip *gc, unsigned offset) if (offset < 32) { value = readl_relaxed(chip->base + GPIO_DIN_LOW); - return (value >> offset) & 0x1; + value = (value >> offset) & 0x1; } else { value = readl_relaxed(chip->base + GPIO_DIN_HIGH); - return (value >> (offset - 32)) & 0x1; + value = (value >> (offset - 32)) & 0x1; } + + return value; } -static void starfive_set_value(struct gpio_chip *gc, unsigned offset, int value) +static void starfive_set_value(struct gpio_chip *gc, unsigned int offset, int value) { struct starfive_gpio *chip = gpiochip_get_data(gc); unsigned long flags; @@ -148,12 +135,12 @@ static void starfive_set_ie(struct starfive_gpio *chip, int offset) } raw_spin_lock_irqsave(&chip->lock, flags); old_value = readl_relaxed(chip->base + GPIO_IE_LOW + reg_offset); - new_value = old_value | ( 1 << index); + new_value = old_value | (1 << index); writel_relaxed(new_value, chip->base + GPIO_IE_LOW + reg_offset); raw_spin_unlock_irqrestore(&chip->lock, flags); } -static int starfive_irq_set_type(struct irq_data *d, unsigned trigger) +static int starfive_irq_set_type(struct irq_data *d, unsigned int trigger) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct starfive_gpio *chip = gpiochip_get_data(gc); @@ -304,7 +291,7 @@ static void starfive_irq_disable(struct irq_data *d) } static struct irq_chip starfive_irqchip = { - .name = "starfive-gpio", + .name = "starfive-jh7100-gpio", .irq_set_type = starfive_irq_set_type, .irq_mask = starfive_irq_mask, .irq_unmask = starfive_irq_unmask, @@ -335,10 +322,7 @@ static irqreturn_t starfive_irq_handler(int irq, void *gc) writel_relaxed(BIT(index), chip->base + GPIO_IC_LOW + reg_offset); - /* - generic_handle_irq(irq_find_mapping(chip->gc.irq.domain, - offset)); - */ + /* generic_handle_irq(irq_find_mapping(chip->gc.irq.domain, offset)); */ raw_spin_unlock_irqrestore(&chip->lock, flags); } @@ -449,7 +433,7 @@ void sf_vic_gpio_manual(int offset, int v) unsigned int value; if (!gpio_base) - return ; + return; spin_lock(&sfg_lock); value = ioread32(gpio_base + offset); @@ -469,10 +453,8 @@ static int starfive_gpio_probe(struct platform_device *pdev) int irq, ret, ngpio; chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); - if (!chip) { - dev_err(dev, "out of memory\n"); + if (!chip) return -ENOMEM; - } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); chip->base = devm_ioremap_resource(dev, res); @@ -480,7 +462,7 @@ static int starfive_gpio_probe(struct platform_device *pdev) dev_err(dev, "failed to allocate device memory\n"); return PTR_ERR(chip->base); } - gpio_base = chip->base ; + gpio_base = chip->base; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -534,14 +516,14 @@ static int starfive_gpio_probe(struct platform_device *pdev) } static const struct of_device_id starfive_gpio_match[] = { - { .compatible = "starfive,gpio0", }, + { .compatible = "starfive,jh7100-gpio", }, { }, }; static struct platform_driver starfive_gpio_driver = { .probe = starfive_gpio_probe, .driver = { - .name = "starfive_gpio", + .name = "gpio_starfive_jh7100", .of_match_table = of_match_ptr(starfive_gpio_match), }, }; @@ -560,4 +542,4 @@ module_exit(starfive_gpio_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Huan Feng "); -MODULE_DESCRIPTION("Starfive VIC GPIO generator driver"); +MODULE_DESCRIPTION("StarFive JH7100 GPIO driver");