From 537f376fd0464f3dc3fb3a2dd3faba26766245fd Mon Sep 17 00:00:00 2001 From: Jemston Fernando Date: Thu, 4 Jul 2024 08:06:27 +0000 Subject: [PATCH] Add new and harden Celestica platforms - Add support for new platforms Seastone2, Questone2A, DS4000-v2, DS3000-v2, DS2000-v2 - Rename Belgite platform to DS1000 and harden --- .../CELESTICA-BELGITE/port_config.ini | 57 - .../CELESTICA-BELGITE/sai.profile | 1 - .../x86_64-cel_belgite-r0/custom_led.bin | Bin 220 -> 0 bytes .../x86_64-cel_belgite-r0/default_sku | 1 - .../pddf/pddf-device.json.original | 686 - .../platform_components.json | 10 - .../DS1000/ds1000.config.bcm} | 3 +- .../DS1000}/hwsku.json | 0 .../DS1000/port_config.ini | 57 + .../x86_64-cel_ds1000-r0/DS1000/sai.profile | 1 + .../DS1000/sai_postinit_cmd.soc | 6 + .../x86_64-cel_ds1000-r0/custom_led.bin | Bin 0 -> 272 bytes .../x86_64-cel_ds1000-r0/default_sku | 1 + .../installer.conf | 4 +- .../led-source-code/cmicx/Makefile | 1 - .../led-source-code/cmicx/custom_led.c | 87 +- .../led-source-code/cmicx/custom_led.lds | 0 .../x86_64-cel_ds1000-r0/led_proc_init.soc | 5 + .../media_settings.json | 1 - .../pcie.yaml | 108 +- .../pddf/pd-plugin.json | 8 +- .../pddf/pddf-device.json | 1367 +- .../pddf_support | 0 .../platform.json | 350 +- .../platform_asic | 0 .../platform_components.json | 12 + .../x86_64-cel_ds1000-r0/platform_reboot | 3 + .../plugins/eeprom.py | 0 .../plugins/psuutil.py | 0 .../plugins/sfputil.py | 0 .../pmon_daemon_control.json | 0 .../x86_64-cel_ds1000-r0/sensors.conf | 45 + .../system_health_monitoring_config.json | 4 +- .../DS2000/buffers.json.j2 | 3 + .../DS2000/buffers_defaults_def.j2 | 46 + .../DS2000/buffers_defaults_t0.j2 | 45 + .../DS2000/buffers_defaults_t1.j2 | 46 + .../x86_64-cel_ds2000-r0/DS2000/hwsku.json | 284 + .../x86_64-cel_ds2000-r0/DS2000/l2/config | 7 + .../x86_64-cel_ds2000-r0/DS2000/l3/config | 5 + .../DS2000/port_config.ini | 57 + .../x86_64-cel_ds2000-r0/DS2000/qos.json.j2 | 1 + .../DS2000/qos_config_t1.j2 | 175 + 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.../system_health_monitoring_config.json | 16 + .../DS3000/buffers.json.j2 | 2 + .../DS3000/buffers_defaults_def.j2 | 46 + .../DS3000/buffers_defaults_t0.j2 | 45 + .../DS3000/buffers_defaults_t1.j2 | 46 + .../x86_64-cel_ds3000-r0/DS3000/hwsku.json | 169 + .../x86_64-cel_ds3000-r0/DS3000/l2/config | 3 + .../x86_64-cel_ds3000-r0/DS3000/l3/config | 3 + .../DS3000/pg_profile_lookup.ini | 17 + .../DS3000/port_config.ini | 34 + .../x86_64-cel_ds3000-r0/DS3000/qos.json.j2 | 1 + .../x86_64-cel_ds3000-r0/DS3000/sai.profile | 2 + .../DS3000/td3-ds3000-32x100G.config.bcm | 545 + .../x86_64-cel_ds3000-r0/custom_led.bin | Bin 0 -> 130 bytes .../x86_64-cel_ds3000-r0/default_sku | 1 + .../x86_64-cel_ds3000-r0/installer.conf | 4 + .../led_proc_init.soc | 3 +- .../x86_64-cel_ds3000-r0/media_settings.json | 408 + .../celestica/x86_64-cel_ds3000-r0/pcie.yaml | 165 + .../x86_64-cel_ds3000-r0/pddf/pd-plugin.json | 138 + .../pddf/pddf-device-bmc.json | 2123 ++ .../pddf/pddf-device-nonbmc.json | 2216 ++ .../x86_64-cel_ds3000-r0/pddf_support | 0 .../x86_64-cel_ds3000-r0/platform.json | 267 + .../x86_64-cel_ds3000-r0/platform_asic | 1 + .../platform_components.json | 18 + .../x86_64-cel_ds3000-r0/platform_reboot | 3 + .../pmon_daemon_control.json | 7 + .../x86_64-cel_ds3000-r0/sensors.conf | 87 + .../system_health_monitoring_config.json | 16 + .../x86_64-cel_ds3000-r0/thermal_policy.json | 136 + .../Questone_2/custom_led.bin | Bin 0 -> 248 bytes .../Questone_2/hwsku.json | 284 + .../Questone_2/platform.json | 396 + .../Questone_2/platform_components.json | 17 + .../Questone_2/port_config.ini | 57 + .../Questone_2/sai.profile | 1 + .../Questone_2/sai_postinit_cmd.soc | 2 + .../Questone_2/td3-as13-48f8h.config.bcm | 359 + .../Questone_2A/custom_led.bin | Bin 0 -> 308 bytes .../Questone_2A/hwsku.json | 284 + .../Questone_2A/platform.json | 396 + .../Questone_2A/platform_components.json | 17 + .../Questone_2A/port_config.ini | 57 + .../Questone_2A/sai.profile.j2 | 16 + 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.../scripts/pddf_post_device_create.sh | 13 - .../belgite/utils/belgite_pddf_monitor.py | 272 - .../debian/changelog | 9 + .../sonic-platform-modules-cel/debian/control | 22 +- .../debian/platform-modules-belgite.install | 7 - .../debian/platform-modules-ds1000.install | 8 + ...tinst => platform-modules-ds1000.postinst} | 4 +- .../debian/platform-modules-ds2000.install | 12 + .../debian/platform-modules-ds2000.postinst | 7 + .../debian/platform-modules-ds3000.install | 11 + .../debian/platform-modules-ds3000.postinst | 4 + .../debian/platform-modules-dx010.init | 8 +- .../debian/platform-modules-haliburton.init | 9 + .../debian/platform-modules-questone2.init | 97 + .../debian/platform-modules-questone2.install | 9 + .../platform-modules-questone2.postinst | 6 + .../debian/platform-modules-seastone2.init | 25 +- .../debian/platform-modules-seastone2.install | 3 + .../platform-modules-seastone2.postinst | 5 +- .../platform-modules-silverstone-v2.install | 13 + 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.../modules/pddf_custom_wdt.c | 150 +- .../silverstone-v2/modules/pmbus.h | 504 + .../modules/psu_driver/pddf_psu_api.c | 478 + .../modules/psu_driver/pddf_psu_api.h | 31 + .../modules/psu_driver/pddf_psu_defs.h | 90 + .../modules/psu_driver/pddf_psu_driver.c | 398 + .../modules/psu_driver/pddf_psu_driver.h | 70 + .../silverstone-v2/modules/tps536c7.c | 133 + .../silverstone-v2/pddf/setup.py | 27 + .../pddf/sonic_platform/__init__.py | 4 + .../pddf/sonic_platform/chassis.py | 234 + .../pddf/sonic_platform/component.py | 230 + .../pddf/sonic_platform/eeprom.py | 78 + .../silverstone-v2/pddf/sonic_platform/fan.py | 93 + .../pddf/sonic_platform/fan_drawer.py | 21 + .../pddf/sonic_platform/helper.py | 143 + .../pddf/sonic_platform/platform.py | 23 + .../silverstone-v2/pddf/sonic_platform/psu.py | 46 + .../pddf/sonic_platform/sensor_list_config.py | 11 + .../silverstone-v2/pddf/sonic_platform/sfp.py | 103 + .../pddf/sonic_platform/thermal.py | 68 + .../pddf/sonic_platform/watchdog.py | 208 + .../scripts/pddf_post_device_create.sh | 20 + .../scripts/pddf_pre_driver_install.sh | 14 + .../scripts/platform_sensors.py | 180 + .../silverstone-v2/scripts/pre_pddf_init.py | 100 + .../silverstone-v2/scripts/sensors | 11 + .../silverstone_v2_platform_shutdown.sh | 39 + ...verstone-v2-pddf-platform-monitor.service} | 6 +- .../systemd/pddf-platform-init.service | 1 + .../utils/FanControl/CPUPIDRegulation.py | 129 + .../utils/FanControl/FanControl.py | 207 + .../utils/FanControl/FanLinearAdjustment.py | 156 + .../FanControl/SwitchInternalPIDRegulation.py | 145 + .../utils/FanControl/__init__.py | 5 + .../utils/pddf_fan_control_sensor_refresh.py | 26 + .../utils/pddf_sensor_list_refresh.py | 39 + .../silverstone/cfg/silverstone-modules.conf | 4 +- .../silverstone/modules/Makefile | 2 +- .../silverstone/modules/baseboard-lpc.c | 4 +- .../silverstone/modules/cls-i2c-mux-pca954x.c | 578 + .../silverstone/modules/cls-pca954x.h | 44 + .../silverstone/modules/cls-switchboard.c | 542 + .../silverstone/modules/switch_cpld.c | 416 + .../silverstone/modules/xcvr-cls.c | 520 + .../silverstone/modules/xcvr-cls.h | 41 + .../silverstone/scripts/platform_sensors.py | 114 +- .../silverstone/scripts/sensors | 2 +- .../scripts/silverstone_platform_shutdown.sh | 26 + .../silverstone/setup.py | 5 +- .../silverstone/sonic_platform/__init__.py | 2 + .../silverstone/sonic_platform/chassis.py | 452 + .../silverstone/sonic_platform/component.py | 181 + .../silverstone/sonic_platform/eeprom.py | 123 + .../silverstone}/sonic_platform/fan.py | 238 +- .../silverstone/sonic_platform/fan_drawer.py | 108 + .../silverstone/sonic_platform/helper.py | 190 + .../silverstone/sonic_platform/pcie.py | 15 + .../silverstone}/sonic_platform/platform.py | 0 .../silverstone/sonic_platform/psu.py | 338 + .../silverstone/sonic_platform/sfp.py | 232 + .../silverstone/sonic_platform/thermal.py | 205 + .../silverstone/sonic_platform/watchdog.py | 247 + 480 files changed, 83159 insertions(+), 6570 deletions(-) delete mode 100644 device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini delete mode 100644 device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile delete mode 100644 device/celestica/x86_64-cel_belgite-r0/custom_led.bin delete mode 100644 device/celestica/x86_64-cel_belgite-r0/default_sku delete mode 100644 device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original delete mode 100644 device/celestica/x86_64-cel_belgite-r0/platform_components.json rename device/celestica/{x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm => x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm} (98%) rename device/celestica/{x86_64-cel_belgite-r0/CELESTICA-BELGITE => x86_64-cel_ds1000-r0/DS1000}/hwsku.json (100%) create mode 100644 device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini create mode 100644 device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile create mode 100644 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rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pddf/pddf-device.json (87%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pddf_support (100%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/platform.json (62%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/platform_asic (100%) create mode 100644 device/celestica/x86_64-cel_ds1000-r0/platform_components.json create mode 100755 device/celestica/x86_64-cel_ds1000-r0/platform_reboot rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/eeprom.py (100%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/psuutil.py (100%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/sfputil.py (100%) rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pmon_daemon_control.json (100%) create mode 100644 device/celestica/x86_64-cel_ds1000-r0/sensors.conf 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platform/broadcom/sonic-platform-modules-cel/questone2}/sonic_platform/thermal.py (50%) create mode 100644 platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service create mode 100755 platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh create mode 100755 platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c rename platform/broadcom/sonic-platform-modules-cel/{belgite => silverstone-v2}/modules/pddf_custom_wdt.c (85%) create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh rename platform/broadcom/sonic-platform-modules-cel/{belgite/service/belgite-pddf-platform-monitor.service => silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service} (58%) rename platform/broadcom/sonic-platform-modules-cel/{belgite => silverstone-v2}/systemd/pddf-platform-init.service (89%) create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py rename {device/celestica/x86_64-cel_silverstone-r0 => platform/broadcom/sonic-platform-modules-cel/silverstone}/sonic_platform/fan.py (51%) create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py rename {device/celestica/x86_64-cel_silverstone-r0 => platform/broadcom/sonic-platform-modules-cel/silverstone}/sonic_platform/platform.py (100%) create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini deleted file mode 100644 index 90ecfa4859ad..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini +++ /dev/null @@ -1,57 +0,0 @@ -# name lanes alias index speed autoneg -Ethernet0 26 Ethernet1/0/1 1 1000 1 -Ethernet1 25 Ethernet1/0/2 2 1000 1 -Ethernet2 28 Ethernet1/0/3 3 1000 1 -Ethernet3 27 Ethernet1/0/4 4 1000 1 -Ethernet4 30 Ethernet1/0/5 5 1000 1 -Ethernet5 29 Ethernet1/0/6 6 1000 1 -Ethernet6 32 Ethernet1/0/7 7 1000 1 -Ethernet7 31 Ethernet1/0/8 8 1000 1 -Ethernet8 34 Ethernet1/0/9 9 1000 1 -Ethernet9 33 Ethernet1/0/10 10 1000 1 -Ethernet10 36 Ethernet1/0/11 11 1000 1 -Ethernet11 35 Ethernet1/0/12 12 1000 1 -Ethernet12 38 Ethernet1/0/13 13 1000 1 -Ethernet13 37 Ethernet1/0/14 14 1000 1 -Ethernet14 40 Ethernet1/0/15 15 1000 1 -Ethernet15 39 Ethernet1/0/16 16 1000 1 -Ethernet16 42 Ethernet1/0/17 17 1000 1 -Ethernet17 41 Ethernet1/0/18 18 1000 1 -Ethernet18 44 Ethernet1/0/19 19 1000 1 -Ethernet19 43 Ethernet1/0/20 20 1000 1 -Ethernet20 50 Ethernet1/0/21 21 1000 1 -Ethernet21 49 Ethernet1/0/22 22 1000 1 -Ethernet22 52 Ethernet1/0/23 23 1000 1 -Ethernet23 51 Ethernet1/0/24 24 1000 1 -Ethernet24 2 Ethernet1/0/25 25 1000 1 -Ethernet25 1 Ethernet1/0/26 26 1000 1 -Ethernet26 4 Ethernet1/0/27 27 1000 1 -Ethernet27 3 Ethernet1/0/28 28 1000 1 -Ethernet28 6 Ethernet1/0/29 29 1000 1 -Ethernet29 5 Ethernet1/0/30 30 1000 1 -Ethernet30 8 Ethernet1/0/31 31 1000 1 -Ethernet31 7 Ethernet1/0/32 32 1000 1 -Ethernet32 10 Ethernet1/0/33 33 1000 1 -Ethernet33 9 Ethernet1/0/34 34 1000 1 -Ethernet34 12 Ethernet1/0/35 35 1000 1 -Ethernet35 11 Ethernet1/0/36 36 1000 1 -Ethernet36 14 Ethernet1/0/37 37 1000 1 -Ethernet37 13 Ethernet1/0/38 38 1000 1 -Ethernet38 16 Ethernet1/0/39 39 1000 1 -Ethernet39 15 Ethernet1/0/40 40 1000 1 -Ethernet40 18 Ethernet1/0/41 41 1000 1 -Ethernet41 17 Ethernet1/0/42 42 1000 1 -Ethernet42 20 Ethernet1/0/43 43 1000 1 -Ethernet43 19 Ethernet1/0/44 44 1000 1 -Ethernet44 22 Ethernet1/0/45 45 1000 1 -Ethernet45 21 Ethernet1/0/46 46 1000 1 -Ethernet46 24 Ethernet1/0/47 47 1000 1 -Ethernet47 23 Ethernet1/0/48 48 1000 1 -Ethernet48 60 Ethernet1/0/49 49 10000 0 -Ethernet49 58 Ethernet1/0/50 50 10000 0 -Ethernet50 59 Ethernet1/0/51 51 10000 0 -Ethernet51 57 Ethernet1/0/52 52 10000 0 -Ethernet52 62 Ethernet1/0/53 53 10000 0 -Ethernet53 64 Ethernet1/0/54 54 10000 0 -Ethernet54 61 Ethernet1/0/55 55 10000 0 -Ethernet55 63 Ethernet1/0/56 56 10000 0 diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile deleted file mode 100644 index 2e5979fd112c..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile +++ /dev/null @@ -1 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/belgite.config.bcm diff --git a/device/celestica/x86_64-cel_belgite-r0/custom_led.bin b/device/celestica/x86_64-cel_belgite-r0/custom_led.bin deleted file mode 100644 index c1b5e0e1b1d6df0a03d57ba312715b5ebb0b772e..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 220 zcmV~$yH3JT0D$4YEecYRn<6MEP>_oz1jHLvEG0RED-*D2F_FQ6Cm@80MK KSJbh%;g)~zw=1~- diff --git a/device/celestica/x86_64-cel_belgite-r0/default_sku b/device/celestica/x86_64-cel_belgite-r0/default_sku deleted file mode 100644 index 3eeb370889f9..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/default_sku +++ /dev/null @@ -1 +0,0 @@ -CELESTICA-BELGITE t1 diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original b/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original deleted file mode 100644 index 8f43a3f6090d..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original +++ /dev/null @@ -1,686 +0,0 @@ -{ - "PLATFORM": - { - "num_psus":2, - "num_fantrays":3, - "num_fans_pertray":1, - "num_ports":56, - "num_temps":4, - "pddf_dev_types": - { - "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", - "CPLD": - [ - "i2c_cpld" - ], - "PSU": - [ - "psu_eeprom", - "psu_pmbus" - ], - "FAN": - [ - "fan_ctrl", - "fan_eeprom", - "fan_cpld" - ], - "PORT_MODULE": - [ - "pddf_xcvr" - ] - }, - "std_perm_kos": - [ - "i2c-ismt", - "i2c-i801" - ], - "std_kos": - [ - "i2c_dev", - "i2c_mux_pca954x", - "gpio_pca953x", - "mc24lc64t", - "optoe" - ], - "pddf_kos": - [ - "pddf_client_module", - "pddf_mux_module", - "pddf_psu_driver_module", - "pddf_psu_module", - "pddf_gpio_module", - "pddf_xcvr_module", - "pddf_xcvr_driver_module", - "pddf_led_module", - "pddf_fan_driver_module", - "pddf_fan_module", - "pddf_led_module" - ], - "custom_kos": - [ - "pddf_custom_psu" - ] - }, - "SYSTEM": - { - "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, - "i2c": - { - "CONTROLLERS": - [ - { "dev_name":"i2c-0", "dev":"SMBUS0" } - ] - } - }, - "SMBUS0": - { - "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, - "i2c": - { - "topo_info": {"dev_addr": "0x0"}, - "DEVICES": - [ - {"dev": "EEPROM1"}, - {"dev": "MUX1"} - ] - } - }, - "EEPROM1": - { - "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, - "i2c": - { - "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, - "dev_attr": {"access_mode": "BLOCK"}, - "attr_list": - [ - {"attr_name": "eeprom"} - ] - } - }, - "MUX1": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, - "i2c": - { - "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x2"}, - "channel": - [ - {"chn":"0", "dev":"CPLD1" }, - {"chn":"0", "dev":"FAN-CTRL1" }, - {"chn":"2", "dev":"PSU1" }, - {"chn":"2", "dev":"PSU2" }, - {"chn":"3", "dev":"TEMP1"}, - {"chn":"3", "dev":"TEMP2"}, - {"chn":"4", "dev":"TEMP3"}, - {"chn":"4", "dev":"TEMP4"}, - {"chn":"7", "dev":"MUX2"} - ] - } - }, - "MUX2": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x10"}, - "channel": - [ - {"chn":"0", "dev":"PORT49"}, - {"chn":"1", "dev":"PORT50"}, - {"chn":"2", "dev":"PORT51"}, - {"chn":"3", "dev":"PORT52"}, - {"chn":"4", "dev":"PORT53"}, - {"chn":"5", "dev":"PORT54"}, - {"chn":"6", "dev":"PORT55"}, - {"chn":"7", "dev":"PORT56"} - ] - } - }, - "CPLD1": - { - "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, - "i2c": - { - "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, - "dev_attr": {} - } - }, - "PSU1": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, - "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU1-PMBUS" } - ] - } - }, - "PSU1-PMBUS": - { - "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, - "i2c": - { - "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "PSU2": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" }, - "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU2-PMBUS"} - ] - } - }, - "PSU2-PMBUS": - { - "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, - "i2c": - { - "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "TEMP1": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U10"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP2": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U4"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP3": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U7"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP4": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U60"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "PORT49": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT49", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"49"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT49-EEPROM" }, - { "itf":"control", "dev":"PORT49-CTRL" } - ] - } - }, - "PORT49-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT49-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} - ] - } - }, - "PORT50": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT50", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"50"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT50-EEPROM" }, - { "itf":"control", "dev":"PORT50-CTRL" } - ] - } - }, - "PORT50-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT50-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} - - ] - } - }, - "PORT51": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT51", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"51"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT51-EEPROM" }, - { "itf":"control", "dev":"PORT51-CTRL" } - ] - } - }, - "PORT51-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT51-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} - ] - } - }, - "PORT52": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT52", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"52"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT52-EEPROM" }, - { "itf":"control", "dev":"PORT52-CTRL" } - ] - } - }, - "PORT52-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT52-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} - - ] - } - }, - "PORT53": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT53", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"53"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT53-EEPROM" }, - { "itf":"control", "dev":"PORT53-CTRL" } - ] - } - }, - "PORT53-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT53-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} - - ] - } - }, - "PORT54": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT54", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"54"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT54-EEPROM" }, - { "itf":"control", "dev":"PORT54-CTRL" } - ] - } - }, - "PORT54-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT54-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} - ] - } - }, - "PORT55": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT55", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"55"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT55-EEPROM" }, - { "itf":"control", "dev":"PORT55-CTRL" } - ] - } - }, - "PORT55-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT55-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} - ] - } - }, - "PORT56": - { - "dev_info": { "device_type":"SFP28", "device_name":"PORT56", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"56"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT56-EEPROM" }, - { "itf":"control", "dev":"PORT56-CTRL" } - ] - } - }, - "PORT56-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT56-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} - ] - } - }, - "FAN-CTRL1": - { - "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL1", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, - "dev_attr": { "num_fantrays":"3"}, - "attr_list": - [ - { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, - { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, - { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} - ] - } - }, - "SYS_LED": - { - "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, - "dev_attr": { "index":"0", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, - {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, - {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x0","swpld_addr_offset":"0x43"} - ] - } - }, - "FANTRAY1_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"0", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} - ] - } - }, - "FANTRAY2_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"1", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1B","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} - ] - } - }, - "FANTRAY3_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"2", "flag": "rw"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, - {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} - ] - } - } -} diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_components.json b/device/celestica/x86_64-cel_belgite-r0/platform_components.json deleted file mode 100644 index 23a4ce41cd67..000000000000 --- a/device/celestica/x86_64-cel_belgite-r0/platform_components.json +++ /dev/null @@ -1,10 +0,0 @@ -{ - "chassis": { - "E1070": { - "component": { - "SWCPLD": {}, - "BIOS": {} - } - } - } -} diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm similarity index 98% rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm index a249804582c9..fd2ca27948be 100644 --- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm @@ -166,4 +166,5 @@ portmap_56=63:10 pbmp_xport_xe=0x01FFFFFFFFFFFFFE -# \ No newline at end of file +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc +# diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json b/device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini new file mode 100644 index 000000000000..123c4f10df22 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed autoneg +Ethernet0 26 Eth1/1 1 1000 1 +Ethernet1 25 Eth2/1 2 1000 1 +Ethernet2 28 Eth3/1 3 1000 1 +Ethernet3 27 Eth4/1 4 1000 1 +Ethernet4 30 Eth5/1 5 1000 1 +Ethernet5 29 Eth6/1 6 1000 1 +Ethernet6 32 Eth7/1 7 1000 1 +Ethernet7 31 Eth8/1 8 1000 1 +Ethernet8 34 Eth9/1 9 1000 1 +Ethernet9 33 Eth10/1 10 1000 1 +Ethernet10 36 Eth11/1 11 1000 1 +Ethernet11 35 Eth12/1 12 1000 1 +Ethernet12 38 Eth13/1 13 1000 1 +Ethernet13 37 Eth14/1 14 1000 1 +Ethernet14 40 Eth15/1 15 1000 1 +Ethernet15 39 Eth16/1 16 1000 1 +Ethernet16 42 Eth17/1 17 1000 1 +Ethernet17 41 Eth18/1 18 1000 1 +Ethernet18 44 Eth19/1 19 1000 1 +Ethernet19 43 Eth20/1 20 1000 1 +Ethernet20 50 Eth21/1 21 1000 1 +Ethernet21 49 Eth22/1 22 1000 1 +Ethernet22 52 Eth23/1 23 1000 1 +Ethernet23 51 Eth24/1 24 1000 1 +Ethernet24 2 Eth25/1 25 1000 1 +Ethernet25 1 Eth26/1 26 1000 1 +Ethernet26 4 Eth27/1 27 1000 1 +Ethernet27 3 Eth28/1 28 1000 1 +Ethernet28 6 Eth29/1 29 1000 1 +Ethernet29 5 Eth30/1 30 1000 1 +Ethernet30 8 Eth31/1 31 1000 1 +Ethernet31 7 Eth32/1 32 1000 1 +Ethernet32 10 Eth33/1 33 1000 1 +Ethernet33 9 Eth34/1 34 1000 1 +Ethernet34 12 Eth35/1 35 1000 1 +Ethernet35 11 Eth36/1 36 1000 1 +Ethernet36 14 Eth37/1 37 1000 1 +Ethernet37 13 Eth38/1 38 1000 1 +Ethernet38 16 Eth39/1 39 1000 1 +Ethernet39 15 Eth40/1 40 1000 1 +Ethernet40 18 Eth41/1 41 1000 1 +Ethernet41 17 Eth42/1 42 1000 1 +Ethernet42 20 Eth43/1 43 1000 1 +Ethernet43 19 Eth44/1 44 1000 1 +Ethernet44 22 Eth45/1 45 1000 1 +Ethernet45 21 Eth46/1 46 1000 1 +Ethernet46 24 Eth47/1 47 1000 1 +Ethernet47 23 Eth48/1 48 1000 1 +Ethernet48 60 Eth49/1 49 10000 0 +Ethernet49 58 Eth50/1 50 10000 0 +Ethernet50 59 Eth51/1 51 10000 0 +Ethernet51 57 Eth52/1 52 10000 0 +Ethernet52 62 Eth53/1 53 10000 0 +Ethernet53 64 Eth54/1 54 10000 0 +Ethernet54 61 Eth55/1 55 10000 0 +Ethernet55 63 Eth56/1 56 10000 0 diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile new file mode 100644 index 000000000000..d58abd359c7f --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ds1000.config.bcm diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc new file mode 100644 index 000000000000..0de17febfeaf --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc @@ -0,0 +1,6 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 +modreg QTG_CHIP_CONFIG.qtgport0 PAUSE_PFC_SEL=1 +modreg QTG_CHIP_CONFIG.qtgport1 PAUSE_PFC_SEL=1 +modreg CHIP_CONFIG.pmqport0 PAUSE_PFC_SEL=1 +modreg CHIP_CONFIG.pmqport1 PAUSE_PFC_SEL=1 diff --git a/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin new file mode 100755 index 0000000000000000000000000000000000000000..1fe3d5abac5a44b16f6ae059e0811f236295265f GIT binary patch literal 272 zcmWN}J1;|V7{KA*zpdMG+^eW-PjBj2w3VVR)i$qz1zTgFBI)QO2nHi!kTUoPa*_^` zN@}vn!6cS0Qjtg+qlxDOJoVC(tjIwruoh-NLC_ge#)UYIGjSMN>QwaVVc}(KSG=iJ zDSFSXOd+@Fh`XlCY2EgpsN|JZL=`r2p7fU;Wm$-PKY!FP@ag_*InJtZBBUiRMO7cR zRrJ-u{I!*-*>1Hbk#!Y&w_N7WTcvy_w^F}<+);VSXXGgVS*ys+3=H69kRgT{VU#g^ z|Fxe0K|+KXC&C0KlS~mMMjV9$CoURjq={x)&}c=cpFTYF;--ggy6B{XcG{R{jwG`z Jl45}+{s5hIKs^8e literal 0 HcmV?d00001 diff --git a/device/celestica/x86_64-cel_ds1000-r0/default_sku b/device/celestica/x86_64-cel_ds1000-r0/default_sku new file mode 100644 index 000000000000..e83707dd8d95 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/default_sku @@ -0,0 +1 @@ +DS1000 t1 diff --git a/device/celestica/x86_64-cel_belgite-r0/installer.conf b/device/celestica/x86_64-cel_ds1000-r0/installer.conf similarity index 83% rename from device/celestica/x86_64-cel_belgite-r0/installer.conf rename to device/celestica/x86_64-cel_ds1000-r0/installer.conf index 430473933330..fbc96da1773d 100644 --- a/device/celestica/x86_64-cel_belgite-r0/installer.conf +++ b/device/celestica/x86_64-cel_ds1000-r0/installer.conf @@ -1,4 +1,4 @@ -CONSOLE_PORT=0x3f8 +CONSOLE_PORT=0xe060 CONSOLE_DEV=0 -CONSOLE_SPEED=9600 +CONSOLE_SPEED=115200 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=gpio_ich,i2c-ismt,i2c_ismt,i2c-i801,i2c_i801 crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog" diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile similarity index 99% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile index ddc700bfb87e..21bd48d0ab3b 100755 --- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile +++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile @@ -21,4 +21,3 @@ all: clean: rm -rf *.elf *.o *.map *.bin - diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c similarity index 79% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c index 712b5503e34b..fea5bc581f16 100755 --- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c +++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c @@ -82,31 +82,42 @@ This array would have port speed for each port, as per bit mapping defined in "soc_led_speed_t" in $SDK/include/shared/cmicfw/cmicx_led_public.h file. Here is an exception, please keep in mind: -1. For TH3, port status/speed of xe1 (physical port 258) is located in the +1. For TH3, port status/speed of xe1 (physical port 258) is located in the accumulation entry/speed array of physical port 259. ******************************************************************************/ #include #define ACTIVITY_TICKS 2 -#define READ_LED_ACCU_DATA(base, port) (*((uint16 *)(base + ((port - 1) * sizeof(uint32))))) -#define WRITE_LED_SEND_DATA(base, port, val) (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))) = val) + +/*! Macro to calculate LED RAM address. */ +#define LED_HW_RAM_ADDR(base, port) \ + (base + (port * sizeof(uint32))) + +/*! Macro to read LED RAM. */ +#define LED_HW_RAM_READ16(base, port) \ + *((uint16 *) LED_HW_RAM_ADDR(base, port)) + +/*! Macro to write LED RAM. */ +#define LED_HW_RAM_WRITE16(base, port, val) \ + *((uint16 *) LED_HW_RAM_ADDR(base, port)) = (val) #define PORT_NUM_TOTAL 56 #define LED_GREEN_BICOLOR 0x2 //bit : 10 #define LED_AMBER_BICOLOR 0x1 //bit : 01 #define LED_OFF_BICOLOR 0x3 //bit : 11 - +#define LED_SW_LINK_UP 0x1 + unsigned short portmap[] = { 25, 26, 27, 28, 29, 30, 31, 32, - 33, 34, 35, 36, 37, 38, 39, 40, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 49, 50, 51, 52, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 24, 23, 22, 21, - 20, 19, 18, 17, 16, 15, 14, 13, + 20, 19, 18, 17, 16, 15, 14, 13, 60, 58, 59, 57, 62, 64, 61, 63 -}; +}; /* @@ -123,49 +134,59 @@ unsigned short portmap[] = { void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl, uint32 activity_count) { - unsigned short accu_val = 0, send_val = 0; - unsigned short port, physical_port; - + uint8 idx = 0; + uint16 accu_val = 0, send_val = 0; + uint16 uc_port = 0, physical_port = 0; + /* Physical port numbers to be used */ - for(port = 1; port <= PORT_NUM_TOTAL; port++) { + for(uc_port = 0; uc_port < PORT_NUM_TOTAL; uc_port++) { + + // change to zero-based + physical_port = portmap[uc_port] - 1; - physical_port = portmap[port-1]; - /* Read value from led_ram bank0 */ - accu_val = READ_LED_ACCU_DATA(ctrl->accu_ram_base, physical_port); + accu_val = LED_HW_RAM_READ16(ctrl->accu_ram_base, physical_port); - send_val = 0xff; - - if (((accu_val & LED_OUTPUT_RX) || (accu_val & LED_OUTPUT_TX)) && (activity_count & ACTIVITY_TICKS)) + send_val = LED_OFF_BICOLOR; + + if (((accu_val & LED_HW_RX) || (accu_val & LED_HW_TX)) && (activity_count & ACTIVITY_TICKS)) { send_val = LED_OFF_BICOLOR; } - else if ( accu_val & LED_OUTPUT_LINK_UP) + else if (ctrl->led_control_data[physical_port] & LED_SW_LINK_UP) { send_val = LED_GREEN_BICOLOR; } else { send_val = LED_OFF_BICOLOR; - } - + } + /* Write value to led_ram bank1 */ - WRITE_LED_SEND_DATA(ctrl->pat_ram_base, port, send_val); + LED_HW_RAM_WRITE16(ctrl->pat_ram_base, uc_port, send_val); } /* for */ - /* Send the pattern over LED interface 1 for ports 1 - 56*/ - ctrl->intf_ctrl[1].valid = 1; - ctrl->intf_ctrl[1].start_row = 0; - ctrl->intf_ctrl[1].end_row = 55; - ctrl->intf_ctrl[1].pat_width = 2; - - /* Invalidate rest of the interfaces */ - ctrl->intf_ctrl[0].valid = 0; - ctrl->intf_ctrl[2].valid = 0; - ctrl->intf_ctrl[3].valid = 0; - ctrl->intf_ctrl[4].valid = 0; + /* Configure LED HW interfaces based on board configuration */ + for (idx = 0; idx < LED_HW_INTF_MAX_NUM; idx++) { + soc_led_intf_ctrl_t *lic = &ctrl->intf_ctrl[idx]; + switch (idx) { + case 0: + lic->valid = 0; + break; + case 1: + lic->valid = 1; + lic->start_row = 0; + lic->end_row = 55; + lic->pat_width = 2; + break; + default: + + /* Invalidate rest of the interfaces */ + lic->valid = 0; + break; + } + } return; } - diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds diff --git a/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc new file mode 100644 index 000000000000..7bd004f12b82 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc @@ -0,0 +1,5 @@ +linkscan off +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +sleep 3 +led auto on; led start +linkscan on diff --git a/device/celestica/x86_64-cel_belgite-r0/media_settings.json b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json similarity index 99% rename from device/celestica/x86_64-cel_belgite-r0/media_settings.json rename to device/celestica/x86_64-cel_ds1000-r0/media_settings.json index 50f7c545f09e..fc52c39c7a60 100644 --- a/device/celestica/x86_64-cel_belgite-r0/media_settings.json +++ b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json @@ -46,4 +46,3 @@ } } } - diff --git a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml similarity index 56% rename from device/celestica/x86_64-cel_belgite-r0/pcie.yaml rename to device/celestica/x86_64-cel_ds1000-r0/pcie.yaml index 46e202526716..47e5ecbead8f 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml +++ b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml @@ -1,121 +1,143 @@ - bus: '00' dev: '00' fn: '0' - id: 1980 - name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' - bus: '00' dev: '04' fn: '0' id: 19a1 - name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' - bus: '00' dev: '05' fn: '0' id: 19a2 - name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector' + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' - bus: '00' dev: '06' fn: '0' - id: 19e2 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' - bus: '00' - dev: '09' + dev: 09 fn: '0' - id: b277 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' - bus: '00' - dev: '0b' + dev: 0b fn: '0' - id: 1533 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' - bus: '00' - dev: '0e' + dev: 0e fn: '0' id: 19a8 - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port' + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' - bus: '00' dev: '12' fn: '0' id: 19ac - name: 'System peripheral: Intel Corporation DNV SMBus Contoller - Host' + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' - bus: '00' dev: '14' fn: '0' id: 19c2 - name: 'SATA controller: Intel Corporation DNV SATA Controller 1' + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' - bus: '00' dev: '15' fn: '0' id: 19d0 - name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller' + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' - bus: '00' dev: '16' fn: '0' - id: 15ce - name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' - bus: '00' dev: '18' fn: '0' id: 19d3 - name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1' + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '0' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '1' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1a' + dev: 1a fn: '2' id: 19d8 - name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller' + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '0' id: 19dc - name: 'ISA bridge: Intel Corporation DNV LPC or eSPI' + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '2' id: 19de - name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller' + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '4' id: 19df - name: 'SMBus: Intel Corporation DNV SMBus controller' + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' - bus: '00' - dev: '1f' + dev: 1f fn: '5' id: 19e0 - name: 'Serial bus controller [0c80]: Intel Corporation DNV SPI Controller' + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' - bus: '01' dev: '00' fn: '0' id: 19e2 - name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology' + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' - bus: '02' dev: '00' fn: '0' id: b277 - name: 'Ethernet controller: Broadcom Limited Device b277' + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)' - bus: '03' dev: '00' fn: '0' - id: 1533 - name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' - bus: '05' dev: '00' fn: '0' - id: 15ce - name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' - bus: '05' dev: '00' fn: '1' - id: 15ce - name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+' - + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json similarity index 84% rename from device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json index 454afd239964..f0ce24dc6524 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json +++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json @@ -11,14 +11,14 @@ }, "PSU": { - "psu_present": + "psu_present": { "i2c": { "valmap": { "1":true, "0":false } } }, - "psu_power_good": + "psu_power_good": { "i2c": { @@ -29,7 +29,7 @@ { "i2c": { - "valmap": { "0":"INTAKE", "1":"EXHAUST" } + "valmap": { "0":"intake", "1":"exhaust" } } }, "PSU_FAN_MAX_SPEED":"18000" @@ -40,7 +40,7 @@ { "i2c": { - "valmap": {"1":"EXHAUST", "0":"INTAKE"} + "valmap": {"1":"exhaust", "0":"intake"} } }, "present": diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json similarity index 87% rename from device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json index a97102c1f4cb..02293634e7f7 100644 --- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json +++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json @@ -1,685 +1,682 @@ -{ - "PLATFORM": - { - "num_psus":2, - "num_fantrays":3, - "num_fans_pertray":1, - "num_ports":56, - "num_temps":4, - "pddf_dev_types": - { - "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", - "CPLD": - [ - "i2c_cpld" - ], - "PSU": - [ - "psu_eeprom", - "psu_pmbus" - ], - "FAN": - [ - "fan_ctrl", - "fan_eeprom", - "fan_cpld" - ], - "PORT_MODULE": - [ - "pddf_xcvr" - ] - }, - "std_perm_kos": - [ - "i2c-ismt", - "i2c-i801" - ], - "std_kos": - [ - "i2c_dev", - "i2c_mux_pca954x force_deselect_on_exit=1", - "gpio_pca953x", - "mc24lc64t", - "optoe" - ], - "pddf_kos": - [ - "pddf_client_module", - "pddf_mux_module", - "pddf_psu_driver_module", - "pddf_psu_module", - "pddf_gpio_module", - "pddf_xcvr_module", - "pddf_xcvr_driver_module", - "pddf_led_module", - "pddf_fan_driver_module", - "pddf_fan_module", - "pddf_led_module" - ], - "custom_kos": - [ - "pddf_custom_psu", - "pddf_custom_wdt" - ] - }, - "SYSTEM": - { - "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, - "i2c": - { - "CONTROLLERS": - [ - { "dev_name":"i2c-0", "dev":"SMBUS0" } - ] - } - }, - "SMBUS0": - { - "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, - "i2c": - { - "topo_info": {"dev_addr": "0x0"}, - "DEVICES": - [ - {"dev": "EEPROM1"}, - {"dev": "MUX1"} - ] - } - }, - "EEPROM1": - { - "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, - "i2c": - { - "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, - "dev_attr": {"access_mode": "BLOCK"}, - "attr_list": - [ - {"attr_name": "eeprom"} - ] - } - }, - "MUX1": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, - "i2c": - { - "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0x2"}, - "channel": - [ - {"chn":"0", "dev":"CPLD1" }, - {"chn":"0", "dev":"FAN-CTRL" }, - {"chn":"2", "dev":"PSU1" }, - {"chn":"2", "dev":"PSU2" }, - {"chn":"3", "dev":"TEMP1"}, - {"chn":"3", "dev":"TEMP2"}, - {"chn":"4", "dev":"TEMP3"}, - {"chn":"4", "dev":"TEMP4"}, - {"chn":"7", "dev":"MUX2"} - ] - } - }, - "MUX2": - { - "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, - "dev_attr": { "virt_bus":"0xA"}, - "channel": - [ - {"chn":"0", "dev":"PORT49"}, - {"chn":"1", "dev":"PORT50"}, - {"chn":"2", "dev":"PORT51"}, - {"chn":"3", "dev":"PORT52"}, - {"chn":"4", "dev":"PORT53"}, - {"chn":"5", "dev":"PORT54"}, - {"chn":"6", "dev":"PORT55"}, - {"chn":"7", "dev":"PORT56"} - ] - } - }, - "CPLD1": - { - "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, - "i2c": - { - "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, - "dev_attr": {} - } - }, - "PSU1": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, - "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU1-PMBUS" } - ] - } - }, - "PSU1-PMBUS": - { - "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, - "i2c": - { - "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "PSU2": - { - "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" }, - "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, - "i2c": - { - "interface": - [ - { "itf":"pmbus", "dev":"PSU2-PMBUS"} - ] - } - }, - "PSU2-PMBUS": - { - "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, - "i2c": - { - "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, - "attr_list": - [ - { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, - { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, - { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, - { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, - { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, - { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} - ] - } - }, - "TEMP1": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U10"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP2": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U4"}, - "i2c": - { - "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP3": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U7"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "TEMP4": - { - "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, - "dev_attr": { "display_name":"LM75_U60"}, - "i2c": - { - "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, - "attr_list": - [ - { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, - { "attr_name": "temp1_max_hyst"}, - { "attr_name": "temp1_input"} - ] - } - }, - "PORT49": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"49"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT49-EEPROM" }, - { "itf":"control", "dev":"PORT49-CTRL" } - ] - } - }, - "PORT49-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT49-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, - "i2c": - { - "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} - ] - } - }, - "PORT50": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"50"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT50-EEPROM" }, - { "itf":"control", "dev":"PORT50-CTRL" } - ] - } - }, - "PORT50-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT50-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, - "i2c": - { - "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} - - ] - } - }, - "PORT51": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"51"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT51-EEPROM" }, - { "itf":"control", "dev":"PORT51-CTRL" } - ] - } - }, - "PORT51-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT51-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, - "i2c": - { - "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} - ] - } - }, - "PORT52": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"52"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT52-EEPROM" }, - { "itf":"control", "dev":"PORT52-CTRL" } - ] - } - }, - "PORT52-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT52-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, - "i2c": - { - "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} - - ] - } - }, - "PORT53": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"53"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT53-EEPROM" }, - { "itf":"control", "dev":"PORT53-CTRL" } - ] - } - }, - "PORT53-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT53-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, - "i2c": - { - "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} - - ] - } - }, - "PORT54": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"54"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT54-EEPROM" }, - { "itf":"control", "dev":"PORT54-CTRL" } - ] - } - }, - "PORT54-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT54-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, - "i2c": - { - "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} - ] - } - }, - "PORT55": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"55"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT55-EEPROM" }, - { "itf":"control", "dev":"PORT55-CTRL" } - ] - } - }, - "PORT55-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT55-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, - "i2c": - { - "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} - ] - } - }, - "PORT56": - { - "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"}, - "dev_attr": { "dev_idx":"56"}, - "i2c": - { - "interface": - [ - { "itf":"eeprom", "dev":"PORT56-EEPROM" }, - { "itf":"control", "dev":"PORT56-CTRL" } - ] - } - }, - "PORT56-EEPROM": - { - "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, - "attr_list": - [ - { "attr_name":"eeprom"} - ] - } - }, - "PORT56-CTRL": - { - "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, - "i2c": - { - "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, - "attr_list": - [ - { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, - { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} - ] - } - }, - "FAN-CTRL": - { - "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"}, - "i2c": - { - "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, - "dev_attr": { "num_fantrays":"3"}, - "attr_list": - [ - { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, - { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, - { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, - { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} - ] - } - }, - "SYS_LED": - { - "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, - "dev_attr": { "index":"0"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_AMBER","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, - {"attr_name":"STATUS_LED_COLOR_GREEN","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, - {"attr_name":"STATUS_LED_COLOR_OFF","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"} - ] - } - }, - "FANTRAY1_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"0"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} - ] - } - }, - "FANTRAY2_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"1"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} - ] - } - }, - "FANTRAY3_LED": - { - "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, - "dev_attr": { "index":"2"}, - "i2c" : { - "attr_list": - [ - {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, - {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} - ] - } - } -} +{ + "PLATFORM": + { + "num_psus":2, + "num_fantrays":3, + "num_fans_pertray":1, + "num_ports":56, + "num_temps":4, + "pddf_dev_types": + { + "description":"DS1000 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ] + }, + "std_perm_kos": + [ + "i2c-ismt", + "i2c-i801" + ], + "std_kos": + [ + "i2c_dev", + "i2c_mux_pca954x force_deselect_on_exit=1", + "gpio_pca953x", + "mc24lc64t", + "optoe" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_mux_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_gpio_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_led_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": + [ + "pddf_custom_psu", + "pddf_custom_wdt" + ] + }, + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" } + ] + } + }, + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"}, + {"dev": "MUX1"} + ] + } + }, + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": + [ + {"attr_name": "eeprom"} + ] + } + }, + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2"}, + "channel": + [ + {"chn":"0", "dev":"CPLD1" }, + {"chn":"0", "dev":"FAN-CTRL" }, + {"chn":"2", "dev":"PSU1" }, + {"chn":"2", "dev":"PSU2" }, + {"chn":"3", "dev":"TEMP1"}, + {"chn":"3", "dev":"TEMP2"}, + {"chn":"4", "dev":"TEMP3"}, + {"chn":"4", "dev":"TEMP4"}, + {"chn":"7", "dev":"MUX2"} + ] + } + }, + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xA"}, + "channel": + [ + {"chn":"0", "dev":"PORT49"}, + {"chn":"1", "dev":"PORT50"}, + {"chn":"2", "dev":"PORT51"}, + {"chn":"3", "dev":"PORT52"}, + {"chn":"4", "dev":"PORT53"}, + {"chn":"5", "dev":"PORT54"}, + {"chn":"6", "dev":"PORT55"}, + {"chn":"7", "dev":"PORT56"} + ] + } + }, + "CPLD1": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU1-PMBUS" } + ] + } + }, + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, + "attr_list": + [ + { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, + { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, + { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, + { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, + { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX1" }, + "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU2-PMBUS"} + ] + } + }, + "PSU2-PMBUS": + { + "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, + "attr_list": + [ + { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" }, + { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" }, + { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" }, + { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"}, + { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Front Left Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Front Right Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"Rear Right Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"}, + "dev_attr": { "display_name":"ASIC External Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "PORT49": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + "PORT50": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"} + ] + } + }, + "PORT51": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"} + ] + } + }, + "PORT52": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"} + ] + } + }, + "PORT53": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT54": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"} + ] + } + }, + "PORT55": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + "PORT56": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"} + ] + } + }, + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"3"}, + "attr_list": + [ + { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0}, + { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0} + ] + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"}, + {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"}, + {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf_support b/device/celestica/x86_64-cel_ds1000-r0/pddf_support similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/pddf_support rename to device/celestica/x86_64-cel_ds1000-r0/pddf_support diff --git a/device/celestica/x86_64-cel_belgite-r0/platform.json b/device/celestica/x86_64-cel_ds1000-r0/platform.json similarity index 62% rename from device/celestica/x86_64-cel_belgite-r0/platform.json rename to device/celestica/x86_64-cel_ds1000-r0/platform.json index 0e40fe8a88fa..79ae7f0bad87 100644 --- a/device/celestica/x86_64-cel_belgite-r0/platform.json +++ b/device/celestica/x86_64-cel_ds1000-r0/platform.json @@ -1,94 +1,70 @@ { "chassis": { - "name": "E1070", + "name": "DS1000", "status_led": { "controllable": true, "colors": ["green", "amber", "off"] }, - "thermal_manager": false, + "thermal_manager": false, "components": [ - { - "name": "SWCPLD" - }, - { - "name": "BIOS" - } - ], - "fans": [ { - "name": "Fantray1_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "CPLD SW" }, { - "name": "Fantray2_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "BIOS" }, { - "name": "Fantray3_1", - "speed": { - "controllable": true - }, - "status_led": { - "controllable": true, - "colors": ["green", "amber","off"] - } + "name": "ONIE" }, { - "name": "Fantray1_1", + "name": "SSD" + } + ], + "fans": [ + { + "name": "Fan 1", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } }, { - "name": "Fantray2_1", + "name": "Fan 2", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } }, { - "name": "Fantray3_1", + "name": "Fan 3", "speed": { "controllable": true }, "status_led": { "controllable": true, - "colors": ["green", "amber","off"] + "colors": ["green", "amber", "off"] } } ], "fan_drawers": [ { - "name": "Fantray1", + "name": "Drawer 1", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray1_1", + "name": "Fan 1", "speed": { "controllable": false }, @@ -99,17 +75,17 @@ ] }, { - "name": "Fantray2", + "name": "Drawer 2", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray2_1", + "name": "Fan 2", "speed": { "controllable": false }, @@ -120,17 +96,17 @@ ] }, { - "name": "Fantray3", + "name": "Drawer 3", "speed": { "controllable": false }, "status_led": { "controllable": false }, - "max_consumed_power": false, + "max_consumed_power": false, "fans": [ { - "name": "Fantray3_1", + "name": "Fan 3", "speed": { "controllable": false }, @@ -143,10 +119,10 @@ ], "psus": [ { - "name": "PSU1", + "name": "PSU 1", "fans": [ { - "name": "PSU1_FAN1", + "name": "PSU 1 Fan 1", "speed": { "controllable": false }, @@ -155,7 +131,7 @@ } } ], - "current": true, + "current": true, "power": true, "max_power": false, "voltage_high_threshold": false, @@ -167,10 +143,10 @@ } }, { - "name": "PSU2", + "name": "PSU 2", "fans": [ { - "name": "PSU2_FAN1", + "name": "PSU 2 Fan 1", "speed": { "controllable": false }, @@ -179,7 +155,7 @@ } } ], - "current": true, + "current": true, "power": true, "max_power": false, "voltage_high_threshold": false, @@ -193,175 +169,31 @@ ], "thermals": [ { - "name": "LM75_U10", + "name": "Front Left Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U4", + "name": "Front Right Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U7", + "name": "Rear Right Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true }, { - "name": "LM75_U60", + "name": "ASIC External Temp", "controllable": false, "low-threshold": false, "low-crit-threshold": true } ], "sfps": [ - { - "name": "PORT0" - }, - { - "name": "PORT1" - }, - { - "name": "PORT2" - }, - { - "name": "PORT3" - }, - { - "name": "PORT4" - }, - { - "name": "PORT5" - }, - { - "name": "PORT6" - }, - { - "name": "PORT7" - }, - { - "name": "PORT8" - }, - { - "name": "PORT9" - }, - { - "name": "PORT10" - }, - { - "name": "PORT11" - }, - { - "name": "PORT12" - }, - { - "name": "PORT13" - }, - { - "name": "PORT14" - }, - { - "name": "PORT15" - }, - { - "name": "PORT16" - }, - { - "name": "PORT17" - }, - { - "name": "PORT18" - }, - { - "name": "PORT19" - }, - { - "name": "PORT20" - }, - { - "name": "PORT21" - }, - { - "name": "PORT22" - }, - { - "name": "PORT23" - }, - { - "name": "PORT24" - }, - { - "name": "PORT25" - }, - { - "name": "PORT26" - }, - { - "name": "PORT27" - }, - { - "name": "PORT28" - }, - { - "name": "PORT29" - }, - { - "name": "PORT30" - }, - { - "name": "PORT31" - }, - { - "name": "PORT32" - }, - { - "name": "PORT33" - }, - { - "name": "PORT34" - }, - { - "name": "PORT35" - }, - { - "name": "PORT36" - }, - { - "name": "PORT37" - }, - { - "name": "PORT38" - }, - { - "name": "PORT39" - }, - { - "name": "PORT40" - }, - { - "name": "PORT41" - }, - { - "name": "PORT42" - }, - { - "name": "PORT43" - }, - { - "name": "PORT44" - }, - { - "name": "PORT45" - }, - { - "name": "PORT46" - }, - { - "name": "PORT47" - }, { "name": "PORT48" }, @@ -393,392 +225,392 @@ "index": "1", "lanes": "26", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/1"] + "1x1000[100,10]": ["Eth1/1"] } }, "Ethernet1": { "index": "2", "lanes": "25", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/2"] + "1x1000[100,10]": ["Eth2/1"] } }, "Ethernet2": { "index": "3", "lanes": "28", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/3"] + "1x1000[100,10]": ["Eth3/1"] } }, "Ethernet3": { "index": "4", "lanes": "27", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/4"] + "1x1000[100,10]": ["Eth4/1"] } }, "Ethernet4": { "index": "5", "lanes": "30", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/5"] + "1x1000[100,10]": ["Eth5/1"] } }, "Ethernet5": { "index": "6", "lanes": "29", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/6"] + "1x1000[100,10]": ["Eth6/1"] } }, "Ethernet6": { "index": "7", "lanes": "32", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/7"] + "1x1000[100,10]": ["Eth7/1"] } }, "Ethernet7": { "index": "8", "lanes": "31", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/8"] + "1x1000[100,10]": ["Eth8/1"] } }, "Ethernet8": { "index": "9", "lanes": "34", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/9"] + "1x1000[100,10]": ["Eth9/1"] } }, "Ethernet9": { "index": "10", "lanes": "33", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/10"] + "1x1000[100,10]": ["Eth10/1"] } }, "Ethernet10": { "index": "11", "lanes": "36", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/11"] + "1x1000[100,10]": ["Eth11/1"] } }, "Ethernet11": { "index": "12", "lanes": "35", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/12"] + "1x1000[100,10]": ["Eth12/1"] } }, "Ethernet12": { "index": "13", "lanes": "38", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/13"] + "1x1000[100,10]": ["Eth13/1"] } }, "Ethernet13": { "index": "14", "lanes": "37", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/14"] + "1x1000[100,10]": ["Eth14/1"] } }, "Ethernet14": { "index": "15", "lanes": "40", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/15"] + "1x1000[100,10]": ["Eth15/1"] } }, "Ethernet15": { "index": "16", "lanes": "39", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/16"] + "1x1000[100,10]": ["Eth16/1"] } }, "Ethernet16": { "index": "17", "lanes": "42", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/17"] + "1x1000[100,10]": ["Eth17/1"] } }, "Ethernet17": { "index": "18", "lanes": "41", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/18"] + "1x1000[100,10]": ["Eth18/1"] } }, "Ethernet18": { "index": "19", "lanes": "44", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/19"] + "1x1000[100,10]": ["Eth19/1"] } }, "Ethernet19": { "index": "20", "lanes": "43", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/20"] + "1x1000[100,10]": ["Eth20/1"] } }, "Ethernet20": { "index": "21", "lanes": "50", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/21"] + "1x1000[100,10]": ["Eth21/1"] } }, "Ethernet21": { "index": "22", "lanes": "49", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/22"] + "1x1000[100,10]": ["Eth22/1"] } }, "Ethernet22": { "index": "23", "lanes": "52", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/23"] + "1x1000[100,10]": ["Eth23/1"] } }, "Ethernet23": { "index": "24", "lanes": "51", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/24"] + "1x1000[100,10]": ["Eth24/1"] } }, "Ethernet24": { "index": "25", "lanes": "2", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/25"] + "1x1000[100,10]": ["Eth25/1"] } }, "Ethernet25": { "index": "26", "lanes": "1", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/26"] + "1x1000[100,10]": ["Eth26/1"] } }, "Ethernet26": { "index": "27", "lanes": "4", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/27"] + "1x1000[100,10]": ["Eth27/1"] } }, "Ethernet27": { "index": "28", "lanes": "3", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/28"] + "1x1000[100,10]": ["Eth28/1"] } }, "Ethernet28": { "index": "29", "lanes": "6", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/29"] + "1x1000[100,10]": ["Eth29/1"] } }, "Ethernet29": { "index": "30", "lanes": "5", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/30"] + "1x1000[100,10]": ["Eth30/1"] } }, "Ethernet30": { "index": "31", "lanes": "8", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/31"] + "1x1000[100,10]": ["Eth31/1"] } }, "Ethernet31": { "index": "32", "lanes": "7", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/32"] + "1x1000[100,10]": ["Eth32/1"] } }, "Ethernet32": { "index": "33", "lanes": "10", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/33"] + "1x1000[100,10]": ["Eth33/1"] } }, "Ethernet33": { "index": "34", "lanes": "9", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/34"] + "1x1000[100,10]": ["Eth34/1"] } }, "Ethernet34": { "index": "35", "lanes": "12", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/35"] + "1x1000[100,10]": ["Eth35/1"] } }, "Ethernet35": { "index": "36", "lanes": "11", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/36"] + "1x1000[100,10]": ["Eth36/1"] } }, "Ethernet36": { "index": "37", "lanes": "14", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/37"] + "1x1000[100,10]": ["Eth37/1"] } }, "Ethernet37": { "index": "38", "lanes": "13", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/38"] + "1x1000[100,10]": ["Eth38/1"] } }, "Ethernet38": { "index": "39", "lanes": "16", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/39"] + "1x1000[100,10]": ["Eth39/1"] } }, "Ethernet39": { "index": "40", "lanes": "15", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/40"] + "1x1000[100,10]": ["Eth40/1"] } }, "Ethernet40": { "index": "41", "lanes": "18", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/41"] + "1x1000[100,10]": ["Eth41/1"] } }, "Ethernet41": { "index": "42", "lanes": "17", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/42"] + "1x1000[100,10]": ["Eth42/1"] } }, "Ethernet42": { "index": "43", "lanes": "20", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/43"] + "1x1000[100,10]": ["Eth43/1"] } }, "Ethernet43": { "index": "44", "lanes": "19", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/44"] + "1x1000[100,10]": ["Eth44/1"] } }, "Ethernet44": { "index": "45", "lanes": "22", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/45"] + "1x1000[100,10]": ["Eth45/1"] } }, "Ethernet45": { "index": "46", "lanes": "21", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/46"] + "1x1000[100,10]": ["Eth46/1"] } }, "Ethernet46": { "index": "47", "lanes": "24", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/47"] + "1x1000[100,10]": ["Eth47/1"] } }, "Ethernet47": { "index": "48", "lanes": "23", "breakout_modes": { - "1x1000[100,10]": ["Ethernet1/0/48"] + "1x1000[100,10]": ["Eth48/1"] } }, "Ethernet48": { "index": "49", "lanes": "60", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/49"] + "1x10G[1G]": ["Eth49/1"] } }, "Ethernet49": { "index": "50", "lanes": "58", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/50"] + "1x10G[1G]": ["Eth50/1"] } }, "Ethernet50": { "index": "51", "lanes": "59", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/51"] + "1x10G[1G]": ["Eth51/1"] } }, "Ethernet51": { "index": "52", "lanes": "57", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/52"] + "1x10G[1G]": ["Eth52/1"] } }, "Ethernet52": { "index": "53", "lanes": "62", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/53"] + "1x10G[1G]": ["Eth53/1"] } }, "Ethernet53": { "index": "54", "lanes": "64", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/54"] + "1x10G[1G]": ["Eth54/1"] } }, "Ethernet54": { "index": "55", "lanes": "61", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/55"] + "1x10G[1G]": ["Eth55/1"] } }, "Ethernet55": { "index": "56", "lanes": "63", "breakout_modes": { - "1x10G[1G]": ["Ethernet1/0/56"] + "1x10G[1G]": ["Eth56/1"] } } } diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_asic b/device/celestica/x86_64-cel_ds1000-r0/platform_asic similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/platform_asic rename to device/celestica/x86_64-cel_ds1000-r0/platform_asic diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_components.json b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json new file mode 100644 index 000000000000..deeabc3dee41 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "DS1000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "CPLD SW": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_reboot b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot new file mode 100755 index 000000000000..233af9d08514 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds1000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py rename to device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py diff --git a/device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json similarity index 100% rename from device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json rename to device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json diff --git a/device/celestica/x86_64-cel_ds1000-r0/sensors.conf b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf new file mode 100644 index 000000000000..aeb82af7eaf5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf @@ -0,0 +1,45 @@ +# libsensors configuration file for Celestica DS1000 + +bus "i2c-6" "i2c-0-mux (chan_id 4)" +bus "i2c-4" "i2c-0-mux (chan_id 2)" +bus "i2c-2" "i2c-0-mux (chan_id 0)" +bus "i2c-5" "i2c-0-mux (chan_id 3)" + +chip "fan_cpld-i2c-2-66" + label fan1 "Fantray1_1 speed" + label fan2 "Fantray2_1 speed" + label fan3 "Fantray3_1 speed" + +chip "psu_pmbus-i2c-4-58" + label fan1 "PSU1 fan speed" + label in3 "PSU1 output voltage" + label temp1 "PSU1 temperature" + label power2 "PSU1 output power" + label curr2 "PSU1 output current" + +chip "psu_pmbus-i2c-4-59" + label fan1 "PSU2 fan speed" + label in3 "PSU2 output voltage" + label temp1 "PSU2 temperature" + label power2 "PSU2 output power" + label curr2 "PSU2 output current" + +chip "lm75-i2c-5-48" + label temp1 "Front Left Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-5-49" + label temp1 "Front Right Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-6-4a" + label temp1 "Rear Right Temp" + set temp1_max 50 + set temp1_max_hyst 45 + +chip "lm75-i2c-6-49" + set temp1_max 110 + set temp1_max_hyst 105 + label temp1 "ASIC External Temp" diff --git a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json similarity index 86% rename from device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json rename to device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json index 28b3e30a6699..6f7d70895afd 100644 --- a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json +++ b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json @@ -3,8 +3,8 @@ "devices_to_ignore": [ "asic", "psu.temperature", - "PSU1_FAN1", - "PSU2_FAN1" + "PSU 1 Fan 1", + "PSU 2 Fan 1" ], "user_defined_checkers": [], "polling_interval": 60, diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..5fe9cabcfd34 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "196608", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "33004032", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "12766208", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"33004032" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json new file mode 100644 index 000000000000..059666102d99 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G[10G]", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config new file mode 100644 index 000000000000..1cc35f24ade0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config @@ -0,0 +1,7 @@ +l2_mem_entries=229376 +l3_mem_entries=16384 +l3_alpm_enable=0 +fpem_mem_entries=32768 +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +flow_init_mode=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config new file mode 100644 index 000000000000..fff0cf54b08a --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config @@ -0,0 +1,5 @@ +l2_mem_entries=40960 +l3_mem_entries=40960 +l3_alpm_enable=2 +use_all_splithorizon_groups=1 +sai_tunnel_support=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini new file mode 100644 index 000000000000..9b9c028ebaac --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 29 Eth1/1 1 25000 9216 up rs +Ethernet1 30 Eth2/1 2 25000 9216 up rs +Ethernet2 31 Eth3/1 3 25000 9216 up rs +Ethernet3 32 Eth4/1 4 25000 9216 up rs +Ethernet4 33 Eth5/1 5 25000 9216 up rs +Ethernet5 34 Eth6/1 6 25000 9216 up rs +Ethernet6 35 Eth7/1 7 25000 9216 up rs +Ethernet7 36 Eth8/1 8 25000 9216 up rs +Ethernet8 37 Eth9/1 9 25000 9216 up rs +Ethernet9 38 Eth10/1 10 25000 9216 up rs +Ethernet10 39 Eth11/1 11 25000 9216 up rs +Ethernet11 40 Eth12/1 12 25000 9216 up rs +Ethernet12 49 Eth13/1 13 25000 9216 up rs +Ethernet13 50 Eth14/1 14 25000 9216 up rs +Ethernet14 51 Eth15/1 15 25000 9216 up rs +Ethernet15 52 Eth16/1 16 25000 9216 up rs +Ethernet16 53 Eth17/1 17 25000 9216 up rs +Ethernet17 54 Eth18/1 18 25000 9216 up rs +Ethernet18 55 Eth19/1 19 25000 9216 up rs +Ethernet19 56 Eth20/1 20 25000 9216 up rs +Ethernet20 57 Eth21/1 21 25000 9216 up rs +Ethernet21 58 Eth22/1 22 25000 9216 up rs +Ethernet22 59 Eth23/1 23 25000 9216 up rs +Ethernet23 60 Eth24/1 24 25000 9216 up rs +Ethernet24 9 Eth25/1 25 25000 9216 up rs +Ethernet25 10 Eth26/1 26 25000 9216 up rs +Ethernet26 11 Eth27/1 27 25000 9216 up rs +Ethernet27 12 Eth28/1 28 25000 9216 up rs +Ethernet28 13 Eth29/1 29 25000 9216 up rs +Ethernet29 14 Eth30/1 30 25000 9216 up rs +Ethernet30 15 Eth31/1 31 25000 9216 up rs +Ethernet31 16 Eth32/1 32 25000 9216 up rs +Ethernet32 17 Eth33/1 33 25000 9216 up rs +Ethernet33 18 Eth34/1 34 25000 9216 up rs +Ethernet34 19 Eth35/1 35 25000 9216 up rs +Ethernet35 20 Eth36/1 36 25000 9216 up rs +Ethernet36 61 Eth37/1 37 25000 9216 up rs +Ethernet37 62 Eth38/1 38 25000 9216 up rs +Ethernet38 63 Eth39/1 39 25000 9216 up rs +Ethernet39 64 Eth40/1 40 25000 9216 up rs +Ethernet40 65 Eth41/1 41 25000 9216 up rs +Ethernet41 66 Eth42/1 42 25000 9216 up rs +Ethernet42 67 Eth43/1 43 25000 9216 up rs +Ethernet43 68 Eth44/1 44 25000 9216 up rs +Ethernet44 69 Eth45/1 45 25000 9216 up rs +Ethernet45 70 Eth46/1 46 25000 9216 up rs +Ethernet46 71 Eth47/1 47 25000 9216 up rs +Ethernet47 72 Eth48/1 48 25000 9216 up rs +Ethernet48 41,42,43,44 Eth49/1 49 100000 9216 up rs +Ethernet52 45,46,47,48 Eth50/1 50 100000 9216 up rs +Ethernet56 73,74,75,76 Eth51/1 51 100000 9216 up rs +Ethernet60 77,78,79,80 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 21,22,23,24 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 25,26,27,28 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 new file mode 100644 index 000000000000..ee67c6e26221 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config_t1.j2' %} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 new file mode 100644 index 000000000000..5fe5324a85c1 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 @@ -0,0 +1,175 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, +{% if asic_type in pfc_to_pg_map_supported_asics %} + "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{% endif %} + "PORT_QOS_MAP": { +{% for port in PORT_ACTIVE %} + "{{ port }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", +{% if asic_type in pfc_to_pg_map_supported_asics %} + "pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]", +{% endif %} + "pfc_enable" : "3,4" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile new file mode 100644 index 000000000000..6ca4984b91d3 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-2a.config.bcm +SAI_LED_PORT_LOCATOR_FW_FILE=/usr/share/sonic/platform/port_locator.bin diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm new file mode 100644 index 000000000000..5abc527f9419 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm @@ -0,0 +1,461 @@ +#polarity/lanemap is using TH2 style. +core_clock_frequency=1525 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + + +oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFFFFFFFFFFE + +parity_enable=0 +mem_cache_enable=0 + +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=16384 +l2xmsg_mode=1 + +# Tunnel +sai_tunnel_support=1 +bcm_tunnel_term_compatible_mode=1 +use_all_splithorizon_groups=1 + +# RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +flow_init_mode=1 + +# Platform specfic +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_alpm_enable=2 +l3_max_ecmp_mode=1 +max_vp_lags=0 +memlist_enable=1 +reglist_enable=1 +miim_intr_enable=0 +module_64ports=1 +port_flex_enable=1 +schan_intr_enable=0 +stable_size=0x5500000 ;Specify the stable cache size in bytes used for Warm boot operations +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +l3_alpm_ipv6_128b_bkt_rsvd=1 + + + +#FC0 +portmap_1=1:100 + +#FC1 +portmap_2=5:100 + +#FC2 +portmap_3=9:25 +portmap_4=10:25 +portmap_5=11:25 +portmap_6=12:25 + +#FC3 +portmap_7=13:25 +portmap_8=14:25 +portmap_9=15:25 +portmap_10=16:25 + +#FC4 +portmap_11=17:25 +portmap_12=18:25 +portmap_13=19:25 +portmap_14=20:25 + +#FC5 +portmap_15=21:100 + +#FC6 +portmap_16=25:100 + +#FC7 +portmap_29=29:25 +portmap_30=30:25 +portmap_31=31:25 +portmap_20=32:25 + +#FC8 +portmap_21=33:25 +portmap_22=34:25 +portmap_23=35:25 +portmap_24=36:25 + +#FC9 +portmap_25=37:25 +portmap_26=38:25 +portmap_27=39:25 +portmap_28=40:25 + +#FC10 +portmap_33=41:100 + +#FC11 +portmap_61=45:100 + +#FC12 +portmap_62=49:25 +portmap_63=50:25 +portmap_37=51:25 +portmap_38=52:25 + +#FC13 +portmap_39=53:25 +portmap_40=54:25 +portmap_41=55:25 +portmap_42=56:25 + +#FC14 +portmap_43=57:25 +portmap_44=58:25 +portmap_45=59:25 +portmap_46=60:25 + +#FC15 +portmap_47=61:25 +portmap_48=62:25 +portmap_49=63:25 +portmap_50=64:25 + +#FC16 +portmap_51=65:25 +portmap_52=66:25 +portmap_53=67:25 +portmap_54=68:25 + +#FC17 +portmap_55=69:25 +portmap_56=70:25 +portmap_57=71:25 +portmap_58=72:25 + +#FC18 +portmap_59=73:100 + +#FC19 +portmap_60=77:100 + + +#portmap_64=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + +dport_map_port_29=1 +dport_map_port_30=2 +dport_map_port_31=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_62=13 +dport_map_port_63=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_61=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc + diff --git a/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin new file mode 100644 index 0000000000000000000000000000000000000000..7e6b6f96c1d420e32a26357685b97149cd1eabbb GIT binary patch literal 264 zcmV+j0r&p!wcbWoMovaWM&Pw6OavkWC4eKCMt(aBK%7RRCUyV{;6X+UKv_arK>{&D zXqi$3G66KQLJrVFXq{3ccmX?`vYP+_Xj@txLh8^d0B1%3FYD3e=KvxBAw(mYMgk-_ zJD5g*L;xe4Mj11jMnf~3Mg`!(U;$xEMnhqQVF5DJvH&ag&;ctA&=mnjMrTHMQ2{gC zvIHyf+3>u(MzTh!MxaLUy}@BqMgwA7MnhtRV&vzzH~;`09v>hfA|oUvCMPH{GBY$a zHa9pqIy*cG3JVMk4i69!5)%|XK0iP~LPJDFMn^~i0s{mU78e)=1_uZk8XFubDl054 OE-x@iN=r;lPESzT@lU@1 literal 0 HcmV?d00001 diff --git a/device/celestica/x86_64-cel_ds2000-r0/default_sku b/device/celestica/x86_64-cel_ds2000-r0/default_sku new file mode 100644 index 000000000000..ae9d33331e85 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/default_sku @@ -0,0 +1 @@ +DS2000 t1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/installer.conf b/device/celestica/x86_64-cel_ds2000-r0/installer.conf new file mode 100644 index 000000000000..bb956b2aefb1 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_DEV=0 +CONSOLE_PORT=0xe060 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off noirqdebug acpi_no_watchdog" diff --git a/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc new file mode 100644 index 000000000000..6f242fa07d89 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc @@ -0,0 +1,8 @@ +#Enable all ports +#port all en=1 +#sleep 6 +#linkscan 250000; port xe,ce linkscan=on + +#Load LED +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on; led start diff --git a/device/celestica/x86_64-cel_ds2000-r0/media_settings.json b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json new file mode 100644 index 000000000000..299dfd211ecf --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json @@ -0,0 +1,834 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-48": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0x19410a" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a" + } + } + }, + "49-60": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0x19410a", + "lane1": "0x19410a", + "lane2": "0x19410a", + "lane3": "0x19410a" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a", + "lane1": "0x14410a", + "lane2": "0x14410a", + "lane3": "0x14410a" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "1": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "2": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "3": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "4": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094a04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "5": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b06" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "6": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "7": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "8": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "9": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "10": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "11": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "12": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x053602" + } + } + }, + "13": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "14": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02" + } + } + }, + "15": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "16": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "17": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "18": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "19": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "20": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "21": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "22": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "23": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "24": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "25": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x124702" + } + } + }, + "26": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x114602" + } + } + }, + "27": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402" + } + } + }, + "28": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402" + } + } + }, + "29": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202" + } + } + }, + "30": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202" + } + } + }, + "31": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "32": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124305" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0d4002" + } + } + }, + "33": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02" + } + } + }, + "34": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "35": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0b3c02" + } + } + }, + "36": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124b07" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0b3c02" + } + } + }, + "37": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "38": { + "25000-optical": { + "preemphasis": { + "lane0": "0x104c05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3d02" + } + } + }, + "39": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073702" + } + } + }, + "40": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "41": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "42": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "43": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x073802" + } + } + }, + "44": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094c04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "45": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x083902" + } + } + }, + "46": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "47": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b05" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "48": { + "25000-optical": { + "preemphasis": { + "lane0": "0x094b04" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x093a02" + } + } + }, + "49": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0e4202", + "lane1": "0x0e4202", + "lane2": "0x0e4202", + "lane3": "0x0e4202" + } + } + }, + "50": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x124702", + "lane1": "0x124702", + "lane2": "0x124702", + "lane3": "0x124702" + } + } + }, + "51": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402", + "lane1": "0x0f4402", + "lane2": "0x0f4402", + "lane3": "0x0f4402" + } + } + }, + "52": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0f4402", + "lane1": "0x0f4402", + "lane2": "0x0f4402", + "lane3": "0x0f4402" + } + } + }, + "53": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154708", + "lane1": "0x154708", + "lane2": "0x154708", + "lane3": "0x154708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02", + "lane1": "0x0a3b02", + "lane2": "0x0a3b02", + "lane3": "0x0a3b02" + } + } + }, + "54": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154609", + "lane1": "0x154609", + "lane2": "0x154609", + "lane3": "0x154609" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02", + "lane1": "0x0c3f02", + "lane2": "0x0c3f02", + "lane3": "0x0c3f02" + } + } + }, + "55": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164509", + "lane1": "0x164509", + "lane2": "0x164509", + "lane3": "0x164509" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0a3b02", + "lane1": "0x0a3b02", + "lane2": "0x0a3b02", + "lane3": "0x0a3b02" + } + } + }, + "56": { + "25000-optical": { + "preemphasis": { + "lane0": "0x154708", + "lane1": "0x154708", + "lane2": "0x154708", + "lane3": "0x154708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0x0c3f02", + "lane1": "0x0c3f02", + "lane2": "0x0c3f02", + "lane3": "0x0c3f02" + } + } + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..839c9b5dfccd --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json @@ -0,0 +1,145 @@ +{ + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": { "0": true, "4":false, "8":false } + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + + "psu_power_good": + { + "bmc": + { + "valmap": { "1": true, "2": true, "0":false } + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": { "B2F":"INTAKE", "F2B":"EXHAUST" } + }, + "i2c": + { + "valmap": { "FSP550-29FM":"INTAKE", "FSP550-20FM":"EXHAUST"} + } + + }, + + "psu_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "PSU_FAN_MAX_SPEED":"18000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + } + }, + "drawer_name": + { + "1": "Fantray 1", + "2": "Fantray 2", + "3": "Fantray 3", + "4": "Fantray 4" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + } + }, + "present": + { + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "i2c": + { + "valmap": {"1":true, "0":false} + } + }, + + "fan_master_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)", + + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)", + + "FAN_MAX_RPM_SPEED": + { + "Front": "23300", + "Rear": "20300" + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json new file mode 100644 index 000000000000..5f4ef1700b91 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json @@ -0,0 +1,2891 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":56, + "num_temps":9, + "bmc_present": "True", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xd"}, + "channel": + [ + { "chn":"1", "dev":"MUX1" }, + { "chn":"1", "dev":"MUX2" }, + { "chn":"1", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"1", "dev":"MUX6" }, + { "chn":"2", "dev":"MUX7" }, + { "chn":"3", "dev":"CPLD1" }, + { "chn":"3", "dev":"CPLD2" }, + { "chn":"4", "dev":"CPLD_B" } + ] + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" }, + { "chn":"1", "dev":"PORT34" }, + { "chn":"2", "dev":"PORT35" }, + { "chn":"3", "dev":"PORT36" }, + { "chn":"4", "dev":"PORT37" }, + { "chn":"5", "dev":"PORT38" }, + { "chn":"6", "dev":"PORT39" }, + { "chn":"7", "dev":"PORT40" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT41" }, + { "chn":"1", "dev":"PORT42" }, + { "chn":"2", "dev":"PORT43" }, + { "chn":"3", "dev":"PORT44" }, + { "chn":"4", "dev":"PORT45" }, + { "chn":"5", "dev":"PORT46" }, + { "chn":"6", "dev":"PORT47" }, + { "chn":"7", "dev":"PORT48" } + ] + } + }, + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT53" }, + { "chn":"1", "dev":"PORT54" }, + { "chn":"2", "dev":"PORT55" }, + { "chn":"3", "dev":"PORT56" }, + { "chn":"4", "dev":"PORT49" }, + { "chn":"5", "dev":"PORT50" }, + { "chn":"6", "dev":"PORT51" }, + { "chn":"7", "dev":"PORT52" } + ] + } + }, + + "CPLD1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "PORT1": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"34"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT34-EEPROM" }, + { "itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT34-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT35": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"35"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT35-EEPROM" }, + { "itf":"control", "dev":"PORT35-CTRL" } + ] + } + }, + "PORT35-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT35-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT36": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"36"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT36-EEPROM" }, + { "itf":"control", "dev":"PORT36-CTRL" } + ] + } + }, + "PORT36-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT36-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT37": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"37"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT37-EEPROM" }, + { "itf":"control", "dev":"PORT37-CTRL" } + ] + } + }, + "PORT37-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT37-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT38": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"38"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT38-EEPROM" }, + { "itf":"control", "dev":"PORT38-CTRL" } + ] + } + }, + "PORT38-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT38-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT39": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"39"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT39-EEPROM" }, + { "itf":"control", "dev":"PORT39-CTRL" } + ] + } + }, + "PORT39-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT39-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT40": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"40"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT40-EEPROM" }, + { "itf":"control", "dev":"PORT40-CTRL" } + ] + } + }, + "PORT40-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT40-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT41": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"41"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT41-EEPROM" }, + { "itf":"control", "dev":"PORT41-CTRL" } + ] + } + }, + "PORT41-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT41-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT42": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"42"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT42-EEPROM" }, + { "itf":"control", "dev":"PORT42-CTRL" } + ] + } + }, + "PORT42-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT42-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT43": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"43"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT43-EEPROM" }, + { "itf":"control", "dev":"PORT43-CTRL" } + ] + } + }, + "PORT43-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT43-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT44": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"44"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT44-EEPROM" }, + { "itf":"control", "dev":"PORT44-CTRL" } + ] + } + }, + "PORT44-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT44-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT45": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"45"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT45-EEPROM" }, + { "itf":"control", "dev":"PORT45-CTRL" } + ] + } + }, + "PORT45-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT45-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT46": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"46"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT46-EEPROM" }, + { "itf":"control", "dev":"PORT46-CTRL" } + ] + } + }, + "PORT46-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT46-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT47": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"47"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT47-EEPROM" }, + { "itf":"control", "dev":"PORT47-CTRL" } + ] + } + }, + "PORT47-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT47-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT48": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"48"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT48-EEPROM" }, + { "itf":"control", "dev":"PORT48-CTRL" } + ] + } + }, + "PORT48-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT48-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT49": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + + ] + } + }, + + "PORT50": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT51": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT52": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT53": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT54": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT55": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT56": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x2"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x8"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x21", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1F", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x20", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1B", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x19", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1C", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1D", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}, + { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x1"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x4"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x24", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x22", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x23", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x25", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x26", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}, + { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"}, + { "attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"}, + { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"}, + { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"}, + { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"}, + { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"}, + { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "type": "raw", "raw":"1", "offset": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "type": "raw", "raw": "1", "offset": "0"} + + ] + } + } + }, + + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x01", "type": "raw", "raw": "1", "offset":"0"} + + ] + } + } + }, + + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x02", "type": "raw", "raw": "1", "offset": "0"} + + ] + } + } + }, + + + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Front Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x03", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x03", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Rear Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x04", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x06", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + + "TEMP7": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x05", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP8": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"VDD CORE Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + + "TEMP9": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"VDD ANLG Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "type": "raw", "raw": "1", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "type": "raw", "raw": "1", "offset" : "0"} + + ] + } + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"} + ] + } + } + }, + "ALARM_LED": + { + "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"} + ] + } + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": { "index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": { "index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": { "index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"} + ] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json new file mode 100644 index 000000000000..0335e9cf8c03 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json @@ -0,0 +1,2889 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":56, + "num_temps":8, + "bmc_present": "False", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_psu_module", + "pddf_fan_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo", + "pddf_custom_psu_driver_module" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xd"}, + "channel": + [ + { "chn":"1", "dev":"MUX1" }, + { "chn":"1", "dev":"MUX2" }, + { "chn":"1", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"1", "dev":"MUX6" }, + { "chn":"2", "dev":"MUX7" }, + { "chn":"3", "dev":"CPLD1" }, + { "chn":"3", "dev":"CPLD2" }, + { "chn":"6", "dev":"CPLD_B" }, + { "chn":"6", "dev":"FAN-CTRL" }, + { "chn":"7", "dev":"MUX8" }, + { "chn":"9", "dev":"TEMP7" }, + { "chn":"9", "dev":"TEMP8" }, + { "chn":"10", "dev":"TEMP1" }, + { "chn":"10", "dev":"TEMP2" }, + { "chn":"10", "dev":"TEMP3" }, + { "chn":"10", "dev":"TEMP4" }, + { "chn":"10", "dev":"TEMP5" }, + { "chn":"10", "dev":"TEMP6" } + ] + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" }, + { "chn":"1", "dev":"PORT34" }, + { "chn":"2", "dev":"PORT35" }, + { "chn":"3", "dev":"PORT36" }, + { "chn":"4", "dev":"PORT37" }, + { "chn":"5", "dev":"PORT38" }, + { "chn":"6", "dev":"PORT39" }, + { "chn":"7", "dev":"PORT40" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT41" }, + { "chn":"1", "dev":"PORT42" }, + { "chn":"2", "dev":"PORT43" }, + { "chn":"3", "dev":"PORT44" }, + { "chn":"4", "dev":"PORT45" }, + { "chn":"5", "dev":"PORT46" }, + { "chn":"6", "dev":"PORT47" }, + { "chn":"7", "dev":"PORT48" } + ] + } + }, + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT53" }, + { "chn":"1", "dev":"PORT54" }, + { "chn":"2", "dev":"PORT55" }, + { "chn":"3", "dev":"PORT56" }, + { "chn":"4", "dev":"PORT49" }, + { "chn":"5", "dev":"PORT50" }, + { "chn":"6", "dev":"PORT51" }, + { "chn":"7", "dev":"PORT52" } + ] + } + }, + + "CPLD1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX8": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX8", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x3a", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PSU1"}, + {"chn":"1", "dev":"PSU2"} + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"34"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT34-EEPROM" }, + { "itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT34-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT35": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"35"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT35-EEPROM" }, + { "itf":"control", "dev":"PORT35-CTRL" } + ] + } + }, + "PORT35-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT35-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT36": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"36"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT36-EEPROM" }, + { "itf":"control", "dev":"PORT36-CTRL" } + ] + } + }, + "PORT36-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT36-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT37": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"37"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT37-EEPROM" }, + { "itf":"control", "dev":"PORT37-CTRL" } + ] + } + }, + "PORT37-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT37-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT38": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"38"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT38-EEPROM" }, + { "itf":"control", "dev":"PORT38-CTRL" } + ] + } + }, + "PORT38-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT38-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT39": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"39"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT39-EEPROM" }, + { "itf":"control", "dev":"PORT39-CTRL" } + ] + } + }, + "PORT39-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT39-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT40": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"40"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT40-EEPROM" }, + { "itf":"control", "dev":"PORT40-CTRL" } + ] + } + }, + "PORT40-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT40-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT41": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"41"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT41-EEPROM" }, + { "itf":"control", "dev":"PORT41-CTRL" } + ] + } + }, + "PORT41-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT41-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT42": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"42"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT42-EEPROM" }, + { "itf":"control", "dev":"PORT42-CTRL" } + ] + } + }, + "PORT42-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT42-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT43": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"43"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT43-EEPROM" }, + { "itf":"control", "dev":"PORT43-CTRL" } + ] + } + }, + "PORT43-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT43-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT44": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"44"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT44-EEPROM" }, + { "itf":"control", "dev":"PORT44-CTRL" } + ] + } + }, + "PORT44-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT44-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT45": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"45"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT45-EEPROM" }, + { "itf":"control", "dev":"PORT45-CTRL" } + ] + } + }, + "PORT45-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT45-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT46": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"46"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT46-EEPROM" }, + { "itf":"control", "dev":"PORT46-CTRL" } + ] + } + }, + "PORT46-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT46-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT47": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"47"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT47-EEPROM" }, + { "itf":"control", "dev":"PORT47-CTRL" } + ] + } + }, + "PORT47-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT47-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT48": + { + "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"48"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT48-EEPROM" }, + { "itf":"control", "dev":"PORT48-CTRL" } + ] + } + }, + "PORT48-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT48-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT49": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + + ] + } + }, + + "PORT50": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT51": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT52": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT53": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT54": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT55": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PORT56": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU1-PMBUS"} + + ] + } + }, + + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x3a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"14"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU2-PMBUS"} + + ] + } + }, + + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x3b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"4"}, + "attr_list": + [ + { "attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + { "attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Base_Temp_U5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Base_Temp_U56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP6", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"Switch_Temp_U29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP7": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP7", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_CORE_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x7a", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP8": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP8", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_ANLG_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x70", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0"}, + "i2c": { + "attr_list": + [ + {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf_support b/device/celestica/x86_64-cel_ds2000-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform.json b/device/celestica/x86_64-cel_ds2000-r0/platform.json new file mode 100644 index 000000000000..876067eaaba3 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform.json @@ -0,0 +1,404 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "29", + "breakout_modes": { + "1x25G[10G]": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "30", + "breakout_modes": { + "1x25G[10G]": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "31", + "breakout_modes": { + "1x25G[10G]": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "32", + "breakout_modes": { + "1x25G[10G]": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "33", + "breakout_modes": { + "1x25G[10G]": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "34", + "breakout_modes": { + "1x25G[10G]": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "35", + "breakout_modes": { + "1x25G[10G]": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "36", + "breakout_modes": { + "1x25G[10G]": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "37", + "breakout_modes": { + "1x25G[10G]": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "38", + "breakout_modes": { + "1x25G[10G]": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "39", + "breakout_modes": { + "1x25G[10G]": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "40", + "breakout_modes": { + "1x25G[10G]": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "49", + "breakout_modes": { + "1x25G[10G]": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "50", + "breakout_modes": { + "1x25G[10G]": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "51", + "breakout_modes": { + "1x25G[10G]": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "52", + "breakout_modes": { + "1x25G[10G]": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "53", + "breakout_modes": { + "1x25G[10G]": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "54", + "breakout_modes": { + "1x25G[10G]": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "55", + "breakout_modes": { + "1x25G[10G]": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "56", + "breakout_modes": { + "1x25G[10G]": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "57", + "breakout_modes": { + "1x25G[10G]": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "58", + "breakout_modes": { + "1x25G[10G]": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "59", + "breakout_modes": { + "1x25G[10G]": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "60", + "breakout_modes": { + "1x25G[10G]": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "9", + "breakout_modes": { + "1x25G[10G]": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "10", + "breakout_modes": { + "1x25G[10G]": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "11", + "breakout_modes": { + "1x25G[10G]": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "12", + "breakout_modes": { + "1x25G[10G]": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "13", + "breakout_modes": { + "1x25G[10G]": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "14", + "breakout_modes": { + "1x25G[10G]": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "15", + "breakout_modes": { + "1x25G[10G]": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "16", + "breakout_modes": { + "1x25G[10G]": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "17", + "breakout_modes": { + "1x25G[10G]": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "18", + "breakout_modes": { + "1x25G[10G]": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "19", + "breakout_modes": { + "1x25G[10G]": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "20", + "breakout_modes": { + "1x25G[10G]": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "61", + "breakout_modes": { + "1x25G[10G]": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "62", + "breakout_modes": { + "1x25G[10G]": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "63", + "breakout_modes": { + "1x25G[10G]": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "64", + "breakout_modes": { + "1x25G[10G]": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "65", + "breakout_modes": { + "1x25G[10G]": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "66", + "breakout_modes": { + "1x25G[10G]": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "67", + "breakout_modes": { + "1x25G[10G]": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "68", + "breakout_modes": { + "1x25G[10G]": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "69", + "breakout_modes": { + "1x25G[10G]": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "70", + "breakout_modes": { + "1x25G[10G]": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "71", + "breakout_modes": { + "1x25G[10G]": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "72", + "breakout_modes": { + "1x25G[10G]": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G" : ["Eth49/1"], + "1x40G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G" : ["Eth50/1"], + "1x40G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G" : ["Eth51/1"], + "1x40G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G" : ["Eth52/1"], + "1x40G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G" : ["Eth53/1"], + "1x40G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G" : ["Eth54/1"], + "1x40G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G" : ["Eth55/1"], + "1x40G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G" : ["Eth56/1"], + "1x40G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_asic b/device/celestica/x86_64-cel_ds2000-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json new file mode 100644 index 000000000000..f2afe7f6b7d5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS2000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json new file mode 100644 index 000000000000..6acc9a21ba5c --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json @@ -0,0 +1,15 @@ +{ + "chassis": { + "Questone2a_v2": { + "component": { + "ONIE": {}, + "ASIC_PCIe": {}, + "SSD": {}, + "BIOS": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_reboot b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot new file mode 100644 index 000000000000..d3d10c5b4324 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds2000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py new file mode 100644 index 000000000000..22895539823f --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml new file mode 100644 index 000000000000..2074bf094d56 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml @@ -0,0 +1,22 @@ +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation DNV SATA Controller 1 (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Limited Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' + diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py new file mode 100755 index 000000000000..03882c65ac00 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import struct +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + __xcvr_presence = {} + + EEPROM_OFFSET = 9 + PORT_INFO_PATH = '/sys/class/questone2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom + # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom + # so the real offset is 10 + self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + 1 + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + for x in range(self.PORT_START, self.PORT_END+1): + self.__xcvr_presence[x] = self.get_presence(x) + + def _do_write_file(self, file_handle, offset, value): + file_handle.seek(offset) + file_handle.write(hex(value)) + file_handle.close() + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in range(self.port_start, self.port_end + 1): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if not self.get_presence(port_num): + return None + + eeprom_raw = [] + eeprom_raw.append("0x00") + + lpmode = False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + if port_num >= 49: + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(93) + raw = eeprom.read(1) + eeprom.close() + except Exception as err: + return None + + if len(raw) == 0: + return None + eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2) + + power_data = int(eeprom_raw[0], 16) + # if lpmod, power-override bit and power-set bit are both setted + # bit0 bit1 + lpmode = power_data & 0x03 != 0 + else: + return None + + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + if not self.get_presence(port_num): + return False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + try: + reg_file = open(eeprom_path, mode="wb+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(93) + power_raw = reg_file.read(1) + if power_raw is None: + return False + power_data = int(hex(ord(power_raw))[2:].zfill(2), 16) + + if lpmode: + power_data |= 0x03 + else: + power_data &= ~(0x03) + + reg_file.seek(93) + reg_file.write(struct.pack('B', int(power_data))) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + To detect if any transceiver change event happens. + """ + start_ms = time.time() * 1000 + xcvr_change_event_dict = {} + event = False + + while True: + time.sleep(0.5) + for port in range(self.port_start, self.port_end+1): + curr_presence = self.get_presence(port) + if curr_presence != self.__xcvr_presence[port]: + if curr_presence is True: + xcvr_change_event_dict[str(port)] = '1' + self.__xcvr_presence[port] = True + elif curr_presence is False: + xcvr_change_event_dict[str(port)] = '0' + self.__xcvr_presence[port] = False + event = True + + if event is True: + return True, xcvr_change_event_dict + + if timeout: + now_ms = time.time() * 1000 + if (now_ms - start_ms >= timeout): + return True, xcvr_change_event_dict + + def tx_disable(self, port_num, disable): + """ + @param port_num index of physical port + @param disable, True -- disable port tx signal + False -- enable port tx signal + @return True when operation success, False on failure. + """ + TX_DISABLE_BYTE_OFFSET = 86 + if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool: + return False + + # QSFP, set eeprom to disable tx + if port_num in self.qsfp_ports: + presence = self.get_presence(port_num) + if not presence: + return True + + disable = b'\x0f' if disable else b'\x00' + # open eeprom + try: + with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile: + sysfsfile.seek(TX_DISABLE_BYTE_OFFSET) + sysfsfile.write(bytearray(disable)) + except IOError: + return False + + # SFP, set tx_disable pin + else: + try: + disable = hex(1) if disable else hex(0) + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w") + reg_file.write(disable) + reg_file.close() + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + return True + + def reset_all(self): + result = True + port_sysfs_path = [] + for port in range(self.port_start, self.port_end+1): + if port not in self.qsfp_ports: + continue + + presence = self.get_presence(port) + if not presence: + continue + + try: + port_name = self.get_port_name(port) + sysfs_path = "/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]) + reg_file = open(sysfs_path, "w") + port_sysfs_path.append(sysfs_path) + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 0) + + time.sleep(1) + + for sysfs_path in port_sysfs_path: + try: + reg_file = open(sysfs_path, "w") + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 1) + + return result diff --git a/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..94592fa8cebc --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json new file mode 100644 index 000000000000..28e50b8c0385 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json @@ -0,0 +1,169 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet84": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet100": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet108": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet116": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet124": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off", + "fec": "none" + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini new file mode 100644 index 000000000000..8cd1c833a929 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini @@ -0,0 +1,34 @@ +# name lanes alias index speed valid_speeds +Ethernet0 1,2,3,4 Eth1/1 1 100000 100000,40000 +Ethernet4 5,6,7,8 Eth2/1 2 100000 100000,40000 +Ethernet8 9,10,11,12 Eth3/1 3 100000 100000,40000 +Ethernet12 13,14,15,16 Eth4/1 4 100000 100000,40000 +Ethernet16 17,18,19,20 Eth5/1 5 100000 100000,40000 +Ethernet20 21,22,23,24 Eth6/1 6 100000 100000,40000 +Ethernet24 25,26,27,28 Eth7/1 7 100000 100000,40000 +Ethernet28 29,30,31,32 Eth8/1 8 100000 100000,40000 +Ethernet32 33,34,35,36 Eth9/1 9 100000 100000,40000 +Ethernet36 37,38,39,40 Eth10/1 10 100000 100000,40000 +Ethernet40 41,42,43,44 Eth11/1 11 100000 100000,40000 +Ethernet44 45,46,47,48 Eth12/1 12 100000 100000,40000 +Ethernet48 49,50,51,52 Eth13/1 13 100000 100000,40000 +Ethernet52 53,54,55,56 Eth14/1 14 100000 100000,40000 +Ethernet56 57,58,59,60 Eth15/1 15 100000 100000,40000 +Ethernet60 61,62,63,64 Eth16/1 16 100000 100000,40000 +Ethernet64 65,66,67,68 Eth17/1 17 100000 100000,40000 +Ethernet68 69,70,71,72 Eth18/1 18 100000 100000,40000 +Ethernet72 73,74,75,76 Eth19/1 19 100000 100000,40000 +Ethernet76 77,78,79,80 Eth20/1 20 100000 100000,40000 +Ethernet80 81,82,83,84 Eth21/1 21 100000 100000,40000 +Ethernet84 85,86,87,88 Eth22/1 22 100000 100000,40000 +Ethernet88 89,90,91,92 Eth23/1 23 100000 100000,40000 +Ethernet92 93,94,95,96 Eth24/1 24 100000 100000,40000 +Ethernet96 97,98,99,100 Eth25/1 25 100000 100000,40000 +Ethernet100 101,102,103,104 Eth26/1 26 100000 100000,40000 +Ethernet104 105,106,107,108 Eth27/1 27 100000 100000,40000 +Ethernet108 109,110,111,112 Eth28/1 28 100000 100000,40000 +Ethernet112 113,114,115,116 Eth29/1 29 100000 100000,40000 +Ethernet116 117,118,119,120 Eth30/1 30 100000 100000,40000 +Ethernet120 121,122,123,124 Eth31/1 31 100000 100000,40000 +Ethernet124 125,126,127,128 Eth32/1 32 100000 100000,40000 +Ethernet128 129 Eth33/1 33 10000 10000,1000 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile new file mode 100644 index 000000000000..992e6ba1f49a --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ds3000-32x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm new file mode 100644 index 000000000000..8987f360b2b0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm @@ -0,0 +1,545 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=32768 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_alpm_enable=2 +#lpm_scaling_enable=1 +max_vp_lags=0 +#mem_cache_enable=0 +memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=0 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 +fpem_mem_entries=32768 + +#Tunnels +bcm_tunnel_term_compatible_mode=1 +sai_tunnel_support=1 +use_all_splithorizon_groups=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +flow_init_mode=1 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m + +#wc0 lane swap +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 + +#wc1 lane swap +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 + +#wc2 lane swap +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 + +#wc3 lane swap +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 + +#wc4 lane swap +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 + +#wc5 lane swap +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 + +#wc6 lane swap +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 + +#wc7 lane swap +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 + +#wc8 lane swap +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 + +#wc9 lane swap +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 + +#wc10 lane swap +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 + +#wc11 lane swap +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 + +#wc12 lane swap +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 + +#wc13 lane swap +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 + +#wc14 lane swap +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 + +#wc15 lane swap +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +#wc16 lane swap +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 + +#wc17 lane swap +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 + +#wc18 lane swap +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 + +#wc19 lane swap +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 + +#wc20 lane swap +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 + +#wc21 lane swap +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 + +#wc22 lane swap +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 + +#wc23 lane swap +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 + +#wc24 lane swap +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 + +#wc25 lane swap +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 + +#wc26 lane swap +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 + +#wc27 lane swap +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 + +#wc28 lane swap +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 + +#wc29 lane swap +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 + +#wc30 lane swap +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 + +#wc31 lane swap +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + +#MC lane swap +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x3210 + + +#wc0 P/N flip +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#wc1 P/N flip +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#wc2 P/N flip +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +#wc3 P/N flip +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#wc4 P/N flip +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +#wc5 P/N flip +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#wc6 P/N flip +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#wc7 P/N flip +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +#wc8 P/N flip +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 + +#wc9 P/N flip +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +#wc10 P/N flip +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#wc11 P/N flip +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#wc12 P/N flip +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#wc13 P/N flip +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +#wc14 P/N flip +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#wc15 P/N flip +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#wc16 P/N flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +#wc17 P/N flip +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +#wc18 P/N flip +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#wc19 P/N flip +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +#wc20 P/N flip +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 + +#wc21 P/N flip +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +#wc22 P/N flip +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 + +#wc23 P/N flip +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +#wc24 P/N flip +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +#wc25 P/N flip +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 + +#wc26 P/N flip +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +#wc27 P/N flip +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 + +#wc28 P/N flip +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +#wc29 P/N flip +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +#wc30 P/N flip +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +#wc31 P/N flip +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x0 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x0 diff --git a/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin new file mode 100644 index 0000000000000000000000000000000000000000..3fb048fce6b5e36050a06ecf8b7198dce531197d GIT binary patch literal 130 zcmeycl~I{djaijhg-MCaVTv330|(>To8sm6GdN~c1u;U|O&OOY7_EdVj2u=;P1?km zaWb06iTOgJ8-pgp1to?CZI&Aj+K+BJSkK<{@VR5gsbG-47VU>O85IvEFeo!8Ix9IP dI$AX)9!#`1WK424bWCbWI-GPk`EbgIy#OM^FH8Uc literal 0 HcmV?d00001 diff --git a/device/celestica/x86_64-cel_ds3000-r0/default_sku b/device/celestica/x86_64-cel_ds3000-r0/default_sku new file mode 100644 index 000000000000..dbfb3ae8e6b9 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/default_sku @@ -0,0 +1 @@ +DS3000 t1 diff --git a/device/celestica/x86_64-cel_ds3000-r0/installer.conf b/device/celestica/x86_64-cel_ds3000-r0/installer.conf new file mode 100644 index 000000000000..6e8098123edb --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_DEV=0 +CONSOLE_PORT=0xe060 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off noirqdebug earlycon=uart8250,mmio,0xdf37b000" diff --git a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc similarity index 71% rename from device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc rename to device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc index 57ee7fedaf2b..90aa9ba607ac 100644 --- a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc +++ b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc @@ -1,3 +1,2 @@ m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin -led auto on -led start +led auto on; led start diff --git a/device/celestica/x86_64-cel_ds3000-r0/media_settings.json b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json new file mode 100644 index 000000000000..ded54074ab7e --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json @@ -0,0 +1,408 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-32": { + "25000-copper-1.0M": { + "preemphasis": { + "lane0": "0x16440a", + "lane1": "0x16440a", + "lane2": "0x16440a", + "lane3": "0x16440a" + } + }, + "25000-copper-2.0M": { + "preemphasis": { + "lane0": "0x18420a", + "lane1": "0x18420a", + "lane2": "0x18420a", + "lane3": "0x18420a" + } + }, + "25000-copper-3.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "25000-copper-5.0M": { + "preemphasis": { + "lane0": "0x1a400a", + "lane1": "0x1a400a", + "lane2": "0x1a400a", + "lane3": "0x1a400a" + } + }, + "10000-copper-1.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-3.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-5.0M": { + "preemphasis": { + "lane0": "0xc2808", + "lane1": "0xc2808", + "lane2": "0xc2808", + "lane3": "0xc2808" + } + }, + "10000-copper-7.0M": { + "preemphasis": { + "lane0": "0xd2708", + "lane1": "0xd2708", + "lane2": "0xd2708", + "lane3": "0xd2708" + } + }, + "10000-optical": { + "preemphasis": { + "lane0": "0xa4200", + "lane1": "0xa4200", + "lane2": "0xa4200", + "lane3": "0xa4200" + } + }, + "Default": { + "preemphasis": { + "lane0": "0x14410a", + "lane1": "0x14410a", + "lane2": "0x14410a", + "lane3": "0x14410a" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "1": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "2": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "3": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + }, + "4": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "5": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "6": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "7": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "8": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "9": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "10": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "11": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "12": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "13": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "14": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "15": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "16": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "17": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "18": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "19": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "20": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "21": { + "25000-optical": { + "preemphasis": { + "lane0": "0xd4f08", + "lane1": "0xd4f08", + "lane2": "0xd4f08", + "lane3": "0xd4f08" + } + } + }, + "22": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "23": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "24": { + "25000-optical": { + "preemphasis": { + "lane0": "0xf4d08", + "lane1": "0xf4d08", + "lane2": "0xf4d08", + "lane3": "0xf4d08" + } + } + }, + "25": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "26": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "27": { + "25000-optical": { + "preemphasis": { + "lane0": "0x114b08", + "lane1": "0x114b08", + "lane2": "0x114b08", + "lane3": "0x114b08" + } + } + }, + "28": { + "25000-optical": { + "preemphasis": { + "lane0": "0x124a08", + "lane1": "0x124a08", + "lane2": "0x124a08", + "lane3": "0x124a08" + } + } + }, + "29": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "30": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "31": { + "25000-optical": { + "preemphasis": { + "lane0": "0x134908", + "lane1": "0x134908", + "lane2": "0x134908", + "lane3": "0x134908" + } + } + }, + "32": { + "25000-optical": { + "preemphasis": { + "lane0": "0x164608", + "lane1": "0x164608", + "lane2": "0x164608", + "lane3": "0x164608" + } + } + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml new file mode 100644 index 000000000000..2b9612671602 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml @@ -0,0 +1,165 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: 0b + fn: '0' + id: 19a6 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #2 (rev 11)' +- bus: '00' + dev: 0c + fn: '0' + id: 19a7 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #3 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 19a8 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #4 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '06' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '07' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '07' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..a3660c24c82e --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json @@ -0,0 +1,138 @@ +{ + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": { "1":true, "0":false } + }, + "i2c": + { + "valmap": { "1":true, "0":false } + } + }, + + "psu_power_good": + { + "bmc": + { + "valmap": { "0": true, "8":false } + }, + "i2c": + { + "valmap": { "1": true, "0": false } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "0": "INTAKE", "1":"EXHAUST" } + } + }, + + "psu_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "PSU_FAN_MAX_SPEED":"18000" + }, + + "FAN": + { + "drawer_name": + { + "1": "Fantray 1", + "2": "Fantray 2", + "3": "Fantray 3", + "4": "Fantray 4" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + } + }, + "direction": + { + "bmc": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + }, + "i2c": + { + "valmap": { "1":"INTAKE", "0":"EXHAUST" } + } + }, + + "present": + { + "bmc": + { + "valmap": {"0":true, "1":false} + }, + "i2c": + { + "valmap": {"0":true, "1":false} + } + }, + + "fan_master_led_color": + { + "colmap": {"green":"green", "red":"amber"} + }, + + "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)", + + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)", + + "FRONT_FAN_MAX_RPM_SPEED":"24000", + "REAR_FAN_MAX_RPM_SPEED":"21000" + } + +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json new file mode 100644 index 000000000000..961169bde17a --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json @@ -0,0 +1,2123 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":33, + "num_temps":11, + "num_components":10, + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t", + "baseboard_cpld" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_fpga_algo" + ] + }, + + "COMPONENT1": + { + "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" }, + { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" } + ] + }, + "COMPONENT2": + { + "comp_attr":{ "name": "BMC", "type": "bmc", "description":"Baseboard Management Controller "}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=(`ipmitool raw 0x6 0x1 | cut -d ' ' -f 4,5,16,15,14`) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}" } + ] + }, + "COMPONENT3": + { + "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }, + { "attr_name":"update", "cmd": "ispvm {}" } + ] + }, + "COMPONENT4": + { + "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT5": + { + "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT6": + { + "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT7": + { + "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" }, + { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" } + ] + }, + "COMPONENT8": + { + "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" } + ] + }, + "COMPONENT9": + { + "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" } + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"i2c-1", "dev":"SMBUS1" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "SMBUS1": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x1"}, + "DEVICES": + [ + {"dev": "COME_CPLD"} + ] + } + }, + + "COME_CPLD": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xc"}, + "channel": + [ + { "chn":"3", "dev":"CPLD_S1" }, + { "chn":"3", "dev":"CPLD_S2" }, + { "chn":"2", "dev":"MUX1" }, + { "chn":"2", "dev":"MUX2" }, + { "chn":"2", "dev":"MUX3" }, + { "chn":"2", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" } + ] + } + }, + + "CPLD_S1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" } + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT2": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x21", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1f", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x20", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1b", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x19", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1a", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1c", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1d", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1d", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x2a", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x28", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x29", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x24", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x22", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x23", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x25", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x26", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x26", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Rear", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Front", "field_pos":"3", "multiplier":"1"}, + { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Rear", "field_pos":"3", "multiplier":"1"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"6"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"} + + ] + } + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Baseboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Front Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"ASIC External Rear Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP7": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP8": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"MP2975 VDD CORE Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP9": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"MP2975 VDD ANLG Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP10": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"PSU 1 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1E", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "TEMP11": + { + "dev_info": { "device_type":"TEMP_SENSOR"}, + "dev_attr": { "display_name":"PSU 2 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x27", "raw":"1", "type": "raw", "offset":"5"}, + { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "raw":"1", "type": "raw", "offset":"0"} + ] + } + } + }, + "SYS_LED": + { + "dev_info": { "device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"}, + { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"} + ] + } + } + }, + "ALARM_LED": + { + "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}, + { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"}, + { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"}, + { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"} + ] + } + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"}, + "dev_attr": { "index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": { "index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": { "index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": { "index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"}, + { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"}, + { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}, + { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"} + ] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json new file mode 100644 index 000000000000..f50535020007 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json @@ -0,0 +1,2216 @@ +{ +"PLATFORM": +{ + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_ports":33, + "num_temps":6, + "num_components":8, + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + + }, + "std_perm_kos": + [ + "i2c_ismt", + "i2c-i801" + ], + + "std_kos": + [ + "lpc_ich", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "mc24lc64t", + "ucd9000", + "mp2975", + "lm75", + "at24" + ], + + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_fan_module", + "pddf_psu_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fpgapci_driver", + "pddf_fpgapci_module" + ], + + "custom_kos": + [ + "pddf_custom_psu_driver_module", + "pddf_custom_fpga_algo" + ] + }, + + "COMPONENT1": + { + "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" }, + { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" } + ] + }, + "COMPONENT2": + { + "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }, + { "attr_name":"update", "cmd": "ispvm {}" } + ] + }, + "COMPONENT3": + { + "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT4": + { + "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT5": + { + "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" } + ] + }, + "COMPONENT6": + { + "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" }, + { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" } + ] + }, + "COMPONENT7": + { + "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" } + ] + }, + "COMPONENT8": + { + "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"}, + "attr_list": + [ + { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" } + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"i2c-1", "dev":"SMBUS1" }, + { "dev_name":"pcie-0", "dev":"PCIE0" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "SMBUS1": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x1"}, + "DEVICES": + [ + {"dev": "COME_CPLD"} + ] + } + }, + + "COME_CPLD": + { + "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"}, + "i2c": + { + "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"}, + "dev_attr": {} + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0"}, + "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xc"}, + "channel": + [ + { "chn":"2", "dev":"MUX1" }, + { "chn":"2", "dev":"MUX2" }, + { "chn":"2", "dev":"MUX3" }, + { "chn":"2", "dev":"MUX4" }, + { "chn":"1", "dev":"MUX5" }, + { "chn":"3", "dev":"CPLD_S1" }, + { "chn":"3", "dev":"CPLD_S2" }, + { "chn":"4", "dev":"EEPROM_COME" }, + { "chn":"4", "dev":"CPLD_COME" }, + { "chn":"5", "dev":"EEPROM_BASEBOARD" }, + { "chn":"6", "dev":"FAN-CTRL" }, + { "chn":"6", "dev":"CPLD_BASEBOARD" }, + { "chn":"7", "dev":"MUX6" }, + { "chn":"10", "dev":"TEMP1" }, + { "chn":"10", "dev":"TEMP2" }, + { "chn":"10", "dev":"TEMP3" }, + { "chn":"10", "dev":"TEMP4" }, + { "chn":"10", "dev":"TEMP5" }, + { "chn":"10", "dev":"TEMP6" }, + { "chn":"11", "dev":"MUX7" } + ] + } + }, + + "TEMP1": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Base_Temp_U5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Base_Temp_U56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"FPGAPCIE0"}, + "dev_attr": { "display_name":"Switch_Temp_U29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"}, + "attr_list": + [ + { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + { "attr_name": "temp1_max_hyst"}, + { "attr_name": "temp1_input"} + ] + } + }, + + "CPLD_BASEBOARD": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD BASE", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "EEPROM_BASEBOARD": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_BASEBOARD", "device_parent": "FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x68", "dev_addr": "0x57", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "EEPROM_COME": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_COME", "device_parent": "FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x67", "dev_addr": "0x50", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "CPLD_COME": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S1": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" } + ] + } + }, + + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"PSU1" }, + { "chn":"0", "dev":"PSU1-EEPROM" }, + { "chn":"1", "dev":"PSU2" }, + { "chn":"1", "dev":"PSU2-EEPROM" } + ] + } + }, + + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6e", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2" }, + "channel": + [ + { "chn":"0", "dev":"FANTRAY1_EEPROM" }, + { "chn":"1", "dev":"FANTRAY2_EEPROM" }, + { "chn":"3", "dev":"FANTRAY3_EEPROM" }, + { "chn":"4", "dev":"FANTRAY4_EEPROM" } + ] + } + }, + + "PORT1": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + "PORT2": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT5": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT7": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT8": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT11": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT27": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT28": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + + "PORT32": + { + "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT32-CTRL": + { + "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU1-PMBUS" } + ] + } + }, + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU1" }, + "i2c": + { + "topo_info":{ "parent_bus":"0x2a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU1-EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "PSU1-EEPROM", "device_parent": "MUX6"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2a", "dev_addr": "0x52", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + { "itf":"pmbus", "dev":"PSU2-PMBUS" } + ] + } + }, + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU2" }, + "i2c": + { + "topo_info":{ "parent_bus":"0x2b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + "PSU2-EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "PSU2-EEPROM", "device_parent": "MUX6"}, + "i2c": + { + "topo_info": {"parent_bus": "0x2b", "dev_addr": "0x53", "dev_type": "24lc64t"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "FANTRAY1_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY1_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x32", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY2_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY2_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x33", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY3_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY3_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x35", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "FANTRAY4_EEPROM": + { + "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY4_EEPROM", "device_parent": "MUX7"}, + "i2c": + { + "topo_info": {"parent_bus": "0x36", "dev_addr": "0x50", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"4"}, + "attr_list": + [ + {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"}, + {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"}, + {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0}, + {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}, + {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"} + ] + } + }, + + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"} + ] + } + }, + + "PSU_LED": + { + "dev_info": { "device_type":"LED", "device_name":"PSU_LED"}, + "dev_attr": { "index":"0", "flag": "rw"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green", "descr": "Green", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x1", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"}, + {"attr_name":"amber", "descr": "Amber", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x2", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"}, + {"attr_name":"off", "descr": "Off", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x3", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"} + ] + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf_support b/device/celestica/x86_64-cel_ds3000-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform.json b/device/celestica/x86_64-cel_ds3000-r0/platform.json new file mode 100644 index 000000000000..c180d6d186d5 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform.json @@ -0,0 +1,267 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G":["Eth1/1"], + "1x40G": ["Eth1/1"] + } + }, + "Ethernet4": { + "index": "2,2,2,2", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth2/1"], + "1x40G": ["Eth2/1"] + } + }, + "Ethernet8": { + "index": "3,3,3,3", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G": ["Eth3/1"], + "1x40G": ["Eth3/1"] + } + }, + "Ethernet12": { + "index": "4,4,4,4", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G": ["Eth4/1"], + "1x40G": ["Eth4/1"] + } + }, + "Ethernet16": { + "index": "5,5,5,5", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G": ["Eth5/1"], + "1x40G": ["Eth5/1"] + } + }, + "Ethernet20": { + "index": "6,6,6,6", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth6/1"], + "1x40G": ["Eth6/1"] + } + }, + "Ethernet24": { + "index": "7,7,7,7", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth7/1"], + "1x40G": ["Eth7/1"] + } + }, + "Ethernet28": { + "index": "8,8,8,8", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": ["Eth8/1"], + "1x40G": ["Eth8/1"] + } + }, + "Ethernet32": { + "index": "9,9,9,9", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth9/1"], + "1x40G": ["Eth9/1"] + } + }, + "Ethernet36": { + "index": "10,10,10,10", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": ["Eth10/1"], + "1x40G": ["Eth10/1"] + } + }, + "Ethernet40": { + "index": "11,11,11,11", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth11/1"], + "1x40G": ["Eth11/1"] + } + }, + "Ethernet44": { + "index": "12,12,12,12", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth12/1"], + "1x40G": ["Eth12/1"] + } + }, + "Ethernet48": { + "index": "13,13,13,13", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": ["Eth13/1"], + "1x40G": ["Eth13/1"] + } + }, + "Ethernet52": { + "index": "14,14,14,14", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": ["Eth14/1"], + "1x40G": ["Eth14/1"] + } + }, + "Ethernet56": { + "index": "15,15,15,15", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G": ["Eth15/1"], + "1x40G": ["Eth15/1"] + } + }, + "Ethernet60": { + "index": "16,16,16,16", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G": ["Eth16/1"], + "1x40G": ["Eth16/1"] + } + }, + "Ethernet64": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth17/1"], + "1x40G": ["Eth17/1"] + } + }, + "Ethernet68": { + "index": "18,18,18,18", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth18/1"], + "1x40G": ["Eth18/1"] + } + }, + "Ethernet72": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth19/1"], + "1x40G": ["Eth19/1"] + } + }, + "Ethernet76": { + "index": "20,20,20,20", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth20/1"], + "1x40G": ["Eth20/1"] + } + }, + "Ethernet80": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G": ["Eth21/1"], + "1x40G": ["Eth21/1"] + } + }, + "Ethernet84": { + "index": "22,22,22,22", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G": ["Eth22/1"], + "1x40G": ["Eth22/1"] + } + }, + "Ethernet88": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G": ["Eth23/1"], + "1x40G": ["Eth23/1"] + } + }, + "Ethernet92": { + "index": "24,24,24,24", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G": ["Eth24/1"], + "1x40G": ["Eth24/1"] + } + }, + "Ethernet96": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G": ["Eth25/1"], + "1x40G": ["Eth25/1"] + } + }, + "Ethernet100": { + "index": "26,26,26,26", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G": ["Eth26/1"], + "1x40G": ["Eth26/1"] + } + }, + "Ethernet104": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G": ["Eth27/1"], + "1x40G": ["Eth27/1"] + } + }, + "Ethernet108": { + "index": "28,28,28,28", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G": ["Eth28/1"], + "1x40G": ["Eth28/1"] + } + }, + "Ethernet112": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G": ["Eth29/1"], + "1x40G": ["Eth29/1"] + } + }, + "Ethernet116": { + "index": "30,30,30,30", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G": ["Eth30/1"], + "1x40G": ["Eth30/1"] + } + }, + "Ethernet120": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth31/1"], + "1x40G": ["Eth31/1"] + } + }, + "Ethernet124": { + "index": "32,32,32,32", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth32/1"], + "1x40G": ["Eth32/1"] + } + }, + "Ethernet128": { + "index": "33", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth33/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_asic b/device/celestica/x86_64-cel_ds3000-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_components.json b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json new file mode 100644 index 000000000000..fa985b8f01e9 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS3000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_reboot b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot new file mode 100755 index 000000000000..b5212804e636 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/ds3000_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..5e59513ef696 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json @@ -0,0 +1,7 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false, + "skip_fancontrol": true +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_ds3000-r0/sensors.conf b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf new file mode 100644 index 000000000000..8d441077a677 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf @@ -0,0 +1,87 @@ +# LM75B temperature sensors +bus "i2c-109" "i2c-pci-9" + chip "lm75-i2c-109-4a" + label temp1 "Switchboard U28 Sensor Temp" + set temp1_max 60 + set temp1_max_hyst 57 + chip "lm75-i2c-109-4b" + label temp1 "Switchboard U29 Sensor Temp" + set temp1_max 60 + set temp1_max_hyst 57 + chip "lm75-i2c-109-4c" + label temp1 "Switchboard U17 Sensor Temp" + chip "lm75-i2c-109-49" + label temp1 "Switchboard U18 Sensor Temp" + chip "lm75-i2c-109-4d" + label temp1 "Baseboard U5 Sensor Temp" + set temp1_max 55 + set temp1_max_hyst 52 + chip "lm75-i2c-109-4e" + label temp1 "Baseboard U56 Sensor Temp" + set temp1_max 55 + set temp1_max_hyst 52 + +# PSU +bus "i2c-43" "i2c-106-mux (chan_id 1)" + chip "psu_pmbus-i2c-43-5b" + label in3 "PSU2 input voltage" + label fan1 "PSU2 FAN speed" + label temp1 "PSU2 temperature" + label power2 "PSU2 AC Power Voltage" + label curr2 "PSU2 AC current" + +bus "i2c-42" "i2c-106-mux (chan_id 0)" + chip "psu_pmbus-i2c-42-5a" + label in3 "PSU1 input voltage" + label fan1 "PSU1 FAN speed" + label temp1 "PSU1 temperature" + label power2 "PSU1 AC Power Voltage" + label curr2 "PSU1 AC current" + +# MP2975 power chip +bus "i2c-108" "i2c-pci-8" + chip "mp2975-i2c-108-70" + label in1 "VDD ANLG input voltage" + label in2 "VDD ANLG output voltage" + label in3 "VDD ANLG output voltage" + label temp1 "VDD ANLG temperature" + label power1 "VDD ANLG input power" + label power2 "VDD ANLG output power" + label power3 "VDD ANLG output power" + label curr1 "VDD ANLG input current" + label curr2 "VDD ANLG output current" + label curr3 "VDD ANLG output current" + label curr4 "VDD ANLG output current" + label curr5 "VDD ANLG output current" + +bus "i2c-108" "i2c-pci-8" + chip "mp2975-i2c-108-7a" + label in1 "VDD CORE input voltage" + label in2 "VDD CORE output voltage" + label in3 "VDD CORE output voltage" + label temp1 "VDD CORE temperature" + label power1 "VDD CORE input power" + label power2 "VDD CORE output power" + label power3 "VDD CORE output power" + label curr1 "VDD CORE input current" + label curr2 "VDD CORE output current" + label curr3 "VDD CORE output current" + label curr4 "VDD CORE output current" + label curr5 "VDD CORE output current" + label curr6 "VDD CORE output current" + label curr7 "VDD CORE output current" + label curr8 "VDD CORE output current" + label curr9 "VDD CORE output current" + label curr10 "VDD CORE output current" + +# CPLD FAN +bus "i2c-105" "i2c-pci-5" + chip "fan_cpld-i2c-105-16" + label fan1 "FAN1 Front Fan" + label fan2 "FAN1 Rear Fan" + label fan3 "FAN2 Front Fan" + label fan4 "FAN2 Rear Fan" + label fan5 "FAN3 Front Fan" + label fan6 "FAN3 Rear Fan" + label fan7 "FAN4 Front Fan" + label fan8 "FAN4 Rear Fan" diff --git a/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json new file mode 100644 index 000000000000..515348ec6ab0 --- /dev/null +++ b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json @@ -0,0 +1,136 @@ +{ + "interval": 4, + "thermal_control_algorithm": { + "run_at_boot_up": "True", + "fan_speed_when_suspend": "50" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "psu_info" + }, + { + "type": "thermal_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "temp over high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "switch.shutdown" + } + ] + }, + { + "name": "any fantray absence", + "conditions": [ + { + "type": "fantray.any.absence" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "more than one fan rotor failed", + "conditions": [ + { + "type": "fan.rotor.more_than_one.failed" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any psu absence", + "conditions": [ + { + "type": "psu.any.absence" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any thermal over high threshold", + "conditions": [ + { + "type": "thermal.any.over.high_threshold" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any thermal below high threshold", + "conditions": [ + { + "type": "thermal.any.below.low_threshold" + } + ], + "actions": [ + { + "type": "fan.all.set_speed", + "speed": "10" + } + ] + }, + { + "name": "thermal control algorithm", + "conditions": [ + { + "type": "fantray.all.presence" + }, + { + "type": "fan.rotor.less_than_two.failed" + }, + { + "type": "psu.all.presence" + }, + { + "type": "thermal.all.below.high_threshold" + }, + { + "type": "thermal.all.over.low_threshold" + } + ], + "actions": [ + { + "thermal_log_level": 5, + "type": "thermal.temp_check_and_fsc_algo_control", + "cpu_pid_params": [78, 3, 0.5, 0.2], + "bcm_pid_params": [88, 4, 0.3, 0.4], + "f2b_linear_params": [34, 54, 3, 35, 100], + "b2f_linear_params": [27, 48, 3, 35, 100] + } + ] + } + ] +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin new file mode 100644 index 0000000000000000000000000000000000000000..b2ed8cb8d09014028181c580ddaaafa943990585 GIT binary patch literal 248 zcmeycHQp`E&DYJv?ZXx>232oK1`ESZHwKjk#SS-SH6_n3Hzq|vhaNZiiYmED46GTU z(MAl8ZkkR47n(9INitdqRj^uJ+{B{EdZUXW(5)+Cx*L-c(*q+0h6jvFdQQw265SXy z87>$xxMpYtGa9p)c)Q-b$f$TQfkBx$QCi69)viwcCfi2i(?JFfcp;VnZWi6J9=k0Z}n=30XOL1w|!g6-_N|9Y!W*7FITP mj?l31h}gLJgv6xel+3K`9825E!dgdP*C?RgARq?OFg5^j6GYhn literal 0 HcmV?d00001 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json new file mode 100644 index 000000000000..a559890f3a18 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json new file mode 100644 index 000000000000..0805efbc7ba4 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json @@ -0,0 +1,396 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "49", + "breakout_modes": { + "1x25G": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "50", + "breakout_modes": { + "1x25G": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "51", + "breakout_modes": { + "1x25G": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "52", + "breakout_modes": { + "1x25G": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "57", + "breakout_modes": { + "1x25G": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "58", + "breakout_modes": { + "1x25G": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "59", + "breakout_modes": { + "1x25G": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "60", + "breakout_modes": { + "1x25G": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "61", + "breakout_modes": { + "1x25G": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "62", + "breakout_modes": { + "1x25G": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "63", + "breakout_modes": { + "1x25G": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "64", + "breakout_modes": { + "1x25G": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "77", + "breakout_modes": { + "1x25G": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "78", + "breakout_modes": { + "1x25G": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "79", + "breakout_modes": { + "1x25G": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "80", + "breakout_modes": { + "1x25G": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "85", + "breakout_modes": { + "1x25G": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "86", + "breakout_modes": { + "1x25G": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "87", + "breakout_modes": { + "1x25G": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "88", + "breakout_modes": { + "1x25G": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "93", + "breakout_modes": { + "1x25G": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "94", + "breakout_modes": { + "1x25G": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "95", + "breakout_modes": { + "1x25G": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "96", + "breakout_modes": { + "1x25G": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "13", + "breakout_modes": { + "1x25G": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "14", + "breakout_modes": { + "1x25G": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "15", + "breakout_modes": { + "1x25G": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "16", + "breakout_modes": { + "1x25G": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "21", + "breakout_modes": { + "1x25G": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "22", + "breakout_modes": { + "1x25G": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "23", + "breakout_modes": { + "1x25G": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "24", + "breakout_modes": { + "1x25G": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "29", + "breakout_modes": { + "1x25G": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "30", + "breakout_modes": { + "1x25G": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "31", + "breakout_modes": { + "1x25G": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "32", + "breakout_modes": { + "1x25G": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "97", + "breakout_modes": { + "1x25G": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "98", + "breakout_modes": { + "1x25G": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "99", + "breakout_modes": { + "1x25G": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "100", + "breakout_modes": { + "1x25G": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "105", + "breakout_modes": { + "1x25G": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "106", + "breakout_modes": { + "1x25G": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "107", + "breakout_modes": { + "1x25G": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "108", + "breakout_modes": { + "1x25G": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "113", + "breakout_modes": { + "1x25G": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "114", + "breakout_modes": { + "1x25G": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "115", + "breakout_modes": { + "1x25G": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "116", + "breakout_modes": { + "1x25G": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json new file mode 100644 index 000000000000..b86899e311ab --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Questone_2": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini new file mode 100644 index 000000000000..37c4f0cfd042 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 49 Eth1/1 1 25000 9216 up rs +Ethernet1 50 Eth2/1 2 25000 9216 up rs +Ethernet2 51 Eth3/1 3 25000 9216 up rs +Ethernet3 52 Eth4/1 4 25000 9216 up rs +Ethernet4 57 Eth5/1 5 25000 9216 up rs +Ethernet5 58 Eth6/1 6 25000 9216 up rs +Ethernet6 59 Eth7/1 7 25000 9216 up rs +Ethernet7 60 Eth8/1 8 25000 9216 up rs +Ethernet8 61 Eth9/1 9 25000 9216 up rs +Ethernet9 62 Eth10/1 10 25000 9216 up rs +Ethernet10 63 Eth11/1 11 25000 9216 up rs +Ethernet11 64 Eth12/1 12 25000 9216 up rs +Ethernet12 77 Eth13/1 13 25000 9216 up rs +Ethernet13 78 Eth14/1 14 25000 9216 up rs +Ethernet14 79 Eth15/1 15 25000 9216 up rs +Ethernet15 80 Eth16/1 16 25000 9216 up rs +Ethernet16 85 Eth17/1 17 25000 9216 up rs +Ethernet17 86 Eth18/1 18 25000 9216 up rs +Ethernet18 87 Eth19/1 19 25000 9216 up rs +Ethernet19 88 Eth20/1 20 25000 9216 up rs +Ethernet20 93 Eth21/1 21 25000 9216 up rs +Ethernet21 94 Eth22/1 22 25000 9216 up rs +Ethernet22 95 Eth23/1 23 25000 9216 up rs +Ethernet23 96 Eth24/1 24 25000 9216 up rs +Ethernet24 13 Eth25/1 25 25000 9216 up rs +Ethernet25 14 Eth26/1 26 25000 9216 up rs +Ethernet26 15 Eth27/1 27 25000 9216 up rs +Ethernet27 16 Eth28/1 28 25000 9216 up rs +Ethernet28 21 Eth29/1 29 25000 9216 up rs +Ethernet29 22 Eth30/1 30 25000 9216 up rs +Ethernet30 23 Eth31/1 31 25000 9216 up rs +Ethernet31 24 Eth32/1 32 25000 9216 up rs +Ethernet32 29 Eth33/1 33 25000 9216 up rs +Ethernet33 30 Eth34/1 34 25000 9216 up rs +Ethernet34 31 Eth35/1 35 25000 9216 up rs +Ethernet35 32 Eth36/1 36 25000 9216 up rs +Ethernet36 97 Eth37/1 37 25000 9216 up rs +Ethernet37 98 Eth38/1 38 25000 9216 up rs +Ethernet38 99 Eth39/1 39 25000 9216 up rs +Ethernet39 100 Eth40/1 40 25000 9216 up rs +Ethernet40 105 Eth41/1 41 25000 9216 up rs +Ethernet41 106 Eth42/1 42 25000 9216 up rs +Ethernet42 107 Eth43/1 43 25000 9216 up rs +Ethernet43 108 Eth44/1 44 25000 9216 up rs +Ethernet44 113 Eth45/1 45 25000 9216 up rs +Ethernet45 114 Eth46/1 46 25000 9216 up rs +Ethernet46 115 Eth47/1 47 25000 9216 up rs +Ethernet47 116 Eth48/1 48 25000 9216 up rs +Ethernet48 65,66,67,68 Eth49/1 49 100000 9216 up rs +Ethernet52 69,70,71,72 Eth50/1 50 100000 9216 up rs +Ethernet56 121,122,123,124 Eth51/1 51 100000 9216 up rs +Ethernet60 125,126,127,128 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 33,34,35,36 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 41,42,43,44 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile new file mode 100644 index 000000000000..636d9d72fc17 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm new file mode 100644 index 000000000000..f9f3308d30cb --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm @@ -0,0 +1,359 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=49152 +l3_alpm_enable=2 +bcm_stat_interval=1000000 +host_as_route_disable=1 +lpm_scaling_enable=1 +max_vp_lags=0 +mem_cache_enable=0 +memlist_enable=1 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=1 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_xe=13 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +#pbmp_xport_xe=0x48878787f8787808dfe1e0203e1e1e022 +pbmp_xport_xe=0x8808787f87808088221e1e1fe1e1e1fe + + +portmap_1.0=1:100 +portmap_5.0=5:100 +portmap_13.0=13:25 +portmap_14.0=14:25 +portmap_15.0=15:25 +portmap_16.0=16:25 +portmap_21.0=21:25 +portmap_22.0=22:25 +portmap_23.0=23:25 +portmap_24.0=24:25 +portmap_29.0=29:25 +portmap_30.0=30:25 +portmap_31.0=31:25 +portmap_32.0=32:25 +portmap_33.0=33:100 +portmap_41.0=41:100 +portmap_49.0=49:25 +portmap_50.0=50:25 +portmap_51.0=51:25 +portmap_52.0=52:25 +portmap_57.0=57:25 +portmap_58.0=58:25 +portmap_59.0=59:25 +portmap_60.0=60:25 +portmap_61.0=61:25 +portmap_62.0=62:25 +portmap_63.0=63:25 +portmap_64.0=64:25 +portmap_67.0=65:100 +portmap_71.0=69:100 +portmap_79.0=77:25 +portmap_80.0=78:25 +portmap_81.0=79:25 +portmap_82.0=80:25 +portmap_87.0=85:25 +portmap_88.0=86:25 +portmap_89.0=87:25 +portmap_90.0=88:25 +portmap_95.0=93:25 +portmap_96.0=94:25 +portmap_97.0=95:25 +portmap_98.0=96:25 +portmap_99.0=97:25 +portmap_100.0=98:25 +portmap_101.0=99:25 +portmap_102.0=100:25 +portmap_107.0=105:25 +portmap_108.0=106:25 +portmap_109.0=107:25 +portmap_110.0=108:25 +portmap_115.0=113:25 +portmap_116.0=114:25 +portmap_117.0=115:25 +portmap_118.0=116:25 +portmap_123.0=121:100 +portmap_127.0=125:100 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x3120 +phy_chain_rx_lane_map_physical{41.0}=0x1032 +phy_chain_tx_lane_map_physical{49.0}=0x0123 +phy_chain_rx_lane_map_physical{49.0}=0x1032 +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x1032 +phy_chain_tx_lane_map_physical{61.0}=0x0123 +phy_chain_rx_lane_map_physical{61.0}=0x1032 +phy_chain_tx_lane_map_physical{65.0}=0x1302 +phy_chain_rx_lane_map_physical{65.0}=0x1023 +phy_chain_tx_lane_map_physical{69.0}=0x1032 +phy_chain_rx_lane_map_physical{69.0}=0x0213 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x2301 +phy_chain_tx_lane_map_physical{85.0}=0x3210 +phy_chain_rx_lane_map_physical{85.0}=0x2301 +phy_chain_tx_lane_map_physical{93.0}=0x3210 +phy_chain_rx_lane_map_physical{93.0}=0x2301 +phy_chain_tx_lane_map_physical{97.0}=0x3210 +phy_chain_rx_lane_map_physical{97.0}=0x2301 +phy_chain_tx_lane_map_physical{105.0}=0x3210 +phy_chain_rx_lane_map_physical{105.0}=0x2301 +phy_chain_tx_lane_map_physical{113.0}=0x3210 +phy_chain_rx_lane_map_physical{113.0}=0x2301 +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x2031 +phy_chain_tx_lane_map_physical{125.0}=0x0132 +phy_chain_rx_lane_map_physical{125.0}=0x3012 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_tx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x1 +phy_chain_tx_polarity_flip_physical{51.0}=0x1 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_polarity_flip_physical{85.0}=0x0 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x1 +phy_chain_rx_polarity_flip_physical{86.0}=0x0 +phy_chain_tx_polarity_flip_physical{87.0}=0x0 +phy_chain_rx_polarity_flip_physical{87.0}=0x1 +phy_chain_tx_polarity_flip_physical{88.0}=0x1 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 +phy_chain_tx_polarity_flip_physical{93.0}=0x0 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x0 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x1 +phy_chain_tx_polarity_flip_physical{96.0}=0x1 +phy_chain_rx_polarity_flip_physical{96.0}=0x0 +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x0 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x1 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x1 +phy_chain_tx_polarity_flip_physical{121.0}=0x0 +phy_chain_rx_polarity_flip_physical{121.0}=0x1 +phy_chain_tx_polarity_flip_physical{122.0}=0x1 +phy_chain_rx_polarity_flip_physical{122.0}=0x0 +phy_chain_tx_polarity_flip_physical{123.0}=0x0 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x1 +phy_chain_rx_polarity_flip_physical{124.0}=0x0 +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x0 +phy_chain_tx_polarity_flip_physical{126.0}=0x1 +phy_chain_rx_polarity_flip_physical{126.0}=0x1 +phy_chain_tx_polarity_flip_physical{127.0}=0x0 +phy_chain_rx_polarity_flip_physical{127.0}=0x0 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x0 +phy_chain_rx_polarity_flip_physical{129.0}=0x1 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + +dport_map_port_49=1 +dport_map_port_50=2 +dport_map_port_51=3 +dport_map_port_52=4 +dport_map_port_57=5 +dport_map_port_58=6 +dport_map_port_59=7 +dport_map_port_60=8 +dport_map_port_61=9 +dport_map_port_62=10 +dport_map_port_63=11 +dport_map_port_64=12 +dport_map_port_79=13 +dport_map_port_80=14 +dport_map_port_81=15 +dport_map_port_82=16 +dport_map_port_87=17 +dport_map_port_88=18 +dport_map_port_89=19 +dport_map_port_90=20 +dport_map_port_95=21 +dport_map_port_96=22 +dport_map_port_97=23 +dport_map_port_98=24 +dport_map_port_13=25 +dport_map_port_14=26 +dport_map_port_15=27 +dport_map_port_16=28 +dport_map_port_21=29 +dport_map_port_22=30 +dport_map_port_23=31 +dport_map_port_24=32 +dport_map_port_29=33 +dport_map_port_30=34 +dport_map_port_31=35 +dport_map_port_32=36 +dport_map_port_99=37 +dport_map_port_100=38 +dport_map_port_101=39 +dport_map_port_102=40 +dport_map_port_107=41 +dport_map_port_108=42 +dport_map_port_109=43 +dport_map_port_110=44 +dport_map_port_115=45 +dport_map_port_116=46 +dport_map_port_117=47 +dport_map_port_118=48 +dport_map_port_67=49 +dport_map_port_71=50 +dport_map_port_123=51 +dport_map_port_127=52 +dport_map_port_1=53 +dport_map_port_33=54 +dport_map_port_5=55 +dport_map_port_41=56 + +reglist_enable=1 +scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin new file mode 100755 index 0000000000000000000000000000000000000000..fb33257fbbe9d075892a096e3c581c6710df296c GIT binary patch literal 308 zcmV-40n7gIwO>Y7MomUUM)0%^95hS>BLgB2A&5o-Cb32VC%Q&494SDIMnz~^Qzdu- zJ*~2?00(IHTZd?WUAsmyLIcnh9AQQPDHYKb9DpY`LJ`nKMp;G;Kn5)b&;r;6Ee6pC z;0G-Q&D&pBZypTqjMxsWmM)1AlH~;`09v>hfA|oUvCMPH{GBY$aHa9pqIy*cG z3JVMk4i69!5)%|XK0iP~LPJDFMn^~i0s{mU78e)=1_uZk8XFubDl054E-x@iN=r;l GPESx?i&_={ literal 0 HcmV?d00001 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json new file mode 100644 index 000000000000..a559890f3a18 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json @@ -0,0 +1,284 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + } + } +} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json new file mode 100644 index 000000000000..b303755d5910 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json @@ -0,0 +1,396 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "29", + "breakout_modes": { + "1x25G": ["Eth1/1"] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "30", + "breakout_modes": { + "1x25G": ["Eth2/1"] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "31", + "breakout_modes": { + "1x25G": ["Eth3/1"] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "32", + "breakout_modes": { + "1x25G": ["Eth4/1"] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "33", + "breakout_modes": { + "1x25G": ["Eth5/1"] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "34", + "breakout_modes": { + "1x25G": ["Eth6/1"] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "35", + "breakout_modes": { + "1x25G": ["Eth7/1"] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "36", + "breakout_modes": { + "1x25G": ["Eth8/1"] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "37", + "breakout_modes": { + "1x25G": ["Eth9/1"] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "38", + "breakout_modes": { + "1x25G": ["Eth10/1"] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "39", + "breakout_modes": { + "1x25G": ["Eth11/1"] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "40", + "breakout_modes": { + "1x25G": ["Eth12/1"] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "49", + "breakout_modes": { + "1x25G": ["Eth13/1"] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "50", + "breakout_modes": { + "1x25G": ["Eth14/1"] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "51", + "breakout_modes": { + "1x25G": ["Eth15/1"] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "52", + "breakout_modes": { + "1x25G": ["Eth16/1"] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "53", + "breakout_modes": { + "1x25G": ["Eth17/1"] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "54", + "breakout_modes": { + "1x25G": ["Eth18/1"] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "55", + "breakout_modes": { + "1x25G": ["Eth19/1"] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "56", + "breakout_modes": { + "1x25G": ["Eth20/1"] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "57", + "breakout_modes": { + "1x25G": ["Eth21/1"] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "58", + "breakout_modes": { + "1x25G": ["Eth22/1"] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "59", + "breakout_modes": { + "1x25G": ["Eth23/1"] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "60", + "breakout_modes": { + "1x25G": ["Eth24/1"] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "9", + "breakout_modes": { + "1x25G": ["Eth25/1"] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "10", + "breakout_modes": { + "1x25G": ["Eth26/1"] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "11", + "breakout_modes": { + "1x25G": ["Eth27/1"] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "12", + "breakout_modes": { + "1x25G": ["Eth28/1"] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "13", + "breakout_modes": { + "1x25G": ["Eth29/1"] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "14", + "breakout_modes": { + "1x25G": ["Eth30/1"] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "15", + "breakout_modes": { + "1x25G": ["Eth31/1"] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "16", + "breakout_modes": { + "1x25G": ["Eth32/1"] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "17", + "breakout_modes": { + "1x25G": ["Eth33/1"] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "18", + "breakout_modes": { + "1x25G": ["Eth34/1"] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "19", + "breakout_modes": { + "1x25G": ["Eth35/1"] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "20", + "breakout_modes": { + "1x25G": ["Eth36/1"] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "61", + "breakout_modes": { + "1x25G": ["Eth37/1"] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "62", + "breakout_modes": { + "1x25G": ["Eth38/1"] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "63", + "breakout_modes": { + "1x25G": ["Eth39/1"] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "64", + "breakout_modes": { + "1x25G": ["Eth40/1"] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "65", + "breakout_modes": { + "1x25G": ["Eth41/1"] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "66", + "breakout_modes": { + "1x25G": ["Eth42/1"] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "67", + "breakout_modes": { + "1x25G": ["Eth43/1"] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "68", + "breakout_modes": { + "1x25G": ["Eth44/1"] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "69", + "breakout_modes": { + "1x25G": ["Eth45/1"] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "70", + "breakout_modes": { + "1x25G": ["Eth46/1"] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "71", + "breakout_modes": { + "1x25G": ["Eth47/1"] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "72", + "breakout_modes": { + "1x25G": ["Eth48/1"] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth49/1"] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth50/1"] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth51/1"] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth52/1"] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth53/1"] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth54/1"] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth55/1"] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth56/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json new file mode 100644 index 000000000000..165eacad2dd3 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Questone_2A": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini new file mode 100644 index 000000000000..37d2d92652ed --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed mtu admin_status fec +Ethernet0 29 Eth1/1 1 25000 9216 up rs +Ethernet1 30 Eth2/1 2 25000 9216 up rs +Ethernet2 31 Eth3/1 3 25000 9216 up rs +Ethernet3 32 Eth4/1 4 25000 9216 up rs +Ethernet4 33 Eth5/1 5 25000 9216 up rs +Ethernet5 34 Eth6/1 6 25000 9216 up rs +Ethernet6 35 Eth7/1 7 25000 9216 up rs +Ethernet7 36 Eth8/1 8 25000 9216 up rs +Ethernet8 37 Eth9/1 9 25000 9216 up rs +Ethernet9 38 Eth10/1 10 25000 9216 up rs +Ethernet10 39 Eth11/1 11 25000 9216 up rs +Ethernet11 40 Eth12/1 12 25000 9216 up rs +Ethernet12 49 Eth13/1 13 25000 9216 up rs +Ethernet13 50 Eth14/1 14 25000 9216 up rs +Ethernet14 51 Eth15/1 15 25000 9216 up rs +Ethernet15 52 Eth16/1 16 25000 9216 up rs +Ethernet16 53 Eth17/1 17 25000 9216 up rs +Ethernet17 54 Eth18/1 18 25000 9216 up rs +Ethernet18 55 Eth19/1 19 25000 9216 up rs +Ethernet19 56 Eth20/1 20 25000 9216 up rs +Ethernet20 57 Eth21/1 21 25000 9216 up rs +Ethernet21 58 Eth22/1 22 25000 9216 up rs +Ethernet22 59 Eth23/1 23 25000 9216 up rs +Ethernet23 60 Eth24/1 24 25000 9216 up rs +Ethernet24 9 Eth25/1 25 25000 9216 up rs +Ethernet25 10 Eth26/1 26 25000 9216 up rs +Ethernet26 11 Eth27/1 27 25000 9216 up rs +Ethernet27 12 Eth28/1 28 25000 9216 up rs +Ethernet28 13 Eth29/1 29 25000 9216 up rs +Ethernet29 14 Eth30/1 30 25000 9216 up rs +Ethernet30 15 Eth31/1 31 25000 9216 up rs +Ethernet31 16 Eth32/1 32 25000 9216 up rs +Ethernet32 17 Eth33/1 33 25000 9216 up rs +Ethernet33 18 Eth34/1 34 25000 9216 up rs +Ethernet34 19 Eth35/1 35 25000 9216 up rs +Ethernet35 20 Eth36/1 36 25000 9216 up rs +Ethernet36 61 Eth37/1 37 25000 9216 up rs +Ethernet37 62 Eth38/1 38 25000 9216 up rs +Ethernet38 63 Eth39/1 39 25000 9216 up rs +Ethernet39 64 Eth40/1 40 25000 9216 up rs +Ethernet40 65 Eth41/1 41 25000 9216 up rs +Ethernet41 66 Eth42/1 42 25000 9216 up rs +Ethernet42 67 Eth43/1 43 25000 9216 up rs +Ethernet43 68 Eth44/1 44 25000 9216 up rs +Ethernet44 69 Eth45/1 45 25000 9216 up rs +Ethernet45 70 Eth46/1 46 25000 9216 up rs +Ethernet46 71 Eth47/1 47 25000 9216 up rs +Ethernet47 72 Eth48/1 48 25000 9216 up rs +Ethernet48 41,42,43,44 Eth49/1 49 100000 9216 up rs +Ethernet52 45,46,47,48 Eth50/1 50 100000 9216 up rs +Ethernet56 73,74,75,76 Eth51/1 51 100000 9216 up rs +Ethernet60 77,78,79,80 Eth52/1 52 100000 9216 up rs +Ethernet64 1,2,3,4 Eth53/1 53 100000 9216 up rs +Ethernet68 21,22,23,24 Eth54/1 54 100000 9216 up rs +Ethernet72 5,6,7,8 Eth55/1 55 100000 9216 up rs +Ethernet76 25,26,27,28 Eth56/1 56 100000 9216 up rs diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 new file mode 100644 index 000000000000..62a1db9e0960 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 @@ -0,0 +1,16 @@ +{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%} +{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%} +{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%} +{%- if 'enable' in vxlan_profile.lower() %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%} +{%- endif %} +{%- endif %} +{# Write the contents of sai_profile_filename to sai.profile file #} +{{ sai_profile_contents }} diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm new file mode 100755 index 000000000000..7d444dfb53f6 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm @@ -0,0 +1,423 @@ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +oversubscribe_mode=1 +pbmp_xport_xe=0x11ffffffe1ffffffe +stable_size=0x5500000 +ifp_inports_support_enable=1 + +#FC0 +portmap_1.0=1:100 + +#FC1 +portmap_2.0=5:100 + +#FC2 +portmap_3.0=9:25 +portmap_4.0=10:25 +portmap_5.0=11:25 +portmap_6.0=12:25 + +#FC3 +portmap_7.0=13:25 +portmap_8.0=14:25 +portmap_9.0=15:25 +portmap_10.0=16:25 + +#FC4 +portmap_11.0=17:25 +portmap_12.0=18:25 +portmap_13.0=19:25 +portmap_14.0=20:25 + +#FC5 +portmap_15.0=21:100 + +#FC6 +portmap_16.0=25:100 + +#FC7 +portmap_17.0=29:25 +portmap_18.0=30:25 +portmap_19.0=31:25 +portmap_20.0=32:25 + +#FC8 +portmap_21.0=33:25 +portmap_22.0=34:25 +portmap_23.0=35:25 +portmap_24.0=36:25 + +#FC9 +portmap_25.0=37:25 +portmap_26.0=38:25 +portmap_27.0=39:25 +portmap_28.0=40:25 + +#FC10 +portmap_33.0=41:100 + +#FC11 +portmap_34.0=45:100 + +#FC12 +portmap_35.0=49:25 +portmap_36.0=50:25 +portmap_37.0=51:25 +portmap_38.0=52:25 + +#FC13 +portmap_39.0=53:25 +portmap_40.0=54:25 +portmap_41.0=55:25 +portmap_42.0=56:25 + +#FC14 +portmap_43.0=57:25 +portmap_44.0=58:25 +portmap_45.0=59:25 +portmap_46.0=60:25 + +#FC15 +portmap_47.0=61:25 +portmap_48.0=62:25 +portmap_49.0=63:25 +portmap_50.0=64:25 + +#FC16 +portmap_51.0=65:25 +portmap_52.0=66:25 +portmap_53.0=67:25 +portmap_54.0=68:25 + +#FC17 +portmap_55.0=69:25 +portmap_56.0=70:25 +portmap_57.0=71:25 +portmap_58.0=72:25 + +#FC18 +portmap_59.0=73:100 + +#FC19 +portmap_60.0=77:100 + + +#portmap_64.0=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + + +dport_map_port_17=1 +dport_map_port_18=2 +dport_map_port_19=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_35=13 +dport_map_port_36=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_34=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 +#dport_map_port_64=57 + +#VxLAN +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +bcm_tunnel_term_compatible_mode=1 +flow_init_mode=1 +l3_ecmp_levels=2 +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +riot_overlay_ecmp_resilient_hash_size=16384 diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm new file mode 100755 index 000000000000..e76aa8eb34e9 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm @@ -0,0 +1,414 @@ +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +oversubscribe_mode=1 +pbmp_xport_xe=0x11ffffffe1ffffffe +stable_size=0x5500000 +ifp_inports_support_enable=1 + +#FC0 +portmap_1.0=1:100 + +#FC1 +portmap_2.0=5:100 + +#FC2 +portmap_3.0=9:25 +portmap_4.0=10:25 +portmap_5.0=11:25 +portmap_6.0=12:25 + +#FC3 +portmap_7.0=13:25 +portmap_8.0=14:25 +portmap_9.0=15:25 +portmap_10.0=16:25 + +#FC4 +portmap_11.0=17:25 +portmap_12.0=18:25 +portmap_13.0=19:25 +portmap_14.0=20:25 + +#FC5 +portmap_15.0=21:100 + +#FC6 +portmap_16.0=25:100 + +#FC7 +portmap_17.0=29:25 +portmap_18.0=30:25 +portmap_19.0=31:25 +portmap_20.0=32:25 + +#FC8 +portmap_21.0=33:25 +portmap_22.0=34:25 +portmap_23.0=35:25 +portmap_24.0=36:25 + +#FC9 +portmap_25.0=37:25 +portmap_26.0=38:25 +portmap_27.0=39:25 +portmap_28.0=40:25 + +#FC10 +portmap_33.0=41:100 + +#FC11 +portmap_34.0=45:100 + +#FC12 +portmap_35.0=49:25 +portmap_36.0=50:25 +portmap_37.0=51:25 +portmap_38.0=52:25 + +#FC13 +portmap_39.0=53:25 +portmap_40.0=54:25 +portmap_41.0=55:25 +portmap_42.0=56:25 + +#FC14 +portmap_43.0=57:25 +portmap_44.0=58:25 +portmap_45.0=59:25 +portmap_46.0=60:25 + +#FC15 +portmap_47.0=61:25 +portmap_48.0=62:25 +portmap_49.0=63:25 +portmap_50.0=64:25 + +#FC16 +portmap_51.0=65:25 +portmap_52.0=66:25 +portmap_53.0=67:25 +portmap_54.0=68:25 + +#FC17 +portmap_55.0=69:25 +portmap_56.0=70:25 +portmap_57.0=71:25 +portmap_58.0=72:25 + +#FC18 +portmap_59.0=73:100 + +#FC19 +portmap_60.0=77:100 + + +#portmap_64.0=81:10 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x1302 +phy_chain_tx_lane_map_physical{5.0}=0x1032 +phy_chain_rx_lane_map_physical{5.0}=0x1302 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x1032 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x1032 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x1032 +phy_chain_tx_lane_map_physical{21.0}=0x1302 +phy_chain_rx_lane_map_physical{21.0}=0x1032 +phy_chain_tx_lane_map_physical{25.0}=0x3120 +phy_chain_rx_lane_map_physical{25.0}=0x1032 +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x1032 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_rx_lane_map_physical{33.0}=0x1032 +phy_chain_tx_lane_map_physical{37.0}=0x0123 +phy_chain_rx_lane_map_physical{37.0}=0x1032 +phy_chain_tx_lane_map_physical{41.0}=0x1302 +phy_chain_rx_lane_map_physical{41.0}=0x1023 +phy_chain_tx_lane_map_physical{45.0}=0x1032 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_tx_lane_map_physical{49.0}=0x3210 +phy_chain_rx_lane_map_physical{49.0}=0x2301 +phy_chain_tx_lane_map_physical{53.0}=0x3210 +phy_chain_rx_lane_map_physical{53.0}=0x2301 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{57.0}=0x2301 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x2301 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x2301 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x2301 +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x2031 +phy_chain_tx_lane_map_physical{77.0}=0x0132 +phy_chain_rx_lane_map_physical{77.0}=0x3012 +phy_chain_tx_lane_map_physical{81.0}=0x3210 +phy_chain_rx_lane_map_physical{81.0}=0x3201 + +#FC0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x1 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#FC1 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 + +#FC2 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_tx_polarity_flip_physical{10.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 + +#FC3 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 + +#FC4 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x1 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x1 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 + +#FC5 +phy_chain_tx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 + +#FC6 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x1 +phy_chain_tx_polarity_flip_physical{27.0}=0x1 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#FC7 +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x1 +phy_chain_tx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 + +#FC8 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 + +#FC9 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 + +#FC10 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x0 + +#FC11 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#FC12 +phy_chain_tx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x0 + +#FC13 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x0 + +#FC14 +phy_chain_tx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x0 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x0 + +#FC15 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#FC16 +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 + +#FC17 +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 + +#FC18 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#FC19 +phy_chain_tx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x1 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 + + +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x1 + + +dport_map_port_17=1 +dport_map_port_18=2 +dport_map_port_19=3 +dport_map_port_20=4 +dport_map_port_21=5 +dport_map_port_22=6 +dport_map_port_23=7 +dport_map_port_24=8 +dport_map_port_25=9 +dport_map_port_26=10 +dport_map_port_27=11 +dport_map_port_28=12 +dport_map_port_35=13 +dport_map_port_36=14 +dport_map_port_37=15 +dport_map_port_38=16 +dport_map_port_39=17 +dport_map_port_40=18 +dport_map_port_41=19 +dport_map_port_42=20 +dport_map_port_43=21 +dport_map_port_44=22 +dport_map_port_45=23 +dport_map_port_46=24 +dport_map_port_3=25 +dport_map_port_4=26 +dport_map_port_5=27 +dport_map_port_6=28 +dport_map_port_7=29 +dport_map_port_8=30 +dport_map_port_9=31 +dport_map_port_10=32 +dport_map_port_11=33 +dport_map_port_12=34 +dport_map_port_13=35 +dport_map_port_14=36 +dport_map_port_47=37 +dport_map_port_48=38 +dport_map_port_49=39 +dport_map_port_50=40 +dport_map_port_51=41 +dport_map_port_52=42 +dport_map_port_53=43 +dport_map_port_54=44 +dport_map_port_55=45 +dport_map_port_56=46 +dport_map_port_57=47 +dport_map_port_58=48 +dport_map_port_33=49 +dport_map_port_34=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_1=53 +dport_map_port_15=54 +dport_map_port_2=55 +dport_map_port_16=56 +#dport_map_port_64=57 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_questone_2-r0/installer.conf b/device/celestica/x86_64-cel_questone_2-r0/installer.conf new file mode 100644 index 000000000000..48126f43549a --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0xe060 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off thermal.off=1 noirqdebug" diff --git a/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc new file mode 100644 index 000000000000..6f242fa07d89 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc @@ -0,0 +1,8 @@ +#Enable all ports +#port all en=1 +#sleep 6 +#linkscan 250000; port xe,ce linkscan=on + +#Load LED +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led auto on; led start diff --git a/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg new file mode 100644 index 000000000000..7008c14c0ffc --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg @@ -0,0 +1,3 @@ +linkscan 250000; port xe,ce linkscan=on +sleep 1 +led auto on; led start diff --git a/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml new file mode 100644 index 000000000000..bafe4a0d6d2a --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml @@ -0,0 +1,153 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b770 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '05' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '05' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_asic b/device/celestica/x86_64-cel_questone_2-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_reboot b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot new file mode 100755 index 000000000000..12a18efe1d0b --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null + +/usr/local/bin/questone2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py new file mode 100644 index 000000000000..22895539823f --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica DX010 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) + diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py new file mode 100755 index 000000000000..03882c65ac00 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase + import struct +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 55 + QSFP_PORT_START = 48 + QSFP_PORT_END = 55 + __xcvr_presence = {} + + EEPROM_OFFSET = 9 + PORT_INFO_PATH = '/sys/class/questone2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num + 1) + return self._port_name + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom + # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom + # so the real offset is 10 + self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + 1 + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + for x in range(self.PORT_START, self.PORT_END+1): + self.__xcvr_presence[x] = self.get_presence(x) + + def _do_write_file(self, file_handle, offset, value): + file_handle.seek(offset) + file_handle.write(hex(value)) + file_handle.close() + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in range(self.port_start, self.port_end + 1): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + if not self.get_presence(port_num): + return None + + eeprom_raw = [] + eeprom_raw.append("0x00") + + lpmode = False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + if port_num >= 49: + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(93) + raw = eeprom.read(1) + eeprom.close() + except Exception as err: + return None + + if len(raw) == 0: + return None + eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2) + + power_data = int(eeprom_raw[0], 16) + # if lpmod, power-override bit and power-set bit are both setted + # bit0 bit1 + lpmode = power_data & 0x03 != 0 + else: + return None + + return lpmode + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + if not self.get_presence(port_num): + return False + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET) + try: + reg_file = open(eeprom_path, mode="wb+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(93) + power_raw = reg_file.read(1) + if power_raw is None: + return False + power_data = int(hex(ord(power_raw))[2:].zfill(2), 16) + + if lpmode: + power_data |= 0x03 + else: + power_data &= ~(0x03) + + reg_file.seek(93) + reg_file.write(struct.pack('B', int(power_data))) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + To detect if any transceiver change event happens. + """ + start_ms = time.time() * 1000 + xcvr_change_event_dict = {} + event = False + + while True: + time.sleep(0.5) + for port in range(self.port_start, self.port_end+1): + curr_presence = self.get_presence(port) + if curr_presence != self.__xcvr_presence[port]: + if curr_presence is True: + xcvr_change_event_dict[str(port)] = '1' + self.__xcvr_presence[port] = True + elif curr_presence is False: + xcvr_change_event_dict[str(port)] = '0' + self.__xcvr_presence[port] = False + event = True + + if event is True: + return True, xcvr_change_event_dict + + if timeout: + now_ms = time.time() * 1000 + if (now_ms - start_ms >= timeout): + return True, xcvr_change_event_dict + + def tx_disable(self, port_num, disable): + """ + @param port_num index of physical port + @param disable, True -- disable port tx signal + False -- enable port tx signal + @return True when operation success, False on failure. + """ + TX_DISABLE_BYTE_OFFSET = 86 + if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool: + return False + + # QSFP, set eeprom to disable tx + if port_num in self.qsfp_ports: + presence = self.get_presence(port_num) + if not presence: + return True + + disable = b'\x0f' if disable else b'\x00' + # open eeprom + try: + with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile: + sysfsfile.seek(TX_DISABLE_BYTE_OFFSET) + sysfsfile.write(bytearray(disable)) + except IOError: + return False + + # SFP, set tx_disable pin + else: + try: + disable = hex(1) if disable else hex(0) + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w") + reg_file.write(disable) + reg_file.close() + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + return True + + def reset_all(self): + result = True + port_sysfs_path = [] + for port in range(self.port_start, self.port_end+1): + if port not in self.qsfp_ports: + continue + + presence = self.get_presence(port) + if not presence: + continue + + try: + port_name = self.get_port_name(port) + sysfs_path = "/".join([self.PORT_INFO_PATH, + port_name, "qsfp_reset"]) + reg_file = open(sysfs_path, "w") + port_sysfs_path.append(sysfs_path) + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 0) + + time.sleep(1) + + for sysfs_path in port_sysfs_path: + try: + reg_file = open(sysfs_path, "w") + except IOError as e: + result = False + continue + + self._do_write_file(reg_file, 0, 1) + + return result diff --git a/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..f5b2736b13e0 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin new file mode 100755 index 000000000000..d0fb8b29e191 --- /dev/null +++ b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 new file mode 100644 index 000000000000..0b1cb2c541b6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json new file mode 100644 index 000000000000..28e50b8c0385 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json @@ -0,0 +1,169 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet12": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet20": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet44": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet84": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet100": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet108": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet116": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet124": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x10G", + "autoneg": "off", + "fec": "none" + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini index 1596faa8af96..8cd1c833a929 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini @@ -1,34 +1,34 @@ -# name lanes alias fec index speed -Ethernet0 1,2,3,4 QSFP1 rs 1 100000 -Ethernet4 5,6,7,8 QSFP2 rs 2 100000 -Ethernet8 9,10,11,12 QSFP3 rs 3 100000 -Ethernet12 13,14,15,16 QSFP4 rs 4 100000 -Ethernet16 17,18,19,20 QSFP5 rs 5 100000 -Ethernet20 21,22,23,24 QSFP6 rs 6 100000 -Ethernet24 25,26,27,28 QSFP7 rs 7 100000 -Ethernet28 29,30,31,32 QSFP8 rs 8 100000 -Ethernet32 33,34,35,36 QSFP9 rs 9 100000 -Ethernet36 37,38,39,40 QSFP10 rs 10 100000 -Ethernet40 41,42,43,44 QSFP11 rs 11 100000 -Ethernet44 45,46,47,48 QSFP12 rs 12 100000 -Ethernet48 49,50,51,52 QSFP13 rs 13 100000 -Ethernet52 53,54,55,56 QSFP14 rs 14 100000 -Ethernet56 57,58,59,60 QSFP15 rs 15 100000 -Ethernet60 61,62,63,64 QSFP16 rs 16 100000 -Ethernet64 65,66,67,68 QSFP17 rs 17 100000 -Ethernet68 69,70,71,72 QSFP18 rs 18 100000 -Ethernet72 73,74,75,76 QSFP19 rs 19 100000 -Ethernet76 77,78,79,80 QSFP20 rs 20 100000 -Ethernet80 81,82,83,84 QSFP21 rs 21 100000 -Ethernet84 85,86,87,88 QSFP22 rs 22 100000 -Ethernet88 89,90,91,92 QSFP23 rs 23 100000 -Ethernet92 93,94,95,96 QSFP24 rs 24 100000 -Ethernet96 97,98,99,100 QSFP25 rs 25 100000 -Ethernet100 101,102,103,104 QSFP26 rs 26 100000 -Ethernet104 105,106,107,108 QSFP27 rs 27 100000 -Ethernet108 109,110,111,112 QSFP28 rs 28 100000 -Ethernet112 113,114,115,116 QSFP29 rs 29 100000 -Ethernet116 117,118,119,120 QSFP30 rs 30 100000 -Ethernet120 121,122,123,124 QSFP31 rs 31 100000 -Ethernet124 125,126,127,128 QSFP32 rs 32 100000 -Ethernet128 129 SFP1 none 33 10000 +# name lanes alias index speed valid_speeds +Ethernet0 1,2,3,4 Eth1/1 1 100000 100000,40000 +Ethernet4 5,6,7,8 Eth2/1 2 100000 100000,40000 +Ethernet8 9,10,11,12 Eth3/1 3 100000 100000,40000 +Ethernet12 13,14,15,16 Eth4/1 4 100000 100000,40000 +Ethernet16 17,18,19,20 Eth5/1 5 100000 100000,40000 +Ethernet20 21,22,23,24 Eth6/1 6 100000 100000,40000 +Ethernet24 25,26,27,28 Eth7/1 7 100000 100000,40000 +Ethernet28 29,30,31,32 Eth8/1 8 100000 100000,40000 +Ethernet32 33,34,35,36 Eth9/1 9 100000 100000,40000 +Ethernet36 37,38,39,40 Eth10/1 10 100000 100000,40000 +Ethernet40 41,42,43,44 Eth11/1 11 100000 100000,40000 +Ethernet44 45,46,47,48 Eth12/1 12 100000 100000,40000 +Ethernet48 49,50,51,52 Eth13/1 13 100000 100000,40000 +Ethernet52 53,54,55,56 Eth14/1 14 100000 100000,40000 +Ethernet56 57,58,59,60 Eth15/1 15 100000 100000,40000 +Ethernet60 61,62,63,64 Eth16/1 16 100000 100000,40000 +Ethernet64 65,66,67,68 Eth17/1 17 100000 100000,40000 +Ethernet68 69,70,71,72 Eth18/1 18 100000 100000,40000 +Ethernet72 73,74,75,76 Eth19/1 19 100000 100000,40000 +Ethernet76 77,78,79,80 Eth20/1 20 100000 100000,40000 +Ethernet80 81,82,83,84 Eth21/1 21 100000 100000,40000 +Ethernet84 85,86,87,88 Eth22/1 22 100000 100000,40000 +Ethernet88 89,90,91,92 Eth23/1 23 100000 100000,40000 +Ethernet92 93,94,95,96 Eth24/1 24 100000 100000,40000 +Ethernet96 97,98,99,100 Eth25/1 25 100000 100000,40000 +Ethernet100 101,102,103,104 Eth26/1 26 100000 100000,40000 +Ethernet104 105,106,107,108 Eth27/1 27 100000 100000,40000 +Ethernet108 109,110,111,112 Eth28/1 28 100000 100000,40000 +Ethernet112 113,114,115,116 Eth29/1 29 100000 100000,40000 +Ethernet116 117,118,119,120 Eth30/1 30 100000 100000,40000 +Ethernet120 121,122,123,124 Eth31/1 31 100000 100000,40000 +Ethernet124 125,126,127,128 Eth32/1 32 100000 100000,40000 +Ethernet128 129 Eth33/1 33 10000 10000,1000 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile deleted file mode 100644 index b57101d114f0..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile +++ /dev/null @@ -1,2 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm -SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 new file mode 100644 index 000000000000..0c9245de7cd2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 @@ -0,0 +1,17 @@ +{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%} +{%- if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%} +{%- set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%} +{%- if 'enable' in vxlan_profile.lower() %} +{% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm' -%} +{%- endif %} +{%- else %} +{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%} +{%- endif %} +{%- endif %} +{# Write the contents of sai_profile_filename to sai.profile file #} +{{ sai_profile_contents }} +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm new file mode 100644 index 000000000000..83c535a24b35 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm @@ -0,0 +1,576 @@ +help_cli_enable=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2_mem_entries=32768 +l2xmsg_mode=1 +l3_max_ecmp_mode=1 +l3_mem_entries=16384 +lpm_scaling_enable=1 +max_vp_lags=0 +#mem_cache_enable=0 +memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +miim_intr_enable=0 +module_64ports=1 +oversubscribe_mode=1 +parity_enable=0 +serdes_lane_config_dfe=on +#serdes_fec_enable=1 +serdes_if_type_ce=14 +pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 +bcm_tunnel_term_compatible_mode=1 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m + +#wc0 lane swap +phy_chain_tx_lane_map_physical{1.0}=0x0132 +phy_chain_rx_lane_map_physical{1.0}=0x3210 + +#wc1 lane swap +phy_chain_tx_lane_map_physical{5.0}=0x2301 +phy_chain_rx_lane_map_physical{5.0}=0x2031 + +#wc2 lane swap +phy_chain_tx_lane_map_physical{9.0}=0x0132 +phy_chain_rx_lane_map_physical{9.0}=0x3210 + +#wc3 lane swap +phy_chain_tx_lane_map_physical{13.0}=0x3201 +phy_chain_rx_lane_map_physical{13.0}=0x2031 + +#wc4 lane swap +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x3210 + +#wc5 lane swap +phy_chain_tx_lane_map_physical{21.0}=0x2301 +phy_chain_rx_lane_map_physical{21.0}=0x2031 + +#wc6 lane swap +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x3210 + +#wc7 lane swap +phy_chain_tx_lane_map_physical{29.0}=0x3201 +phy_chain_rx_lane_map_physical{29.0}=0x2031 + +#wc8 lane swap +phy_chain_tx_lane_map_physical{33.0}=0x0213 +phy_chain_rx_lane_map_physical{33.0}=0x1302 + +#wc9 lane swap +phy_chain_tx_lane_map_physical{37.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x2031 + +#wc10 lane swap +phy_chain_tx_lane_map_physical{41.0}=0x0231 +phy_chain_rx_lane_map_physical{41.0}=0x3120 + +#wc11 lane swap +phy_chain_tx_lane_map_physical{45.0}=0x1302 +phy_chain_rx_lane_map_physical{45.0}=0x2031 + +#wc12 lane swap +phy_chain_tx_lane_map_physical{49.0}=0x2103 +phy_chain_rx_lane_map_physical{49.0}=0x3120 + +#wc13 lane swap +phy_chain_tx_lane_map_physical{53.0}=0x2301 +phy_chain_rx_lane_map_physical{53.0}=0x2031 + +#wc14 lane swap +phy_chain_tx_lane_map_physical{57.0}=0x0123 +phy_chain_rx_lane_map_physical{57.0}=0x2301 + +#wc15 lane swap +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x1032 + +#wc16 lane swap +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x1023 + +#wc17 lane swap +phy_chain_tx_lane_map_physical{69.0}=0x0123 +phy_chain_rx_lane_map_physical{69.0}=0x1302 + +#wc18 lane swap +phy_chain_tx_lane_map_physical{73.0}=0x2301 +phy_chain_rx_lane_map_physical{73.0}=0x1032 + +#wc19 lane swap +phy_chain_tx_lane_map_physical{77.0}=0x2013 +phy_chain_rx_lane_map_physical{77.0}=0x3120 + +#wc20 lane swap +phy_chain_tx_lane_map_physical{81.0}=0x1302 +phy_chain_rx_lane_map_physical{81.0}=0x2031 + +#wc21 lane swap +phy_chain_tx_lane_map_physical{85.0}=0x0123 +phy_chain_rx_lane_map_physical{85.0}=0x2130 + +#wc22 lane swap +phy_chain_tx_lane_map_physical{89.0}=0x2301 +phy_chain_rx_lane_map_physical{89.0}=0x2031 + +#wc23 lane swap +phy_chain_tx_lane_map_physical{93.0}=0x0312 +phy_chain_rx_lane_map_physical{93.0}=0x2310 + +#wc24 lane swap +phy_chain_tx_lane_map_physical{97.0}=0x2301 +phy_chain_rx_lane_map_physical{97.0}=0x1032 + +#wc25 lane swap +phy_chain_tx_lane_map_physical{101.0}=0x0123 +phy_chain_rx_lane_map_physical{101.0}=0x3210 + +#wc26 lane swap +phy_chain_tx_lane_map_physical{105.0}=0x2301 +phy_chain_rx_lane_map_physical{105.0}=0x1032 + +#wc27 lane swap +phy_chain_tx_lane_map_physical{109.0}=0x0123 +phy_chain_rx_lane_map_physical{109.0}=0x3210 + +#wc28 lane swap +phy_chain_tx_lane_map_physical{113.0}=0x2301 +phy_chain_rx_lane_map_physical{113.0}=0x2031 + +#wc29 lane swap +phy_chain_tx_lane_map_physical{117.0}=0x0123 +phy_chain_rx_lane_map_physical{117.0}=0x3210 + +#wc30 lane swap +phy_chain_tx_lane_map_physical{121.0}=0x2301 +phy_chain_rx_lane_map_physical{121.0}=0x1032 + +#wc31 lane swap +phy_chain_tx_lane_map_physical{125.0}=0x0123 +phy_chain_rx_lane_map_physical{125.0}=0x3210 + +#MC lane swap +phy_chain_tx_lane_map_physical{129.0}=0x3210 +phy_chain_rx_lane_map_physical{129.0}=0x0231 + + +#wc0 P/N flip +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 + +#wc1 P/N flip +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x1 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_tx_polarity_flip_physical{8.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x1 + +#wc2 P/N flip +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x1 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x1 + +#wc3 P/N flip +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x1 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x1 + +#wc4 P/N flip +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 + +#wc5 P/N flip +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x1 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_tx_polarity_flip_physical{24.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x1 + +#wc6 P/N flip +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x1 +phy_chain_tx_polarity_flip_physical{26.0}=0x1 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x1 +phy_chain_tx_polarity_flip_physical{28.0}=0x1 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 + +#wc7 P/N flip +phy_chain_tx_polarity_flip_physical{29.0}=0x1 +phy_chain_rx_polarity_flip_physical{29.0}=0x1 +phy_chain_tx_polarity_flip_physical{30.0}=0x1 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 + +#wc8 P/N flip +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_rx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 + +#wc9 P/N flip +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 + +#wc10 P/N flip +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 + +#wc11 P/N flip +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 + +#wc12 P/N flip +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_tx_polarity_flip_physical{50.0}=0x1 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x1 +phy_chain_tx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 + +#wc13 P/N flip +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_rx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x1 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x1 +phy_chain_tx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 + +#wc14 P/N flip +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 + +#wc15 P/N flip +phy_chain_tx_polarity_flip_physical{61.0}=0x0 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_tx_polarity_flip_physical{63.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 + +#wc16 P/N flip +phy_chain_tx_polarity_flip_physical{65.0}=0x1 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x1 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x0 + +#wc17 P/N flip +phy_chain_tx_polarity_flip_physical{69.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x1 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x0 + +#wc18 P/N flip +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{73.0}=0x1 +phy_chain_tx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{75.0}=0x1 +phy_chain_tx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{76.0}=0x0 + +#wc19 P/N flip +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_rx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_tx_polarity_flip_physical{80.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x1 + +#wc20 P/N flip +phy_chain_tx_polarity_flip_physical{81.0}=0x0 +phy_chain_rx_polarity_flip_physical{81.0}=0x0 +phy_chain_tx_polarity_flip_physical{82.0}=0x0 +phy_chain_rx_polarity_flip_physical{82.0}=0x0 +phy_chain_tx_polarity_flip_physical{83.0}=0x1 +phy_chain_rx_polarity_flip_physical{83.0}=0x1 +phy_chain_tx_polarity_flip_physical{84.0}=0x1 +phy_chain_rx_polarity_flip_physical{84.0}=0x0 + +#wc21 P/N flip +phy_chain_tx_polarity_flip_physical{85.0}=0x1 +phy_chain_rx_polarity_flip_physical{85.0}=0x1 +phy_chain_tx_polarity_flip_physical{86.0}=0x0 +phy_chain_rx_polarity_flip_physical{86.0}=0x1 +phy_chain_tx_polarity_flip_physical{87.0}=0x1 +phy_chain_rx_polarity_flip_physical{87.0}=0x0 +phy_chain_tx_polarity_flip_physical{88.0}=0x0 +phy_chain_rx_polarity_flip_physical{88.0}=0x0 + +#wc22 P/N flip +phy_chain_tx_polarity_flip_physical{89.0}=0x1 +phy_chain_rx_polarity_flip_physical{89.0}=0x0 +phy_chain_tx_polarity_flip_physical{90.0}=0x0 +phy_chain_rx_polarity_flip_physical{90.0}=0x0 +phy_chain_tx_polarity_flip_physical{91.0}=0x1 +phy_chain_rx_polarity_flip_physical{91.0}=0x1 +phy_chain_tx_polarity_flip_physical{92.0}=0x0 +phy_chain_rx_polarity_flip_physical{92.0}=0x1 + +#wc23 P/N flip +phy_chain_tx_polarity_flip_physical{93.0}=0x1 +phy_chain_rx_polarity_flip_physical{93.0}=0x1 +phy_chain_tx_polarity_flip_physical{94.0}=0x1 +phy_chain_rx_polarity_flip_physical{94.0}=0x1 +phy_chain_tx_polarity_flip_physical{95.0}=0x0 +phy_chain_rx_polarity_flip_physical{95.0}=0x0 +phy_chain_tx_polarity_flip_physical{96.0}=0x0 +phy_chain_rx_polarity_flip_physical{96.0}=0x1 + +#wc24 P/N flip +phy_chain_tx_polarity_flip_physical{97.0}=0x1 +phy_chain_rx_polarity_flip_physical{97.0}=0x1 +phy_chain_tx_polarity_flip_physical{98.0}=0x0 +phy_chain_rx_polarity_flip_physical{98.0}=0x0 +phy_chain_tx_polarity_flip_physical{99.0}=0x1 +phy_chain_rx_polarity_flip_physical{99.0}=0x1 +phy_chain_tx_polarity_flip_physical{100.0}=0x0 +phy_chain_rx_polarity_flip_physical{100.0}=0x0 + +#wc25 P/N flip +phy_chain_tx_polarity_flip_physical{101.0}=0x1 +phy_chain_rx_polarity_flip_physical{101.0}=0x0 +phy_chain_tx_polarity_flip_physical{102.0}=0x0 +phy_chain_rx_polarity_flip_physical{102.0}=0x1 +phy_chain_tx_polarity_flip_physical{103.0}=0x1 +phy_chain_rx_polarity_flip_physical{103.0}=0x0 +phy_chain_tx_polarity_flip_physical{104.0}=0x0 +phy_chain_rx_polarity_flip_physical{104.0}=0x0 + +#wc26 P/N flip +phy_chain_tx_polarity_flip_physical{105.0}=0x1 +phy_chain_rx_polarity_flip_physical{105.0}=0x0 +phy_chain_tx_polarity_flip_physical{106.0}=0x0 +phy_chain_rx_polarity_flip_physical{106.0}=0x1 +phy_chain_tx_polarity_flip_physical{107.0}=0x1 +phy_chain_rx_polarity_flip_physical{107.0}=0x0 +phy_chain_tx_polarity_flip_physical{108.0}=0x0 +phy_chain_rx_polarity_flip_physical{108.0}=0x1 + +#wc27 P/N flip +phy_chain_tx_polarity_flip_physical{109.0}=0x1 +phy_chain_rx_polarity_flip_physical{109.0}=0x1 +phy_chain_tx_polarity_flip_physical{110.0}=0x0 +phy_chain_rx_polarity_flip_physical{110.0}=0x0 +phy_chain_tx_polarity_flip_physical{111.0}=0x1 +phy_chain_rx_polarity_flip_physical{111.0}=0x1 +phy_chain_tx_polarity_flip_physical{112.0}=0x0 +phy_chain_rx_polarity_flip_physical{112.0}=0x0 + +#wc28 P/N flip +phy_chain_tx_polarity_flip_physical{113.0}=0x1 +phy_chain_rx_polarity_flip_physical{113.0}=0x1 +phy_chain_tx_polarity_flip_physical{114.0}=0x0 +phy_chain_rx_polarity_flip_physical{114.0}=0x0 +phy_chain_tx_polarity_flip_physical{115.0}=0x1 +phy_chain_rx_polarity_flip_physical{115.0}=0x0 +phy_chain_tx_polarity_flip_physical{116.0}=0x0 +phy_chain_rx_polarity_flip_physical{116.0}=0x0 + +#wc29 P/N flip +phy_chain_tx_polarity_flip_physical{117.0}=0x1 +phy_chain_rx_polarity_flip_physical{117.0}=0x1 +phy_chain_tx_polarity_flip_physical{118.0}=0x0 +phy_chain_rx_polarity_flip_physical{118.0}=0x0 +phy_chain_tx_polarity_flip_physical{119.0}=0x1 +phy_chain_rx_polarity_flip_physical{119.0}=0x1 +phy_chain_tx_polarity_flip_physical{120.0}=0x0 +phy_chain_rx_polarity_flip_physical{120.0}=0x0 + +#wc30 P/N flip +phy_chain_tx_polarity_flip_physical{121.0}=0x1 +phy_chain_rx_polarity_flip_physical{121.0}=0x0 +phy_chain_tx_polarity_flip_physical{122.0}=0x0 +phy_chain_rx_polarity_flip_physical{122.0}=0x1 +phy_chain_tx_polarity_flip_physical{123.0}=0x1 +phy_chain_rx_polarity_flip_physical{123.0}=0x0 +phy_chain_tx_polarity_flip_physical{124.0}=0x0 +phy_chain_rx_polarity_flip_physical{124.0}=0x1 + +#wc31 P/N flip +phy_chain_tx_polarity_flip_physical{125.0}=0x1 +phy_chain_rx_polarity_flip_physical{125.0}=0x1 +phy_chain_tx_polarity_flip_physical{126.0}=0x0 +phy_chain_rx_polarity_flip_physical{126.0}=0x0 +phy_chain_tx_polarity_flip_physical{127.0}=0x1 +phy_chain_rx_polarity_flip_physical{127.0}=0x1 +phy_chain_tx_polarity_flip_physical{128.0}=0x0 +phy_chain_rx_polarity_flip_physical{128.0}=0x0 + +#MC P/N flip +phy_chain_tx_polarity_flip_physical{129.0}=0x1 +phy_chain_rx_polarity_flip_physical{129.0}=0x0 +phy_chain_tx_polarity_flip_physical{130.0}=0x0 +phy_chain_rx_polarity_flip_physical{130.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 +phy_chain_tx_polarity_flip_physical{132.0}=0x0 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + + +# configuration for 100G optical module +serdes_preemphasis_1=0x164608 +serdes_preemphasis_5=0x164608 +serdes_preemphasis_9=0x164608 +serdes_preemphasis_13=0x134908 +serdes_preemphasis_17=0x134908 +serdes_preemphasis_21=0x134908 +serdes_preemphasis_25=0x124a08 +serdes_preemphasis_29=0x124a08 +serdes_preemphasis_33=0x114b08 +serdes_preemphasis_37=0x114b08 +serdes_preemphasis_41=0x0f4d08 +serdes_preemphasis_45=0x0f4d08 +serdes_preemphasis_49=0x0d4f08 +serdes_preemphasis_53=0x0d4f08 +serdes_preemphasis_57=0x0d4f08 +serdes_preemphasis_61=0x0d4f08 +serdes_preemphasis_67=0x0d4f08 +serdes_preemphasis_71=0x0d4f08 +serdes_preemphasis_75=0x0d4f08 +serdes_preemphasis_79=0x0d4f08 +serdes_preemphasis_83=0x0d4f08 +serdes_preemphasis_87=0x0f4d08 +serdes_preemphasis_91=0x0f4d08 +serdes_preemphasis_95=0x0f4d08 +serdes_preemphasis_99=0x114b08 +serdes_preemphasis_103=0x114b08 +serdes_preemphasis_107=0x114b08 +serdes_preemphasis_111=0x124a08 +serdes_preemphasis_115=0x134908 +serdes_preemphasis_119=0x134908 +serdes_preemphasis_123=0x134908 +serdes_preemphasis_127=0x164608 + +#VxLAN +sai_tunnel_support=1 +use_all_splithorizon_groups=1 +bcm_tunnel_term_compatible_mode=1 +flow_init_mode=1 +l3_ecmp_levels=2 +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +riot_overlay_ecmp_resilient_hash_size=16384 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm index d9d2f47750d9..7803fa422f1a 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm +++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm @@ -1,4 +1,3 @@ -sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/ help_cli_enable=1 ifp_inports_support_enable=1 ipv6_lpm_128b_enable=0x1 @@ -8,8 +7,13 @@ l3_max_ecmp_mode=1 l3_mem_entries=16384 lpm_scaling_enable=1 max_vp_lags=0 -mem_cache_enable=0 +#mem_cache_enable=0 memlist_enable=1 +reglist_enable=1 +#scache_filename=/tmp/scache +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 miim_intr_enable=0 module_64ports=1 oversubscribe_mode=1 @@ -18,47 +22,49 @@ serdes_lane_config_dfe=on #serdes_fec_enable=1 serdes_if_type_ce=14 pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000 -pbmp_xport_xe=0x888888888888888c2222222222222222 +pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe +port_flex_enable=1 ptp_ts_pll_fref=50000000 ptp_bs_fref_0=50000000 ptp_bs_fref_1=50000000 - -portmap_1.0=1:100 -portmap_5.0=5:100 -portmap_9.0=9:100 -portmap_13.0=13:100 -portmap_17.0=17:100 -portmap_21.0=21:100 -portmap_25.0=25:100 -portmap_29.0=29:100 -portmap_33.0=33:100 -portmap_37.0=37:100 -portmap_41.0=41:100 -portmap_45.0=45:100 -portmap_49.0=49:100 -portmap_53.0=53:100 -portmap_57.0=57:100 -portmap_61.0=61:100 - -portmap_67.0=65:100 -portmap_71.0=69:100 -portmap_75.0=73:100 -portmap_79.0=77:100 -portmap_83.0=81:100 -portmap_87.0=85:100 -portmap_91.0=89:100 -portmap_95.0=93:100 -portmap_99.0=97:100 -portmap_103.0=101:100 -portmap_107.0=105:100 -portmap_111.0=109:100 -portmap_115.0=113:100 -portmap_119.0=117:100 -portmap_123.0=121:100 -portmap_127.0=125:100 -portmap_66.0=129:10:m -#portmap_130.0=128:10:m +bcm_tunnel_term_compatible_mode=1 +phy_an_c73=1 + +portmap_1=1:100 +portmap_5=5:100 +portmap_9=9:100 +portmap_13=13:100 +portmap_17=17:100 +portmap_21=21:100 +portmap_25=25:100 +portmap_29=29:100 +portmap_33=33:100 +portmap_37=37:100 +portmap_41=41:100 +portmap_45=45:100 +portmap_49=49:100 +portmap_53=53:100 +portmap_57=57:100 +portmap_61=61:100 +portmap_67=65:100 +portmap_71=69:100 +portmap_75=73:100 +portmap_79=77:100 +portmap_83=81:100 +portmap_87=85:100 +portmap_91=89:100 +portmap_95=93:100 +portmap_99=97:100 +portmap_103=101:100 +portmap_107=105:100 +portmap_111=109:100 +portmap_115=113:100 +portmap_119=117:100 +portmap_123=121:100 +portmap_127=125:100 +portmap_66=129:10:m +#portmap_130=128:10:m #wc0 lane swap phy_chain_tx_lane_map_physical{1.0}=0x0132 @@ -518,45 +524,11 @@ phy_chain_tx_polarity_flip_physical{129.0}=0x1 phy_chain_rx_polarity_flip_physical{129.0}=0x0 phy_chain_tx_polarity_flip_physical{130.0}=0x0 phy_chain_rx_polarity_flip_physical{130.0}=0x0 -phy_chain_tx_polarity_flip_physical{131.0}=0x0 -phy_chain_rx_polarity_flip_physical{131.0}=0x0 +phy_chain_tx_polarity_flip_physical{131.0}=0x1 +phy_chain_rx_polarity_flip_physical{131.0}=0x1 phy_chain_tx_polarity_flip_physical{132.0}=0x0 -phy_chain_rx_polarity_flip_physical{132.0}=0x0 - -dport_map_port_1=1 -dport_map_port_5=2 -dport_map_port_9=3 -dport_map_port_13=4 -dport_map_port_17=5 -dport_map_port_21=6 -dport_map_port_25=7 -dport_map_port_29=8 -dport_map_port_33=9 -dport_map_port_37=10 -dport_map_port_41=11 -dport_map_port_45=12 -dport_map_port_49=13 -dport_map_port_53=14 -dport_map_port_57=15 -dport_map_port_61=16 -dport_map_port_67=17 -dport_map_port_71=18 -dport_map_port_75=19 -dport_map_port_79=20 -dport_map_port_83=21 -dport_map_port_87=22 -dport_map_port_91=23 -dport_map_port_95=24 -dport_map_port_99=25 -dport_map_port_103=26 -dport_map_port_107=27 -dport_map_port_111=28 -dport_map_port_115=29 -dport_map_port_119=30 -dport_map_port_123=31 -dport_map_port_127=32 -dport_map_port_66=33 -#dport_map_port_130=34 +phy_chain_rx_polarity_flip_physical{132.0}=0x1 + # configuration for 100G optical module serdes_preemphasis_1=0x164608 @@ -592,8 +564,3 @@ serdes_preemphasis_119=0x134908 serdes_preemphasis_123=0x134908 serdes_preemphasis_127=0x164608 -reglist_enable=1 -scache_filename=/tmp/scache -schan_intr_enable=0 -stable_size=0x5500000 -tdma_timeout_usec=3000000 diff --git a/device/celestica/x86_64-cel_seastone_2-r0/custom.bin b/device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin similarity index 100% rename from device/celestica/x86_64-cel_seastone_2-r0/custom.bin rename to device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin diff --git a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf index 3222a45fe1d4..1d21376ff555 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf +++ b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf @@ -1,3 +1,4 @@ +CONSOLE_PORT=0xe060 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="earlycon=uart8250,mmio,0xdf37b000" \ No newline at end of file +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off thermal.off=1 noirqdebug acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000" diff --git a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc index b6b474bd53d6..90aa9ba607ac 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc +++ b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc @@ -1,5 +1,2 @@ -linkscan off -m0 load 0 0x3800 /usr/share/sonic/platform/custom.bin -sleep 10 +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin led auto on; led start -linkscan on diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml new file mode 100644 index 000000000000..95e9b6954714 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml @@ -0,0 +1,153 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1980' + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev + 11)' +- bus: '00' + dev: '04' + fn: '0' + id: 19a1 + name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers + (rev 11)' +- bus: '00' + dev: '05' + fn: '0' + id: 19a2 + name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 + Series Root Complex Event Collector (rev 11)' +- bus: '00' + dev: '06' + fn: '0' + id: 19a3 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT + Root Port (rev 11)' +- bus: '00' + dev: 09 + fn: '0' + id: 19a4 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #0 (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 19aa + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #6 (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 19ab + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root + Port #7 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 19ac + name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller + - Host (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller + 1 (rev 11)' +- bus: '00' + dev: '15' + fn: '0' + id: 19d0 + name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI + Controller (rev 11)' +- bus: '00' + dev: '16' + fn: '0' + id: 19d1 + name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN + Root Port #0 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 19d3 + name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME + HECI 1 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 19d8 + name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller + (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 19db + name: 'SD Host controller: Intel Corporation Device 19db (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 19dc + name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev + 11)' +- bus: '00' + dev: 1f + fn: '2' + id: 19de + name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 19df + name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 19e0 + name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series + SPI Controller (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 19e2 + name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology + (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: b870 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '04' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '05' + dev: '00' + fn: '0' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' +- bus: '05' + dev: '00' + fn: '1' + id: 15c2 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane + (rev 11)' diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform.json b/device/celestica/x86_64-cel_seastone_2-r0/platform.json new file mode 100644 index 000000000000..9d2b5841f179 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform.json @@ -0,0 +1,235 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G": ["Eth1/1"] + } + }, + "Ethernet4": { + "index": "2,2,2,2", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G": ["Eth2/1"] + } + }, + "Ethernet8": { + "index": "3,3,3,3", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G": ["Eth3/1"] + } + }, + "Ethernet12": { + "index": "4,4,4,4", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G": ["Eth4/1"] + } + }, + "Ethernet16": { + "index": "5,5,5,5", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G": ["Eth5/1"] + } + }, + "Ethernet20": { + "index": "6,6,6,6", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G": ["Eth6/1"] + } + }, + "Ethernet24": { + "index": "7,7,7,7", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": ["Eth7/1"] + } + }, + "Ethernet28": { + "index": "8,8,8,8", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": ["Eth8/1"] + } + }, + "Ethernet32": { + "index": "9,9,9,9", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": ["Eth9/1"] + } + }, + "Ethernet36": { + "index": "10,10,10,10", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": ["Eth10/1"] + } + }, + "Ethernet40": { + "index": "11,11,11,11", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": ["Eth11/1"] + } + }, + "Ethernet44": { + "index": "12,12,12,12", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": ["Eth12/1"] + } + }, + "Ethernet48": { + "index": "13,13,13,13", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": ["Eth13/1"] + } + }, + "Ethernet52": { + "index": "14,14,14,14", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": ["Eth14/1"] + } + }, + "Ethernet56": { + "index": "15,15,15,15", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G": ["Eth15/1"] + } + }, + "Ethernet60": { + "index": "16,16,16,16", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G": ["Eth16/1"] + } + }, + "Ethernet64": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G": ["Eth17/1"] + } + }, + "Ethernet68": { + "index": "18,18,18,18", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G": ["Eth18/1"] + } + }, + "Ethernet72": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G": ["Eth19/1"] + } + }, + "Ethernet76": { + "index": "20,20,20,20", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G": ["Eth20/1"] + } + }, + "Ethernet80": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G": ["Eth21/1"] + } + }, + "Ethernet84": { + "index": "22,22,22,22", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G": ["Eth22/1"] + } + }, + "Ethernet88": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G": ["Eth23/1"] + } + }, + "Ethernet92": { + "index": "24,24,24,24", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G": ["Eth24/1"] + } + }, + "Ethernet96": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G": ["Eth25/1"] + } + }, + "Ethernet100": { + "index": "26,26,26,26", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G": ["Eth26/1"] + } + }, + "Ethernet104": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G": ["Eth27/1"] + } + }, + "Ethernet108": { + "index": "28,28,28,28", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G": ["Eth28/1"] + } + }, + "Ethernet112": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G": ["Eth29/1"] + } + }, + "Ethernet116": { + "index": "30,30,30,30", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G": ["Eth30/1"] + } + }, + "Ethernet120": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G": ["Eth31/1"] + } + }, + "Ethernet124": { + "index": "32,32,32,32", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G": ["Eth32/1"] + } + }, + "Ethernet128": { + "index": "33", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth33/1"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json new file mode 100644 index 000000000000..7daf37202c76 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "Seastone_2": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot new file mode 100755 index 000000000000..be80ddbdd1a2 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null + +/usr/local/bin/seastone2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json index 5e59513ef696..f5b2736b13e0 100644 --- a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json +++ b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json @@ -1,7 +1,5 @@ { "skip_ledd": true, - "skip_xcvrd": false, - "skip_psud": false, - "skip_syseepromd": false, - "skip_fancontrol": true -} \ No newline at end of file + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json deleted file mode 100644 index dfa1a1bddff8..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json +++ /dev/null @@ -1,45 +0,0 @@ -{ - "eeprom": "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom", - "get_reboot_cause": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06", - "output_translator": { - "00": "Hardware - Other", - "11": "Hardware - Other", - "22": "Non-Hardware", - "33": "Hardware - Other", - "44": "Non-Hardware", - "55": "Non-Hardware", - "77": "Watchdog", - "88": "Thermal Overload: CPU", - "99": "Thermal Overload: ASIC" - } - }, - "get_reboot_description": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06", - "output_translator": { - "00": "The last reset is power cycle reset (set register 0xA164)", - "11": "The last reset is Power on reset", - "22": "The last reset is soft-set CPU warm reset", - "33": "The last reset is soft-set CPU cold reset", - "44": "The last reset is CPU warm reset", - "55": "The last reset is CPU cold reset", - "77": "The last reset is watchdog reset", - "88": "The last reset is CPU thermal overload", - "99": "The last reset is ASIC thermal overload" - } - }, - "get_watchdog": { - "output_source": "class", - "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py", - "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/watchdog.py", - "class": "Watchdog" - }, - "get_change_event": { - "output_source": "class", - "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py", - "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/event.py", - "class": "SfpEvent" - } -} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json deleted file mode 100644 index 96f646206f97..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json +++ /dev/null @@ -1,62 +0,0 @@ -{ - "component_num": 5, - "get_name": { - "output_source": "value_list", - "value_list": [ - "BIOS", - "CPLD_BASEBOARD", - "CPLD_SWITCHBOARD", - "FPGA", - "BMC" - ] - }, - "get_description": { - "output_source": "value_list", - "value_list": [ - "Used to perform hardware initialization during the booting process", - "Used to control the system power & reset, Control FAN, UART Mux etc", - "Used for managing QSFP ports", - "Used for managing I2C, SPI, PCIe etc", - "Used for monitoring and managing whole system" - ] - }, - "get_firmware_version": { - "output_source": "function", - "function": [ - "_get_bios_ver", - "_get_base_cpld_ver", - "_get_sw_cpld_ver", - "_get_fpga_ver", - "_get_bmc_ver" - ] - }, - "_get_bmc_ver": { - "output_source": "ipmitool", - "command": "ipmitool mc info | grep 'Firmware Revision'", - "output_translator": "'{}'.split(':')[-1].strip()" - }, - "_get_bios_ver": { - "output_source": "txt_file", - "path": "/sys/class/dmi/id/bios_version" - }, - "_get_base_cpld_ver": { - "output_source": "hex_version_file", - "num_of_points": 1, - "num_of_bits": 8, - "path": "/sys/devices/platform/baseboard/version" - }, - "_get_sw_cpld_ver": { - "output_source": "hex_version_getreg", - "num_of_points": 1, - "num_of_bits": 8, - "reg_addr": "0x00", - "path": "/sys/devices/platform/switchboard/CPLD1/getreg" - }, - "_get_fpga_ver": { - "output_source": "hex_version_getreg", - "num_of_points": 1, - "num_of_bits": 32, - "reg_addr": "0x00", - "path": "/sys/devices/platform/switchboard/FPGA/getreg" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py deleted file mode 100644 index 32073479a1e6..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py +++ /dev/null @@ -1,117 +0,0 @@ -############################################################################# -# Celestica Seastone2 -# -# SfpEvent contains an implementation of SONiC Platform Base API -# -############################################################################# -try: - import time - import os - from sonic_platform.common import Common -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - - -PLATFORM_PATH = "/sys/devices/platform/" -SWITCH_BRD_PLATFORM = "switchboard" -POLL_INTERVAL = 1 - - -class SfpEvent: - ''' Listen to insert/remove sfp events ''' - - PORT_INFO_DIR = 'SFF' - PATH_INT_SYSFS = "{0}/{port_name}/{type_prefix}_isr_flags" - PATH_INTMASK_SYSFS = "{0}/{port_name}/{type_prefix}_isr_mask" - PATH_PRS_SYSFS = "{0}/{port_name}/{prs_file_name}" - PRESENT_EN = 0x01 - - def __init__(self, sfp_list): - self.num_sfp = len(sfp_list) - self._api_common = Common() - self._initialize_interrupts() - - def _initialize_interrupts(self): - sfp_info_obj = {} - port_info_path = os.path.join( - PLATFORM_PATH, SWITCH_BRD_PLATFORM, self.PORT_INFO_DIR) - - for index in range(self.num_sfp): - port_num = index + 1 - if port_num <= 32: - port_name = "QSFP{}".format(port_num) - port_type = "qsfp" - sysfs_prs_file = "{}_modprs".format(port_type) - else: - port_name = "SFP{}".format(port_num - 32) - port_type = "sfp" - sysfs_prs_file = "{}_modabs".format(port_type) - - sfp_info_obj[index] = {} - sfp_info_obj[index]['intmask_sysfs'] = self.PATH_INTMASK_SYSFS.format( - port_info_path, - port_name=port_name, - type_prefix=port_type) - - sfp_info_obj[index]['int_sysfs'] = self.PATH_INT_SYSFS.format( - port_info_path, - port_name=port_name, - type_prefix=port_type) - - sfp_info_obj[index]['prs_sysfs'] = self.PATH_PRS_SYSFS.format( - port_info_path, - port_name=port_name, - prs_file_name=sysfs_prs_file) - - self._api_common.write_txt_file( - sfp_info_obj[index]["intmask_sysfs"], hex(self.PRESENT_EN)) - - self.sfp_info_obj = sfp_info_obj - - def _is_port_device_present(self, port_idx): - prs_path = self.sfp_info_obj[port_idx]["prs_sysfs"] - is_present = 1 - int(self._api_common.read_txt_file(prs_path)) - return is_present - - def _update_port_event_object(self, interrup_devices, port_dict): - for port_idx in interrup_devices: - device_id = str(port_idx + 1) - port_dict[device_id] = str(self._is_port_device_present(port_idx)) - return port_dict - - def _clear_event_flag(self, path): - self._api_common.write_txt_file(path, hex(0xff)) - time.sleep(0.1) - self._api_common.write_txt_file(path, hex(0x0)) - - def _check_all_port_interrupt_event(self): - interrupt_devices = {} - for i in range(self.num_sfp): - int_sysfs = self.sfp_info_obj[i]["int_sysfs"] - interrupt_flags = self._api_common.read_txt_file(int_sysfs) - if interrupt_flags != '0x00': - interrupt_devices[i] = 1 - self._clear_event_flag(int_sysfs) - return interrupt_devices - - def get_event(self, timeout): - sleep_time = min( - timeout, POLL_INTERVAL) if timeout != 0 else POLL_INTERVAL - start_milli_time = int(round(time.time() * 1000)) - int_sfp = {} - - while True: - chk_sfp = self._check_all_port_interrupt_event() - int_sfp = self._update_port_event_object( - chk_sfp, int_sfp) if chk_sfp else int_sfp - current_milli_time = int(round(time.time() * 1000)) - if (int_sfp) or \ - (timeout != 0 and current_milli_time - start_milli_time > timeout): - break - - time.sleep(sleep_time) - - change_dict = dict() - change_dict['sfp'] = int_sfp - - return True, change_dict diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json deleted file mode 100644 index 724f6edf53c1..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json +++ /dev/null @@ -1,200 +0,0 @@ -{ - "fan_num_per_drawer": 2, - "drawer_num": 4, - "get_name": { - "output_source": "value_list", - "value_list": [ - "Fan1-F", - "Fan1-R", - "Fan2-F", - "Fan2-R", - "Fan3-F", - "Fan3-R", - "Fan4-F", - "Fan4-R" - ] - }, - "get_presence": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x03 0x03 {}", - "argument": [ - "0x00", - "0x00", - "0x01", - "0x01", - "0x02", - "0x02", - "0x03", - "0x03" - ], - "output_translator": "True if '00' in '{}' else False" - }, - "get_model": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Board Part Number'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_serial": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Board Serial'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_direction": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'F2B\\|B2F'", - "argument": [ - "5", - "5", - "6", - "6", - "7", - "7", - "8", - "8" - ], - "output_translator": "'intake' if 'B2F' in '{}' else 'exhaust'" - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x81", - "0x80", - "0x83", - "0x82", - "0x85", - "0x84", - "0x87", - "0x86" - ], - "output_translator": "int('{}'.split()[0],16)*150", - "max_front": 23000, - "max_rear": 20500 - }, - "get_target_speed": { - "output_source": "value", - "value": "N/A" - }, - "get_speed_tolerance": { - "output_source": "value", - "value": 10 - }, - "set_speed": { - "set_method": "ipmitool", - "input_translator": "hex(int({} * 255 / 100.0))", - "command": "ipmitool raw 0x3a 0x0c 0x00 0x03 {}", - "argument": [ - "0x40 {}", - "0x40 {}", - "0x44 {}", - "0x44 {}", - "0x4c {}", - "0x4c {}", - "0x50 {}", - "0x50 {}" - ] - }, - "set_status_led": { - "set_method": "ipmitool", - "avaliable_input": [ - "off", - "amber", - "green" - ], - "input_translator": { - "off": "0x0", - "amber": "0x1", - "green": "0x2" - }, - "command": "ipmitool raw 0x3a 0x0a {}", - "argument": [ - "0x4 {}", - "0x4 {}", - "0x5 {}", - "0x5 {}", - "0x6 {}", - "0x6 {}", - "0x7 {}", - "0x7 {}" - ] - }, - "get_status_led": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0b {}", - "argument": [ - "0x4", - "0x4", - "0x5", - "0x5", - "0x6", - "0x6", - "0x7", - "0x7" - ], - "output_translator": { - "00": "off", - "01": "amber", - "02": "green" - } - }, - "psu_fan": [ - { - "num_of_fan": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-R-Fan" - ] - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x8b" - ], - "output_translator": "int('{}'.split()[0],16)*100", - "max_front": 22600, - "max_rear": 22600 - } - }, - { - "num_of_fan": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-L-Fan" - ] - }, - "get_speed": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2d {}", - "argument": [ - "0x8a" - ], - "output_translator": "int('{}'.split()[0],16)*100", - "max_front": 22600, - "max_rear": 22600 - } - } - ] -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json deleted file mode 100644 index c3e953c082a7..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json +++ /dev/null @@ -1,135 +0,0 @@ -{ - "psu_num": 2, - "fan_per_psu_num": 1, - "get_name": { - "output_source": "value_list", - "value_list": [ - "PSU-R", - "PSU-L" - ] - }, - "get_power": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_POut", - "PSUL_POut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_current": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_COut", - "PSUL_COut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_voltage": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_VOut", - "PSUL_VOut" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_voltage_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])" - }, - "get_voltage_low_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-9]=='na' else '{0}'.split()[-9])" - }, - "get_presence": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x00 0x2 0x60", - "output_translator": [ - "True if (int('{}', 16) >> 4 & 1) == 0 else False", - "True if (int('{}', 16) >> 5 & 1) == 0 else False" - ] - }, - "get_model": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Product Part Number'", - "argument": [ - "4", - "3" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_serial": { - "output_source": "ipmitool", - "command": "ipmitool fru list {} | grep 'Product Serial'", - "argument": [ - "4", - "3" - ], - "output_translator": "'{}'.split()[-1]" - }, - "get_powergood_status": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x60", - "output_translator": [ - "True if (int('{}', 16) >> 2 & 1) == 1 else False", - "True if (int('{}', 16) >> 3 & 1) == 1 else False" - ] - }, - "set_status_led": { - "set_method": "ipmitool", - "avaliable_input": [ - "amber" - ], - "input_translator": { - "amber": "0x1" - }, - "command": "ipmitool raw 0x3a 0x0a {}", - "argument": [ - "0x3 {}", - "0x2 {}" - ] - }, - "get_status_led": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x3a 0x0b {}", - "argument": [ - "0x3", - "0x2" - ], - "output_translator": { - "00": "green", - "01": "amber" - }, - "default_output": "off" - }, - "get_temperature": { - "output_source": "ipmitool", - "command": "ipmitool sdr | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float('{}'.split()[2])" - }, - "get_temperature_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor list | grep {}", - "argument": [ - "PSUR_Temp2", - "PSUL_Temp2" - ], - "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json deleted file mode 100644 index d12f0c3ffc1b..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json +++ /dev/null @@ -1,143 +0,0 @@ -{ - "port_num": 33, - "eeprom_path": "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom", - "port_i2c_mapping": [ - 2, - 3, - 4, - 5, - 6, - 7, - 8, - 9, - 10, - 11, - 12, - 13, - 14, - 15, - 16, - 17, - 18, - 19, - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27, - 28, - 29, - 30, - 31, - 32, - 33, - 34 - ], - "get_presence": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}", - "argument": "$ref:_presence_file", - "output_translator": "False if '{}' == '1' else True" - }, - "get_lpmode": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode", - "argument": "$ref:_port_name", - "output_translator": "True if '{}' == '1' else False" - }, - "get_reset_status": { - "output_source": "sysfs_value", - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset", - "argument": "$ref:_port_name", - "output_translator": "False if '{}' == '1' else True" - }, - "reset": { - "set_method": "sysfs_value", - "write_offset": 0, - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset", - "argument": "$ref:_port_name" - }, - "set_lpmode": { - "set_method": "sysfs_value", - "input_translator": { - "True": "0x1", - "False": "0x0" - }, - "write_offset": 0, - "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode", - "argument": "$ref:_port_name" - }, - "_port_name": [ - "QSFP1", - "QSFP2", - "QSFP3", - "QSFP4", - "QSFP5", - "QSFP6", - "QSFP7", - "QSFP8", - "QSFP9", - "QSFP10", - "QSFP11", - "QSFP12", - "QSFP13", - "QSFP14", - "QSFP15", - "QSFP16", - "QSFP17", - "QSFP18", - "QSFP19", - "QSFP20", - "QSFP21", - "QSFP22", - "QSFP23", - "QSFP24", - "QSFP25", - "QSFP26", - "QSFP27", - "QSFP28", - "QSFP29", - "QSFP30", - "QSFP31", - "QSFP32", - "SFP1" - ], - "_presence_file": [ - "QSFP1/qsfp_modprs", - "QSFP2/qsfp_modprs", - "QSFP3/qsfp_modprs", - "QSFP4/qsfp_modprs", - "QSFP5/qsfp_modprs", - "QSFP6/qsfp_modprs", - "QSFP7/qsfp_modprs", - "QSFP8/qsfp_modprs", - "QSFP9/qsfp_modprs", - "QSFP10/qsfp_modprs", - "QSFP11/qsfp_modprs", - "QSFP12/qsfp_modprs", - "QSFP13/qsfp_modprs", - "QSFP14/qsfp_modprs", - "QSFP15/qsfp_modprs", - "QSFP16/qsfp_modprs", - "QSFP17/qsfp_modprs", - "QSFP18/qsfp_modprs", - "QSFP19/qsfp_modprs", - "QSFP20/qsfp_modprs", - "QSFP21/qsfp_modprs", - "QSFP22/qsfp_modprs", - "QSFP23/qsfp_modprs", - "QSFP24/qsfp_modprs", - "QSFP25/qsfp_modprs", - "QSFP26/qsfp_modprs", - "QSFP27/qsfp_modprs", - "QSFP28/qsfp_modprs", - "QSFP29/qsfp_modprs", - "QSFP30/qsfp_modprs", - "QSFP31/qsfp_modprs", - "QSFP32/qsfp_modprs", - "SFP1/sfp_modabs" - ] -} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json deleted file mode 100644 index e3dcb7fb9271..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json +++ /dev/null @@ -1,105 +0,0 @@ -{ - "thermal_num": 9, - "get_name": { - "output_source": "value_list", - "value_list": [ - "Base_Temp_U5", - "Base_Temp_U7", - "CPU_Temp", - "Switch_Temp_U1", - "Switch_Temp_U18", - "Switch_Temp_U28", - "Switch_Temp_U29", - "Switch_U21_Temp", - "Switch_U33_Temp" - ] - }, - "get_temperature": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x2D {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4C" - ], - "output_translator": "int('{}'.split()[0],16)" - }, - "get_high_threshold": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x27 {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4c" - ], - "output_translator": "int('{}'.split()[4], 16)" - }, - "get_low_threshold": { - "output_source": "value", - "value": "N/A" - }, - "set_high_threshold": { - "set_method": "ipmitool", - "command": "ipmitool sensor thresh {}", - "input_translator": "{}", - "argument": [ - "Base_Temp_U5 unc {}", - "Base_Temp_U7 unc {}", - "CPU_Temp unc {}", - "Switch_Temp_U1 unc {}", - "Switch_Temp_U18 unc {}", - "Switch_Temp_U28 unc {}", - "Switch_Temp_U29 unc {}", - "Switch_U21_Temp unc {}", - "Switch_U33_Temp unc {}" - ] - }, - "set_low_threshold": { - "output_source": "ipmitool", - "command": "ipmitool sensor thresh {}", - "input_translator": "{}", - "argument": [ - "Base_Temp_U5 lnc {}", - "Base_Temp_U7 lnc {}", - "CPU_Temp lnc {}", - "Switch_Temp_U1 lnc {}", - "Switch_Temp_U18 lnc {}", - "Switch_Temp_U28 lnc {}", - "Switch_Temp_U29 lnc {}", - "Switch_U21_Temp lnc {}", - "Switch_U33_Temp lnc {}" - ] - }, - "get_high_critical_threshold": { - "output_source": "ipmitool", - "command": "ipmitool raw 0x04 0x27 {}", - "argument": [ - "0x1", - "0x2", - "0x7", - "0x3", - "0x4", - "0x5", - "0x6", - "0x56", - "0x4c" - ], - "output_translator": "int('{}'.split()[5], 16)" - }, - "get_low_critical_threshold": { - "output_source": "value", - "value": "N/A" - } -} \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py deleted file mode 100644 index fac5c40e134f..000000000000 --- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py +++ /dev/null @@ -1,191 +0,0 @@ -############################################################################# -# Celestica Seastone2 -# -# Watchdog contains an implementation of SONiC Platform Base API -# -############################################################################# -import os -import time - -try: - from sonic_platform_base.watchdog_base import WatchdogBase - from sonic_platform.common import Common -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/' -GETREG_FILE = 'getreg' -SETREG_FILE = 'setreg' -WDT_ENABLE_REG = '0xA181' -WDT_TIMER_L_BIT_REG = '0xA182' -WDT_TIMER_M_BIT_REG = '0xA183' -WDT_TIMER_H_BIT_REG = '0xA184' -WDT_KEEP_ALVIVE_REG = '0xA185' -ENABLE_CMD = '0x1' -DISABLE_CMD = '0x0' -WDT_COMMON_ERROR = -1 - - -class Watchdog(WatchdogBase): - - def __init__(self): - WatchdogBase.__init__(self) - - self._api_common = Common() - - # Init cpld reg path - self.setreg_path = os.path.join(PLATFORM_CPLD_PATH, SETREG_FILE) - self.getreg_path = os.path.join(PLATFORM_CPLD_PATH, GETREG_FILE) - - # Set default value - self._disable() - self.armed = False - self.timeout = self._gettimeout() - - def _enable(self): - """ - Turn on the watchdog timer - """ - # echo 0xA181 0x1 > /sys/devices/platform/baseboard/setreg - enable_val = '{} {}'.format(WDT_ENABLE_REG, ENABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, enable_val) - - def _disable(self): - """ - Turn off the watchdog timer - """ - # echo 0xA181 0x0 > /sys/devices/platform/baseboard/setreg - disable_val = '{} {}'.format(WDT_ENABLE_REG, DISABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, disable_val) - - def _keepalive(self): - """ - Keep alive watchdog timer - """ - # echo 0xA185 0x1 > /sys/devices/platform/baseboard/setreg - enable_val = '{} {}'.format(WDT_KEEP_ALVIVE_REG, ENABLE_CMD) - return self._api_common.write_txt_file(self.setreg_path, enable_val) - - def _get_level_hex(self, sub_hex): - sub_hex_str = sub_hex.replace("x", "0") - return hex(int(sub_hex_str, 16)) - - def _seconds_to_lmh_hex(self, seconds): - ms = seconds*1000 # calculate timeout in ms format - hex_str = hex(ms) - l = self._get_level_hex(hex_str[-2:]) - m = self._get_level_hex(hex_str[-4:-2]) - h = self._get_level_hex(hex_str[-6:-4]) - return (l, m, h) - - def _settimeout(self, seconds): - """ - Set watchdog timer timeout - @param seconds - timeout in seconds - @return is the actual set timeout - """ - # max = 0xffffff = 16777.215 seconds - - (l, m, h) = self._seconds_to_lmh_hex(seconds) - set_h_val = '{} {}'.format(WDT_TIMER_H_BIT_REG, h) - set_m_val = '{} {}'.format(WDT_TIMER_M_BIT_REG, m) - set_l_val = '{} {}'.format(WDT_TIMER_L_BIT_REG, l) - - self._api_common.write_txt_file( - self.setreg_path, set_h_val) # set high bit - self._api_common.write_txt_file( - self.setreg_path, set_m_val) # set med bit - self._api_common.write_txt_file( - self.setreg_path, set_l_val) # set low bit - - return seconds - - def _gettimeout(self): - """ - Get watchdog timeout - @return watchdog timeout - """ - - h_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_H_BIT_REG) - m_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_M_BIT_REG) - l_bit = self._api_common.get_reg( - self.getreg_path, WDT_TIMER_L_BIT_REG) - - hex_time = '0x{}{}{}'.format(h_bit[2:], m_bit[2:], l_bit[2:]) - ms = int(hex_time, 16) - return int(float(ms)/1000) - - ################################################################# - - def arm(self, seconds): - """ - Arm the hardware watchdog with a timeout of seconds. - If the watchdog is currently armed, calling this function will - simply reset the timer to the provided value. If the underlying - hardware does not support the value provided in , this - method should arm the watchdog with the *next greater* available - value. - Returns: - An integer specifying the *actual* number of seconds the watchdog - was armed with. On failure returns -1. - """ - - ret = WDT_COMMON_ERROR - if seconds < 0: - return ret - - try: - if self.timeout != seconds: - self.timeout = self._settimeout(seconds) - - if self.armed: - self._keepalive() - else: - self._enable() - self.armed = True - - ret = self.timeout - self.arm_timestamp = time.time() - except IOError as e: - pass - - return ret - - def disarm(self): - """ - Disarm the hardware watchdog - Returns: - A boolean, True if watchdog is disarmed successfully, False if not - """ - disarmed = False - if self.is_armed(): - try: - self._disable() - self.armed = False - disarmed = True - except IOError: - pass - - return disarmed - - def is_armed(self): - """ - Retrieves the armed state of the hardware watchdog. - Returns: - A boolean, True if watchdog is armed, False if not - """ - - return self.armed - - def get_remaining_time(self): - """ - If the watchdog is armed, retrieve the number of seconds remaining on - the watchdog timer - Returns: - An integer specifying the number of seconds remaining on thei - watchdog timer. If the watchdog is not armed, returns -1. - """ - - return int(self.timeout - (time.time() - self.arm_timestamp)) if self.armed else WDT_COMMON_ERROR diff --git a/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin new file mode 100755 index 000000000000..d0fb8b29e191 --- /dev/null +++ b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm index 447de2e85b5a..baddedd9c61b 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm @@ -9,8 +9,6 @@ phy_enable=0 phy_null=1 pll_bypass=1 -init_all_modules=0 - sai_tunnel_global_sip_mask_enable=1 portmap_20=33:100:2 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json new file mode 100644 index 000000000000..b97d516509ec --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json @@ -0,0 +1,164 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini index 9cd85ee34798..1d2b56d9fed9 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini @@ -1,33 +1,33 @@ # name lanes alias index speed -Ethernet0 33,34,35,36,37,38,39,40 QSFPDD1 1 400000 -Ethernet4 41,42,43,44,45,46,47,48 QSFPDD2 2 400000 -Ethernet8 49,50,51,52,53,54,55,56 QSFPDD3 3 400000 -Ethernet12 57,58,59,60,61,62,63,64 QSFPDD4 4 400000 -Ethernet16 65,66,67,68,69,70,71,72 QSFPDD5 5 400000 -Ethernet20 73,74,75,76,77,78,79,80 QSFPDD6 6 400000 -Ethernet24 81,82,83,84,85,86,87,88 QSFPDD7 7 400000 -Ethernet28 89,90,91,92,93,94,95,96 QSFPDD8 8 400000 -Ethernet32 1,2,3,4,5,6,7,8 QSFPDD9 9 400000 -Ethernet36 9,10,11,12,13,14,15,16 QSFPDD10 10 400000 -Ethernet40 17,18,19,20,21,22,23,24 QSFPDD11 11 400000 -Ethernet44 25,26,27,28,29,30,31,32 QSFPDD12 12 400000 -Ethernet48 97,98,99,100,101,102,103,104 QSFPDD13 13 400000 -Ethernet52 105,106,107,108,109,110,111,112 QSFPDD14 14 400000 -Ethernet56 113,114,115,116,117,118,119,120 QSFPDD15 15 400000 -Ethernet60 121,122,123,124,125,126,127,128 QSFPDD16 16 400000 -Ethernet64 129,130,131,132,133,134,135,136 QSFPDD17 17 400000 -Ethernet68 137,138,139,140,141,142,143,144 QSFPDD18 18 400000 -Ethernet72 145,146,147,148,149,150,151,152 QSFPDD19 19 400000 -Ethernet76 153,154,155,156,157,158,159,160 QSFPDD20 20 400000 -Ethernet80 225,226,227,228,229,230,231,232 QSFPDD21 21 400000 -Ethernet84 233,234,235,236,237,238,239,240 QSFPDD22 22 400000 -Ethernet88 241,242,243,244,245,246,247,248 QSFPDD23 23 400000 -Ethernet92 249,250,251,252,253,254,255,256 QSFPDD24 24 400000 -Ethernet96 161,162,163,164,165,166,167,168 QSFPDD25 25 400000 -Ethernet100 169,170,171,172,173,174,175,176 QSFPDD26 26 400000 -Ethernet104 177,178,179,180,181,182,183,184 QSFPDD27 27 400000 -Ethernet108 185,186,187,188,189,190,191,192 QSFPDD28 28 400000 -Ethernet112 193,194,195,196,197,198,199,200 QSFPDD29 29 400000 -Ethernet116 201,202,203,204,205,206,207,208 QSFPDD30 30 400000 -Ethernet120 209,210,211,212,213,214,215,216 QSFPDD31 31 400000 -Ethernet124 217,218,219,220,221,222,223,224 QSFPDD32 32 400000 \ No newline at end of file +Ethernet0 33,34,35,36,37,38,39,40 Eth1/1 1 400000 +Ethernet8 41,42,43,44,45,46,47,48 Eth2/1 2 400000 +Ethernet16 49,50,51,52,53,54,55,56 Eth3/1 3 400000 +Ethernet24 57,58,59,60,61,62,63,64 Eth4/1 4 400000 +Ethernet32 65,66,67,68,69,70,71,72 Eth5/1 5 400000 +Ethernet40 73,74,75,76,77,78,79,80 Eth6/1 6 400000 +Ethernet48 81,82,83,84,85,86,87,88 Eth7/1 7 400000 +Ethernet56 89,90,91,92,93,94,95,96 Eth8/1 8 400000 +Ethernet64 1,2,3,4,5,6,7,8 Eth9/1 9 400000 +Ethernet72 9,10,11,12,13,14,15,16 Eth10/1 10 400000 +Ethernet80 17,18,19,20,21,22,23,24 Eth11/1 11 400000 +Ethernet88 25,26,27,28,29,30,31,32 Eth12/1 12 400000 +Ethernet96 97,98,99,100,101,102,103,104 Eth13/1 13 400000 +Ethernet104 105,106,107,108,109,110,111,112 Eth14/1 14 400000 +Ethernet112 113,114,115,116,117,118,119,120 Eth15/1 15 400000 +Ethernet120 121,122,123,124,125,126,127,128 Eth16/1 16 400000 +Ethernet128 129,130,131,132,133,134,135,136 Eth17/1 17 400000 +Ethernet136 137,138,139,140,141,142,143,144 Eth18/1 18 400000 +Ethernet144 145,146,147,148,149,150,151,152 Eth19/1 19 400000 +Ethernet152 153,154,155,156,157,158,159,160 Eth20/1 20 400000 +Ethernet160 225,226,227,228,229,230,231,232 Eth21/1 21 400000 +Ethernet168 233,234,235,236,237,238,239,240 Eth22/1 22 400000 +Ethernet176 241,242,243,244,245,246,247,248 Eth23/1 23 400000 +Ethernet184 249,250,251,252,253,254,255,256 Eth24/1 24 400000 +Ethernet192 161,162,163,164,165,166,167,168 Eth25/1 25 400000 +Ethernet200 169,170,171,172,173,174,175,176 Eth26/1 26 400000 +Ethernet208 177,178,179,180,181,182,183,184 Eth27/1 27 400000 +Ethernet216 185,186,187,188,189,190,191,192 Eth28/1 28 400000 +Ethernet224 193,194,195,196,197,198,199,200 Eth29/1 29 400000 +Ethernet232 201,202,203,204,205,206,207,208 Eth30/1 30 400000 +Ethernet240 209,210,211,212,213,214,215,216 Eth31/1 31 400000 +Ethernet248 217,218,219,220,221,222,223,224 Eth32/1 32 400000 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm index 400fbdcf7573..3d4cebc5269f 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm +++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm @@ -1,5 +1,5 @@ -pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222 +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff8ffff ccm_dma_enable=0 ccmdma_intr_enable=0 ctr_evict_enable=0 @@ -10,8 +10,6 @@ phy_enable=0 phy_null=1 pll_bypass=1 -init_all_modules=0 - sai_tunnel_global_sip_mask_enable=1 @@ -183,38 +181,38 @@ serdes_core_tx_polarity_flip_physical{209}=0xe9 serdes_core_rx_polarity_flip_physical{217}=0xec serdes_core_tx_polarity_flip_physical{217}=0x68 -dport_map_port_20=1 -dport_map_port_24=2 -dport_map_port_28=3 -dport_map_port_32=4 -dport_map_port_40=5 -dport_map_port_44=6 -dport_map_port_48=7 -dport_map_port_52=8 -dport_map_port_1=9 -dport_map_port_5=10 -dport_map_port_9=11 -dport_map_port_13=12 -dport_map_port_60=13 -dport_map_port_64=14 -dport_map_port_68=15 -dport_map_port_72=16 -dport_map_port_80=17 -dport_map_port_84=18 -dport_map_port_88=19 -dport_map_port_92=20 -dport_map_port_140=21 -dport_map_port_144=22 -dport_map_port_148=23 -dport_map_port_152=24 -dport_map_port_100=25 -dport_map_port_104=26 -dport_map_port_108=27 -dport_map_port_112=28 -dport_map_port_120=29 -dport_map_port_124=30 -dport_map_port_128=31 -dport_map_port_132=32 +#dport_map_port_20=1 +#dport_map_port_24=2 +#dport_map_port_28=3 +#dport_map_port_32=4 +#dport_map_port_40=5 +#dport_map_port_44=6 +#dport_map_port_48=7 +#dport_map_port_52=8 +#dport_map_port_1=9 +#dport_map_port_5=10 +#dport_map_port_9=11 +#dport_map_port_13=12 +#dport_map_port_60=13 +#dport_map_port_64=14 +#dport_map_port_68=15 +#dport_map_port_72=16 +#dport_map_port_80=17 +#dport_map_port_84=18 +#dport_map_port_88=19 +#dport_map_port_92=20 +#dport_map_port_140=21 +#dport_map_port_144=22 +#dport_map_port_148=23 +#dport_map_port_152=24 +#dport_map_port_100=25 +#dport_map_port_104=26 +#dport_map_port_108=27 +#dport_map_port_112=28 +#dport_map_port_120=29 +#dport_map_port_124=30 +#dport_map_port_128=31 +#dport_map_port_132=32 #dport_map_port_38=33 #dport_map_port_118=34 @@ -229,4 +227,4 @@ port_flex_enable=1 #firmware load method, use fast load load_firmware=0x2 - +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml new file mode 100644 index 000000000000..2249ead1a849 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml @@ -0,0 +1,434 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 6f00 + name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2 + (rev 03)' +- bus: '00' + dev: '01' + fn: '0' + id: 6f02 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 1 (rev 03)' +- bus: '00' + dev: '02' + fn: '0' + id: 6f04 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '02' + fn: '2' + id: 6f06 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 2 (rev 03)' +- bus: '00' + dev: '03' + fn: '0' + id: 6f08 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '1' + id: 6f09 + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '2' + id: 6f0a + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '03' + fn: '3' + id: 6f0b + name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI + Express Root Port 3 (rev 03)' +- bus: '00' + dev: '05' + fn: '0' + id: 6f28 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Map/VTd_Misc/System Management (rev 03)' +- bus: '00' + dev: '05' + fn: '1' + id: 6f29 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO Hot Plug (rev 03)' +- bus: '00' + dev: '05' + fn: '2' + id: 6f2a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D IIO RAS/Control Status/Global Errors (rev 03)' +- bus: '00' + dev: '05' + fn: '4' + id: 6f2c + name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev + 03)' +- bus: '00' + dev: 1c + fn: '0' + id: 8c10 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #1 (rev d5)' +- bus: '00' + dev: 1c + fn: '1' + id: 8c12 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #2 (rev d5)' +- bus: '00' + dev: 1c + fn: '2' + id: 8c14 + name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express + Root Port #3 (rev d5)' +- bus: '00' + dev: 1d + fn: '0' + id: 8c26 + name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB + EHCI #1 (rev 05)' +- bus: '00' + dev: 1f + fn: '0' + id: 8c54 + name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard + SKU LPC Controller (rev 05)' +- bus: '00' + dev: 1f + fn: '2' + id: 8c02 + name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port + SATA Controller 1 [AHCI mode] (rev 05)' +- bus: '00' + dev: 1f + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller + (rev 05)' +- bus: '02' + dev: '00' + fn: '0' + id: 6f50 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 0' +- bus: '02' + dev: '00' + fn: '1' + id: 6f51 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 1' +- bus: '02' + dev: '00' + fn: '2' + id: 6f52 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 2' +- bus: '02' + dev: '00' + fn: '3' + id: 6f53 + name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology + Register DMA Channel 3' +- bus: '03' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '03' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' +- bus: '05' + dev: '00' + fn: '0' + id: b980 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)' +- bus: 09 + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: 0a + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 0b + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: ff + dev: 0b + fn: '0' + id: 6f81 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '1' + id: 6f36 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '2' + id: 6f37 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link 0/1 (rev 03)' +- bus: ff + dev: 0b + fn: '3' + id: 6f76 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R3 QPI Link Debug (rev 03)' +- bus: ff + dev: 0c + fn: '0' + id: 6fe0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0c + fn: '1' + id: 6fe1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '0' + id: 6ff8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '4' + id: 6ffc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '5' + id: 6ffd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: 0f + fn: '6' + id: 6ffe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Caching Agent (rev 03)' +- bus: ff + dev: '10' + fn: '0' + id: 6f1d + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '1' + id: 6f34 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D R2PCIe Agent (rev 03)' +- bus: ff + dev: '10' + fn: '5' + id: 6f1e + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '6' + id: 6f7d + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '10' + fn: '7' + id: 6f1f + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Ubox (rev 03)' +- bus: ff + dev: '12' + fn: '0' + id: 6fa0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '12' + fn: '1' + id: 6f30 + name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Home Agent 0 (rev 03)' +- bus: ff + dev: '13' + fn: '0' + id: 6fa8 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '1' + id: 6f71 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)' +- bus: ff + dev: '13' + fn: '2' + id: 6faa + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '3' + id: 6fab + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '4' + id: 6fac + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '5' + id: 6fad + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel Target Address Decoder (rev 03)' +- bus: ff + dev: '13' + fn: '6' + id: 6fae + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Broadcast (rev 03)' +- bus: ff + dev: '13' + fn: '7' + id: 6faf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Global Broadcast (rev 03)' +- bus: ff + dev: '14' + fn: '0' + id: 6fb0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '1' + id: 6fb1 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Thermal Control (rev 03)' +- bus: ff + dev: '14' + fn: '2' + id: 6fb2 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 0 Error (rev 03)' +- bus: ff + dev: '14' + fn: '3' + id: 6fb3 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 1 Error (rev 03)' +- bus: ff + dev: '14' + fn: '4' + id: 6fbc + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '5' + id: 6fbd + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '6' + id: 6fbe + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '14' + fn: '7' + id: 6fbf + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D DDRIO Channel 0/1 Interface (rev 03)' +- bus: ff + dev: '15' + fn: '0' + id: 6fb4 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '1' + id: 6fb5 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Thermal Control (rev 03)' +- bus: ff + dev: '15' + fn: '2' + id: 6fb6 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 2 Error (rev 03)' +- bus: ff + dev: '15' + fn: '3' + id: 6fb7 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Memory Controller 0 - Channel 3 Error (rev 03)' +- bus: ff + dev: 1e + fn: '0' + id: 6f98 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '1' + id: 6f99 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '2' + id: 6f9a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '3' + id: 6fc0 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1e + fn: '4' + id: 6f9c + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '0' + id: 6f88 + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' +- bus: ff + dev: 1f + fn: '2' + id: 6f8a + name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon + D Power Control Unit (rev 03)' diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform.json b/device/celestica/x86_64-cel_silverstone-r0/platform.json new file mode 100644 index 000000000000..6dc768bd4622 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform.json @@ -0,0 +1,484 @@ +{ + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth1/1"], + "2x100G": ["Eth1/1", "Eth1/5"], + "2x40G": ["Eth1/1", "Eth1/5"], + "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"], + "1x100G(2)": ["Eth1/1"], + "1x100G(4)": ["Eth1/1"], + "1x40G(4)": ["Eth1/1"], + "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"], + "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth2/1"], + "2x100G": ["Eth2/1", "Eth2/5"], + "2x40G": ["Eth2/1", "Eth2/5"], + "4x100G": ["Eth2/1", "Eth2/3", "Eth2/5", "Eth2/7"], + "1x100G(2)": ["Eth2/1"], + "1x100G(4)": ["Eth2/1"], + "1x40G(4)": ["Eth2/1"], + "4x25G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"], + "4x10G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"] + } + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth3/1"], + "2x100G": ["Eth3/1", "Eth3/5"], + "2x40G": ["Eth3/1", "Eth3/5"], + "4x100G": ["Eth3/1", "Eth3/3", "Eth3/5", "Eth3/7"], + "1x100G(2)": ["Eth3/1"], + "1x100G(4)": ["Eth3/1"], + "1x40G(4)": ["Eth3/1"], + "4x25G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"], + "4x10G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"] + } + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth4/1"], + "2x100G": ["Eth4/1", "Eth4/5"], + "2x40G": ["Eth4/1", "Eth4/5"], + "4x100G": ["Eth4/1", "Eth4/3", "Eth4/5", "Eth4/7"], + "1x100G(2)": ["Eth4/1"], + "1x100G(4)": ["Eth4/1"], + "1x40G(4)": ["Eth4/1"], + "4x25G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"], + "4x10G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"] + } + }, + "Ethernet32": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth5/1"], + "2x100G": ["Eth5/1", "Eth5/5"], + "2x40G": ["Eth5/1", "Eth5/5"], + "4x100G": ["Eth5/1", "Eth5/3", "Eth5/5", "Eth5/7"], + "1x100G(2)": ["Eth5/1"], + "1x100G(4)": ["Eth5/1"], + "1x40G(4)": ["Eth5/1"], + "4x25G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"], + "4x10G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"] + } + }, + "Ethernet40": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth6/1"], + "2x100G": ["Eth6/1", "Eth6/5"], + "2x40G": ["Eth6/1", "Eth6/5"], + "4x100G": ["Eth6/1", "Eth6/3", "Eth6/5", "Eth6/7"], + "1x100G(2)": ["Eth6/1"], + "1x100G(4)": ["Eth6/1"], + "1x40G(4)": ["Eth6/1"], + "4x25G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"], + "4x10G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"] + } + }, + "Ethernet48": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth7/1"], + "2x100G": ["Eth7/1", "Eth7/5"], + "2x40G": ["Eth7/1", "Eth7/5"], + "4x100G": ["Eth7/1", "Eth7/3", "Eth7/5", "Eth7/7"], + "1x100G(2)": ["Eth7/1"], + "1x100G(4)": ["Eth7/1"], + "1x40G(4)": ["Eth7/1"], + "4x25G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"], + "4x10G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"] + } + }, + "Ethernet56": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth8/1"], + "2x100G": ["Eth8/1", "Eth8/5"], + "2x40G": ["Eth8/1", "Eth8/5"], + "4x100G": ["Eth8/1", "Eth8/3", "Eth8/5", "Eth8/7"], + "1x100G(2)": ["Eth8/1"], + "1x100G(4)": ["Eth8/1"], + "1x40G(4)": ["Eth8/1"], + "4x25G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"], + "4x10G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"] + } + }, + "Ethernet64": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth9/1"], + "2x100G": ["Eth9/1", "Eth9/5"], + "2x40G": ["Eth9/1", "Eth9/5"], + "4x100G": ["Eth9/1", "Eth9/3", "Eth9/5", "Eth9/7"], + "1x100G(2)": ["Eth9/1"], + "1x100G(4)": ["Eth9/1"], + "1x40G(4)": ["Eth9/1"], + "4x25G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"], + "4x10G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"] + } + }, + "Ethernet72": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth10/1"], + "2x100G": ["Eth10/1", "Eth10/5"], + "2x40G": ["Eth10/1", "Eth10/5"], + "4x100G": ["Eth10/1", "Eth10/3", "Eth10/5", "Eth10/7"], + "1x100G(2)": ["Eth10/1"], + "1x100G(4)": ["Eth10/1"], + "1x40G(4)": ["Eth10/1"], + "4x25G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"], + "4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth11/1"], + "2x100G": ["Eth11/1", "Eth11/5"], + "2x40G": ["Eth11/1", "Eth11/5"], + "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"], + "1x100G(2)": ["Eth11/1"], + "1x100G(4)": ["Eth11/1"], + "1x40G(4)": ["Eth11/1"], + "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"], + "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth12/1"], + "2x100G": ["Eth12/1", "Eth12/5"], + "2x40G": ["Eth12/1", "Eth12/5"], + "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"], + "1x100G(2)": ["Eth12/1"], + "1x100G(4)": ["Eth12/1"], + "1x40G(4)": ["Eth12/1"], + "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"], + "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth13/1"], + "2x100G": ["Eth13/1", "Eth13/5"], + "2x40G": ["Eth13/1", "Eth13/5"], + "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"], + "1x100G(2)": ["Eth13/1"], + "1x100G(4)": ["Eth13/1"], + "1x40G(4)": ["Eth13/1"], + "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"], + "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth14/1"], + "2x100G": ["Eth14/1", "Eth14/5"], + "2x40G": ["Eth14/1", "Eth14/5"], + "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"], + "1x100G(2)": ["Eth14/1"], + "1x100G(4)": ["Eth14/1"], + "1x40G(4)": ["Eth14/1"], + "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"], + "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth15/1"], + "2x100G": ["Eth15/1", "Eth15/5"], + "2x40G": ["Eth15/1", "Eth15/5"], + "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"], + "1x100G(2)": ["Eth15/1"], + "1x100G(4)": ["Eth15/1"], + "1x40G(4)": ["Eth15/1"], + "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"], + "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth16/1"], + "2x100G": ["Eth16/1", "Eth16/5"], + "2x40G": ["Eth16/1", "Eth16/5"], + "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"], + "1x100G(2)": ["Eth16/1"], + "1x100G(4)": ["Eth16/1"], + "1x40G(4)": ["Eth16/1"], + "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"], + "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth17/1"], + "2x100G": ["Eth17/1", "Eth17/5"], + "2x40G": ["Eth17/1", "Eth17/5"], + "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"], + "1x100G(2)": ["Eth17/1"], + "1x100G(4)": ["Eth17/1"], + "1x40G(4)": ["Eth17/1"], + "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"], + "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth18/1"], + "2x100G": ["Eth18/1", "Eth18/5"], + "2x40G": ["Eth18/1", "Eth18/5"], + "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"], + "1x100G(2)": ["Eth18/1"], + "1x100G(4)": ["Eth18/1"], + "1x40G(4)": ["Eth18/1"], + "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"], + "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth19/1"], + "2x100G": ["Eth19/1", "Eth19/5"], + "2x40G": ["Eth19/1", "Eth19/5"], + "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"], + "1x100G(2)": ["Eth19/1"], + "1x100G(4)": ["Eth19/1"], + "1x40G(4)": ["Eth19/1"], + "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"], + "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth20/1"], + "2x100G": ["Eth20/1", "Eth20/5"], + "2x40G": ["Eth20/1", "Eth20/5"], + "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"], + "1x100G(2)": ["Eth20/1"], + "1x100G(4)": ["Eth20/1"], + "1x40G(4)": ["Eth20/1"], + "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"], + "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth21/1"], + "2x100G": ["Eth21/1", "Eth21/5"], + "2x40G": ["Eth21/1", "Eth21/5"], + "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"], + "1x100G(2)": ["Eth21/1"], + "1x100G(4)": ["Eth21/1"], + "1x40G(4)": ["Eth21/1"], + "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"], + "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth22/1"], + "2x100G": ["Eth22/1", "Eth22/5"], + "2x40G": ["Eth22/1", "Eth22/5"], + "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"], + "1x100G(2)": ["Eth22/1"], + "1x100G(4)": ["Eth22/1"], + "1x40G(4)": ["Eth22/1"], + "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"], + "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth23/1"], + "2x100G": ["Eth23/1", "Eth23/5"], + "2x40G": ["Eth23/1", "Eth23/5"], + "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"], + "1x100G(2)": ["Eth23/1"], + "1x100G(4)": ["Eth23/1"], + "1x40G(4)": ["Eth23/1"], + "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"], + "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth24/1"], + "2x100G": ["Eth24/1", "Eth24/5"], + "2x40G": ["Eth24/1", "Eth24/5"], + "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"], + "1x100G(2)": ["Eth24/1"], + "1x100G(4)": ["Eth24/1"], + "1x40G(4)": ["Eth24/1"], + "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"], + "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth25/1"], + "2x100G": ["Eth25/1", "Eth25/5"], + "2x40G": ["Eth25/1", "Eth25/5"], + "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"], + "1x100G(2)": ["Eth25/1"], + "1x100G(4)": ["Eth25/1"], + "1x40G(4)": ["Eth25/1"], + "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"], + "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth26/1"], + "2x100G": ["Eth26/1", "Eth26/5"], + "2x40G": ["Eth26/1", "Eth26/5"], + "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"], + "1x100G(2)": ["Eth26/1"], + "1x100G(4)": ["Eth26/1"], + "1x40G(4)": ["Eth26/1"], + "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"], + "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth27/1"], + "2x100G": ["Eth27/1", "Eth27/5"], + "2x40G": ["Eth27/1", "Eth27/5"], + "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"], + "1x100G(2)": ["Eth27/1"], + "1x100G(4)": ["Eth27/1"], + "1x40G(4)": ["Eth27/1"], + "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"], + "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth28/1"], + "2x100G": ["Eth28/1", "Eth28/5"], + "2x40G": ["Eth28/1", "Eth28/5"], + "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"], + "1x100G(2)": ["Eth28/1"], + "1x100G(4)": ["Eth28/1"], + "1x40G(4)": ["Eth28/1"], + "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"], + "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth29/1"], + "2x100G": ["Eth29/1", "Eth29/5"], + "2x40G": ["Eth29/1", "Eth29/5"], + "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"], + "1x100G(2)": ["Eth29/1"], + "1x100G(4)": ["Eth29/1"], + "1x40G(4)": ["Eth29/1"], + "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"], + "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth30/1"], + "2x100G": ["Eth30/1", "Eth30/5"], + "2x40G": ["Eth30/1", "Eth30/5"], + "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"], + "1x100G(2)": ["Eth30/1"], + "1x100G(4)": ["Eth30/1"], + "1x40G(4)": ["Eth30/1"], + "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"], + "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth31/1"], + "2x100G": ["Eth31/1", "Eth31/5"], + "2x40G": ["Eth31/1", "Eth31/5"], + "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"], + "1x100G(2)": ["Eth31/1"], + "1x100G(4)": ["Eth31/1"], + "1x40G(4)": ["Eth31/1"], + "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"], + "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth32/1"], + "2x100G": ["Eth32/1", "Eth32/5"], + "2x40G": ["Eth32/1", "Eth32/5"], + "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"], + "1x100G(2)": ["Eth32/1"], + "1x100G(4)": ["Eth32/1"], + "1x40G(4)": ["Eth32/1"], + "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"], + "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"] + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_components.json b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json new file mode 100644 index 000000000000..9713fd620c27 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "Silverstone": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot new file mode 100755 index 000000000000..0c84c4d7f536 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot @@ -0,0 +1,6 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null + +/usr/local/bin/silverstone_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py index 46684aae0f22..ea2f8cfca969 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py +++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py @@ -1,6 +1,7 @@ import subprocess import sys import re +import os try: from sonic_psu.psu_base import PsuBase @@ -11,8 +12,19 @@ class PsuUtil(PsuBase): """Platform-specific PSUutil class""" + __IPMI_BASE_COMMAND = ["ipmitool", "raw", "0x04", "0x2d"] + __IPMI_CONTAINER_PREFIX = ["docker", "exec", "-ti", "pmon"] + + def __container_prefix(self, cmdlist): + # If running inside container, nothing to prefix. Else, prefix container + # invocation. + if os.environ.get("CONTAINER_NAME") != None: + return cmdlist + + return self.__IPMI_CONTAINER_PREFIX + cmdlist + def __init__(self): - self.ipmi_raw = ["docker", "exec", "-ti", "pmon", "ipmitool", "raw", "0x4", "0x2d", ""] + self.ipmi_raw = self.__container_prefix(self.__IPMI_BASE_COMMAND) self.psu1_id = "0x2f" self.psu2_id = "0x39" PsuBase.__init__(self) @@ -51,8 +63,7 @@ def get_psu_status(self, index): return False psu_id = self.psu1_id if index == 1 else self.psu2_id - self.ipmi_raw[8] = psu_id - res_string = self.run_command(self.ipmi_raw) + res_string = self.run_command(self.ipmi_raw + [psu_id]) status_byte = self.find_value(res_string) if status_byte is None: @@ -76,8 +87,7 @@ def get_psu_presence(self, index): return False psu_id = self.psu1_id if index == 1 else self.psu2_id - self.ipmi_raw[8] = psu_id - res_string = self.run_command(self.ipmi_raw) + res_string = self.run_command(self.ipmi_raw + [psu_id]) status_byte = self.find_value(res_string) if status_byte is None: diff --git a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json index 94592fa8cebc..f5b2736b13e0 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json +++ b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json @@ -1,3 +1,5 @@ { - "skip_ledd": true + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true } diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py deleted file mode 100644 index d82f3749319c..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py +++ /dev/null @@ -1,2 +0,0 @@ -__all__ = ["platform", "chassis"] -from sonic_platform import * diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py deleted file mode 100644 index b6f77cbd3dc9..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py +++ /dev/null @@ -1,131 +0,0 @@ -############################################################################# -# Celestica -# -# Module contains an implementation of SONiC Platform Base API and -# provides the Chassis information which are available in the platform -# -############################################################################# - -import sys -import re -import os -import subprocess -import json - -try: - from sonic_platform_base.chassis_base import ChassisBase - from sonic_platform.component import Component - from sonic_platform.eeprom import Tlv - from sonic_platform.fan import Fan - from sonic_platform.sfp import Sfp - from sonic_platform.psu import Psu - from sonic_platform.thermal import Thermal - from .helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -NUM_FAN_TRAY = 7 -NUM_FAN = 2 -NUM_PSU = 2 -NUM_THERMAL = 10 -NUM_SFP = 32 -NUM_COMPONENT = 5 - -IPMI_OEM_NETFN = "0x3A" -IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06" - - -class Chassis(ChassisBase): - """Platform-specific Chassis class""" - - def __init__(self): - self.config_data = {} - ChassisBase.__init__(self) - self._eeprom = Tlv() - self._api_helper = APIHelper() - - for fant_index in range(0, NUM_FAN_TRAY): - for fan_index in range(0, NUM_FAN): - fan = Fan(fant_index, fan_index) - self._fan_list.append(fan) - - for index in range(0, NUM_SFP): - sfp = Sfp(index) - self._sfp_list.append(sfp) - - for index in range(0, NUM_PSU): - psu = Psu(index) - self._psu_list.append(psu) - for index in range(0, NUM_COMPONENT): - component = Component(index) - self._component_list.append(component) - for index in range(0, NUM_THERMAL): - thermal = Thermal(index) - self._thermal_list.append(thermal) - - def get_base_mac(self): - """ - Retrieves the base MAC address for the chassis - Returns: - A string containing the MAC address in the format - 'XX:XX:XX:XX:XX:XX' - """ - return self._eeprom.get_mac() - - def get_serial(self): - """ - Retrieves the hardware serial number for the chassis - Returns: - A string containing the hardware serial number for this chassis. - """ - return self._eeprom.get_serial() - - def get_system_eeprom_info(self): - """ - Retrieves the full content of system EEPROM information for the chassis - Returns: - A dictionary where keys are the type code defined in - OCP ONIE TlvInfo EEPROM format and values are their corresponding - values. - """ - return self._eeprom.get_eeprom() - - def get_reboot_cause(self): - """ - Retrieves the cause of the previous reboot - - Returns: - A tuple (string, string) where the first element is a string - containing the cause of the previous reboot. This string must be - one of the predefined strings in this class. If the first string - is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used - to pass a description of the reboot cause. - """ - - status, raw_cause = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) - hx_cause = raw_cause.split()[0] if status and len( - raw_cause.split()) > 0 else 00 - reboot_cause = { - "00": self.REBOOT_CAUSE_HARDWARE_OTHER, - "11": self.REBOOT_CAUSE_POWER_LOSS, - "22": self.REBOOT_CAUSE_NON_HARDWARE, - "33": self.REBOOT_CAUSE_HARDWARE_OTHER, - "44": self.REBOOT_CAUSE_NON_HARDWARE, - "55": self.REBOOT_CAUSE_NON_HARDWARE, - "66": self.REBOOT_CAUSE_WATCHDOG, - "77": self.REBOOT_CAUSE_NON_HARDWARE - }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER) - - description = { - "00": "Unknown reason", - "11": "The last reset is Power on reset", - "22": "The last reset is soft-set CPU warm reset", - "33": "The last reset is soft-set CPU cold reset", - "44": "The last reset is CPU warm reset", - "55": "The last reset is CPU cold reset", - "66": "The last reset is watchdog reset", - "77": "The last reset is power cycle reset" - }.get(hx_cause, "Unknown reason") - - return (reboot_cause, description) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py deleted file mode 100644 index ba7742c66b60..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py +++ /dev/null @@ -1,118 +0,0 @@ -############################################################################# -# Celestica -# -# Component contains an implementation of SONiC Platform Base API and -# provides the components firmware management function -# -############################################################################# - -import os.path - -try: - from sonic_platform_base.component_base import ComponentBase - from .helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -COMPONENT_LIST = [ - ("BIOS", "Basic Input/Output System"), - ("BMC", "Baseboard Management Controller"), - ("SWITCH_CPLD", "Switch board CPLD"), - ("BASE_CPLD", "Base board CPLD"), - ("FPGA", "Field-programmable gate array") -] -SW_CPLD_VER_PATH = "/sys/module/switch_cpld/version" -BASE_CPLD_VER_PATH = "/sys/module/baseboard_lpc/version" -BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" -BMC_VER_CMD1 = ["ipmitool", "mc", "info"] -BMC_VER_CMD2 = ["grep", "Firmware Revision"] -CFUFLASH_FW_UPGRADE_CMD = ["CFUFLASH", "-cd", "-d", "", "-mse", "3", ""] -MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0" -FPGA_VER_MEM_OFFSET = 0 -UPGRADE_OPT = { - 'BMC': '1', - 'BIOS': '2', - 'SWITCH_CPLD': '4', - 'BASE_CPLD': '4' -} - - -class Component(ComponentBase): - """Platform-specific Component class""" - - DEVICE_TYPE = "component" - - def __init__(self, component_index): - ComponentBase.__init__(self) - self.index = component_index - self.name = self.get_name() - self._api_helper = APIHelper() - - def __get_bmc_ver(self): - bmc_ver = "Unknown" - status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2) - if status: - bmc_ver_data = raw_bmc_data.split(":") - bmc_ver = bmc_ver_data[-1].strip() if len( - bmc_ver_data) > 1 else bmc_ver - return bmc_ver - - def __get_fpga_ver(self): - fpga_ver = "Unknown" - status, reg_val = self._api_helper.pci_get_value( - MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET) - if status: - major = reg_val[0] >> 16 - minor = int(bin(reg_val[0])[16:32], 2) - fpga_ver = '{}.{}'.format(major, minor) - return fpga_ver - - def get_name(self): - """ - Retrieves the name of the component - Returns: - A string containing the name of the component - """ - return COMPONENT_LIST[self.index][0] - - def get_description(self): - """ - Retrieves the description of the component - Returns: - A string containing the description of the component - """ - return COMPONENT_LIST[self.index][1] - - def get_firmware_version(self): - """ - Retrieves the firmware version of module - Returns: - string: The firmware versions of the module - """ - fw_version = { - "BIOS": self._api_helper.read_txt_file(BIOS_VER_PATH), - "BMC": self.__get_bmc_ver(), - "FPGA": self.__get_fpga_ver(), - "SWITCH_CPLD": self._api_helper.read_txt_file(SW_CPLD_VER_PATH), - "BASE_CPLD": self._api_helper.read_txt_file(BASE_CPLD_VER_PATH), - }.get(self.name, "Unknown") - - return fw_version - - def install_firmware(self, image_path): - """ - Install firmware to module - Args: - image_path: A string, path to firmware image - Returns: - A boolean, True if install successfully, False if not - """ - CFUFLASH_FW_UPGRADE_CMD[3] = UPGRADE_OPT.get(self.name) - CFUFLASH_FW_UPGRADE_CMD[6] = image_path - - if not os.path.isfile(image_path): - return False - - # print(install_command) - status = self._api_helper.run_interactive_command(CFUFLASH_FW_UPGRADE_CMD) - return status diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py deleted file mode 100644 index cf3f1a98de20..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py +++ /dev/null @@ -1,117 +0,0 @@ -############################################################################# -# Celestica Silverstone -# -# Platform and model specific eeprom subclass, inherits from the base class, -# and provides the followings: -# - the eeprom format definition -# - specific encoder/decoder if there is special need -############################################################################# - -try: - import glob - import os - import sys - import re - from array import array - - if sys.version_info.major == 3: - from io import StringIO - else: - from cStringIO import StringIO - - from sonic_platform_base.sonic_eeprom import eeprom_dts - from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -CACHE_ROOT = '/var/cache/sonic/decode-syseeprom' -CACHE_FILE = 'syseeprom_cache' -TLV_EEPROM_I2C_BUS = 0 -TLV_EEPROM_I2C_ADDR = 56 - - -class Tlv(eeprom_tlvinfo.TlvInfoDecoder): - - EEPROM_DECODE_HEADLINES = 6 - - def __init__(self): - self._eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom".format( - TLV_EEPROM_I2C_BUS, TLV_EEPROM_I2C_ADDR) - super(Tlv, self).__init__(self._eeprom_path, 0, '', True) - self._eeprom = self._load_eeprom() - - def __parse_output(self, decode_output): - decode_output.replace('\0', '') - lines = decode_output.split('\n') - lines = lines[self.EEPROM_DECODE_HEADLINES:] - _eeprom_info_dict = dict() - - for line in lines: - try: - match = re.search( - '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line) - if match is not None: - idx = match.group(1) - value = match.group(3).rstrip('\0') - - _eeprom_info_dict[idx] = value - except: - pass - return _eeprom_info_dict - - def _load_eeprom(self): - original_stdout = sys.stdout - sys.stdout = StringIO() - try: - self.read_eeprom_db() - except: - decode_output = sys.stdout.getvalue() - sys.stdout = original_stdout - return self.__parse_output(decode_output) - - status = self.check_status() - if 'ok' not in status: - return False - - if not os.path.exists(CACHE_ROOT): - try: - os.makedirs(CACHE_ROOT) - except: - pass - - # - # only the eeprom classes that inherit from eeprom_base - # support caching. Others will work normally - # - try: - self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE)) - except: - pass - - e = self.read_eeprom() - if e is None: - return 0 - - try: - self.update_cache(e) - except: - pass - - self.decode_eeprom(e) - decode_output = sys.stdout.getvalue() - sys.stdout = original_stdout - - (is_valid, valid_crc) = self.is_checksum_valid(e) - if not is_valid: - return False - - return self.__parse_output(decode_output) - - def get_eeprom(self): - return self._eeprom - - def get_serial(self): - return self._eeprom.get('0x23', "Undefined.") - - def get_mac(self): - return self._eeprom.get('0x24', "Undefined.") diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py deleted file mode 100644 index d53de841eeee..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py +++ /dev/null @@ -1,111 +0,0 @@ -import os -import struct -import subprocess -from mmap import * -from sonic_py_common.general import check_output_pipe - -HOST_CHK_CMD = ["docker"] -EMPTY_STRING = "" - - -class APIHelper(): - - def __init__(self): - pass - - def is_host(self): - try: - subprocess.call(HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) - except FileNotFoundError: - return False - return True - - def pci_get_value(self, resource, offset): - status = True - result = "" - try: - fd = os.open(resource, os.O_RDWR) - mm = mmap(fd, 0) - mm.seek(int(offset)) - read_data_stream = mm.read(4) - result = struct.unpack('I', read_data_stream) - except: - status = False - return status, result - - def run_command(self, cmd1_args, cmd2_args): - status = True - result = "" - try: - result = check_output_pipe(cmd1_args, cmd2_args) - except subprocess.CalledProcessError: - status = False - return status, result - - def run_interactive_command(self, cmd): - try: - subprocess.call(cmd) - except: - return False - return True - - def read_txt_file(self, file_path): - try: - with open(file_path, 'r') as fd: - data = fd.read() - return data.strip() - except IOError: - pass - return None - - def ipmi_raw(self, netfn, cmd): - status = True - result = "" - try: - cmd = ["ipmitool", "raw", str(netfn), str(cmd)] - p = subprocess.Popen( - cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - return status, result - - def ipmi_fru_id(self, id, key=None): - status = True - result = "" - cmd1_args = ["ipmitool", "fru", "print", str(id)] - if not key: - try: - p = subprocess.Popen( - cmd1_args, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - else: - cmd2_args = ["grep", str(key)] - status, result = self.run_command(cmd1_args, cmd2_args) - return status, result - - def ipmi_set_ss_thres(self, id, threshold_key, value): - status = True - result = "" - try: - cmd = ["ipmitool", "sensor", "thresh", str(id), str(threshold_key), str(value)] - p = subprocess.Popen( - cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - raw_data, err = p.communicate() - if err == '': - result = raw_data.strip() - else: - status = False - except: - status = False - return status, result diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py deleted file mode 100644 index a6c805d3ca4f..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py +++ /dev/null @@ -1,236 +0,0 @@ -############################################################################# -# Celestica -# -# Module contains an implementation of SONiC Platform Base API and -# provides the PSUs status which are available in the platform -# -############################################################################# - -import os -import re -import math -import sonic_platform - -try: - from sonic_platform_base.psu_base import PsuBase - from .helper import APIHelper - from sonic_platform.fan import Fan -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -PSU_NAME_LIST = ["PSU-1", "PSU-2"] -PSU_NUM_FAN = [1, 1] - -IPMI_SENSOR_NETFN = "0x04" -IPMI_OEM_NETFN = "0x3A" -IPMI_SS_READ_CMD = "0x2D {}" -IPMI_SET_PSU_LED_CMD = "0x07 0x02 {}" -IPMI_GET_PSU_LED_CMD = "0x08 0x02" -IPMI_FRU_MODEL_KEY = "Board Part Number" -IPMI_FRU_SERIAL_KEY = "Board Serial" - -PSU_LED_OFF_CMD = "0x00" -PSU_LED_GREEN_CMD = "0x01" -PSU_LED_AMBER_CMD = "0x02" - -PSU1_FRU_ID = 3 - -SS_READ_OFFSET = 0 - -PSU_VOUT_SS_ID = ["0x36", "0x40"] -PSU_COUT_SS_ID = ["0x37", "0x41"] -PSU_POUT_SS_ID = ["0x38", "0x42"] -PSU_STATUS_REG = ["0x39", "0x2f"] - - -class Psu(PsuBase): - """Platform-specific Psu class""" - - def __init__(self, psu_index): - PsuBase.__init__(self) - self.index = psu_index - for fan_index in range(0, PSU_NUM_FAN[self.index]): - fan = Fan(fan_index, 0, is_psu_fan=True, psu_index=self.index) - self._fan_list.append(fan) - self._api_helper = APIHelper() - - def find_value(self, in_string): - result = re.search("^.+ ([0-9a-f]{2}) .+$", in_string) - return result.group(1) if result else result - - def get_voltage(self): - """ - Retrieves current PSU voltage output - Returns: - A float number, the output voltage in volts, - e.g. 12.1 - """ - psu_voltage = 0.0 - psu_vout_key = PSU_VOUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_vout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx1x10^-1 - psu_voltage = int(ss_read, 16) * math.pow(10, -1) - - return psu_voltage - - def get_current(self): - """ - Retrieves present electric current supplied by PSU - Returns: - A float number, the electric current in amperes, e.g 15.4 - """ - psu_current = 0.0 - psu_cout_key = PSU_COUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_cout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx5x10^-1 - psu_current = int(ss_read, 16) * 5 * math.pow(10, -1) - - return psu_current - - def get_power(self): - """ - Retrieves current energy supplied by PSU - Returns: - A float number, the power in watts, e.g. 302.6 - """ - psu_power = 0.0 - psu_pout_key = PSU_POUT_SS_ID[self.index] - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pout_key)) - ss_read = raw_ss_read.split()[SS_READ_OFFSET] - # Formula: Rx6x10^0 - psu_power = int(ss_read, 16) * 6 - return psu_power - - def get_powergood_status(self): - """ - Retrieves the powergood status of PSU - Returns: - A boolean, True if PSU has stablized its output voltages and passed all - its internal self-tests, False if not. - """ - return self.get_status() - - def set_status_led(self, color): - """ - Sets the state of the PSU status LED - Args: - color: A string representing the color with which to set the PSU status LED - Note: Only support green and off - Returns: - bool: True if status LED state is set successfully, False if not - Note - Set manual - ipmitool raw 0x3a 0x09 0x2 0x0 - """ - led_cmd = { - self.STATUS_LED_COLOR_GREEN: PSU_LED_GREEN_CMD, - self.STATUS_LED_COLOR_AMBER: PSU_LED_AMBER_CMD, - self.STATUS_LED_COLOR_OFF: PSU_LED_OFF_CMD - }.get(color) - - status, set_led = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_SET_PSU_LED_CMD.format(led_cmd)) - set_status_led = False if not status else True - - return set_status_led - - def get_status_led(self): - """ - Gets the state of the PSU status LED - Returns: - A string, one of the predefined STATUS_LED_COLOR_* strings above - """ - status, hx_color = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_GET_PSU_LED_CMD) - - status_led = { - "00": self.STATUS_LED_COLOR_OFF, - "01": self.STATUS_LED_COLOR_GREEN, - "02": self.STATUS_LED_COLOR_AMBER, - }.get(hx_color, self.STATUS_LED_COLOR_OFF) - - return status_led - - def get_name(self): - """ - Retrieves the name of the device - Returns: - string: The name of the device - """ - return PSU_NAME_LIST[self.index] - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if PSU is present, False if not - """ - psu_presence = False - psu_pstatus_key = PSU_STATUS_REG[self.index] - status, raw_status_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) - status_byte = self.find_value(raw_status_read) - - if status: - presence_int = (int(status_byte, 16) >> 0) & 1 - psu_presence = True if presence_int else False - - return psu_presence - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - model = "Unknown" - ipmi_fru_idx = self.index + PSU1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_MODEL_KEY) - - fru_pn_list = raw_model.split() - if len(fru_pn_list) > 4: - model = fru_pn_list[4] - - return model - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - serial = "Unknown" - ipmi_fru_idx = self.index + PSU1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) - - fru_sr_list = raw_model.split() - if len(fru_sr_list) > 3: - serial = fru_sr_list[3] - - return serial - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - psu_status = False - psu_pstatus_key = PSU_STATUS_REG[self.index] - status, raw_status_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key)) - status_byte = self.find_value(raw_status_read) - - if status: - failure_detected = (int(status_byte, 16) >> 1) & 1 - input_lost = (int(status_byte, 16) >> 3) & 1 - psu_status = False if (input_lost or failure_detected) else True - - return psu_status diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py deleted file mode 100644 index 4ad97b42fff3..000000000000 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py +++ /dev/null @@ -1,1467 +0,0 @@ -############################################################################# -# Celestica -# -# Sfp contains an implementation of SONiC Platform Base API and -# provides the sfp device status which are available in the platform -# -############################################################################# - -import time -import subprocess -from ctypes import create_string_buffer - -try: - from sonic_platform_base.sfp_base import SfpBase - from sonic_platform_base.sonic_eeprom import eeprom_dts - from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId - from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom - from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId - from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom - from sonic_platform_base.sonic_sfp.inf8628 import inf8628InterfaceId - from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -INFO_OFFSET = 128 -DOM_OFFSET = 0 - -# definitions of the offset and width for values in XCVR info eeprom -XCVR_INTFACE_BULK_OFFSET = 0 -XCVR_INTFACE_BULK_WIDTH_QSFP = 20 -XCVR_INTFACE_BULK_WIDTH_SFP = 21 -XCVR_TYPE_OFFSET = 0 -XCVR_TYPE_WIDTH = 1 -XCVR_EXT_TYPE_OFFSET = 1 -XCVR_EXT_TYPE_WIDTH = 1 -XCVR_CONNECTOR_OFFSET = 2 -XCVR_CONNECTOR_WIDTH = 1 -XCVR_COMPLIANCE_CODE_OFFSET = 3 -XCVR_COMPLIANCE_CODE_WIDTH = 8 -XCVR_ENCODING_OFFSET = 11 -XCVR_ENCODING_WIDTH = 1 -XCVR_NBR_OFFSET = 12 -XCVR_NBR_WIDTH = 1 -XCVR_EXT_RATE_SEL_OFFSET = 13 -XCVR_EXT_RATE_SEL_WIDTH = 1 -XCVR_CABLE_LENGTH_OFFSET = 14 -XCVR_CABLE_LENGTH_WIDTH_QSFP = 5 -XCVR_CABLE_LENGTH_WIDTH_SFP = 6 -XCVR_VENDOR_NAME_OFFSET = 20 -XCVR_VENDOR_NAME_WIDTH = 16 -XCVR_VENDOR_OUI_OFFSET = 37 -XCVR_VENDOR_OUI_WIDTH = 3 -XCVR_VENDOR_PN_OFFSET = 40 -XCVR_VENDOR_PN_WIDTH = 16 -XCVR_HW_REV_OFFSET = 56 -XCVR_HW_REV_WIDTH_OSFP = 2 -XCVR_HW_REV_WIDTH_QSFP = 2 -XCVR_HW_REV_WIDTH_SFP = 4 -XCVR_VENDOR_SN_OFFSET = 68 -XCVR_VENDOR_SN_WIDTH = 16 -XCVR_VENDOR_DATE_OFFSET = 84 -XCVR_VENDOR_DATE_WIDTH = 8 -XCVR_DOM_CAPABILITY_OFFSET = 92 -XCVR_DOM_CAPABILITY_WIDTH = 2 - -XCVR_INTERFACE_DATA_START = 0 -XCVR_INTERFACE_DATA_SIZE = 92 - -QSFP_DOM_BULK_DATA_START = 22 -QSFP_DOM_BULK_DATA_SIZE = 36 -SFP_DOM_BULK_DATA_START = 96 -SFP_DOM_BULK_DATA_SIZE = 10 - -# definitions of the offset for values in OSFP info eeprom -OSFP_TYPE_OFFSET = 0 -OSFP_VENDOR_NAME_OFFSET = 129 -OSFP_VENDOR_PN_OFFSET = 148 -OSFP_HW_REV_OFFSET = 164 -OSFP_VENDOR_SN_OFFSET = 166 - -# Offset for values in QSFP eeprom -QSFP_DOM_REV_OFFSET = 1 -QSFP_DOM_REV_WIDTH = 1 -QSFP_TEMPE_OFFSET = 22 -QSFP_TEMPE_WIDTH = 2 -QSFP_VOLT_OFFSET = 26 -QSFP_VOLT_WIDTH = 2 -QSFP_VERSION_COMPLIANCE_OFFSET = 1 -QSFP_VERSION_COMPLIANCE_WIDTH = 2 -QSFP_CHANNL_MON_OFFSET = 34 -QSFP_CHANNL_MON_WIDTH = 16 -QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24 -QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86 -QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1 -QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3 -QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1 -QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4 -QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1 -QSFP_CONTROL_OFFSET = 86 -QSFP_CONTROL_WIDTH = 8 -QSFP_MODULE_MONITOR_OFFSET = 0 -QSFP_MODULE_MONITOR_WIDTH = 9 -QSFP_POWEROVERRIDE_OFFSET = 93 -QSFP_POWEROVERRIDE_WIDTH = 1 -QSFP_POWEROVERRIDE_BIT = 0 -QSFP_POWERSET_BIT = 1 -QSFP_OPTION_VALUE_OFFSET = 192 -QSFP_OPTION_VALUE_WIDTH = 4 -QSFP_MODULE_UPPER_PAGE3_START = 384 -QSFP_MODULE_THRESHOLD_OFFSET = 128 -QSFP_MODULE_THRESHOLD_WIDTH = 24 -QSFP_CHANNL_THRESHOLD_OFFSET = 176 -QSFP_CHANNL_THRESHOLD_WIDTH = 24 - -SFP_MODULE_ADDRA2_OFFSET = 256 -SFP_MODULE_THRESHOLD_OFFSET = 0 -SFP_MODULE_THRESHOLD_WIDTH = 56 -SFP_CHANNL_THRESHOLD_OFFSET = 112 -SFP_CHANNL_THRESHOLD_WIDTH = 2 - -SFP_TEMPE_OFFSET = 96 -SFP_TEMPE_WIDTH = 2 -SFP_VOLT_OFFSET = 98 -SFP_VOLT_WIDTH = 2 -SFP_CHANNL_MON_OFFSET = 100 -SFP_CHANNL_MON_WIDTH = 6 -SFP_CHANNL_STATUS_OFFSET = 110 -SFP_CHANNL_STATUS_WIDTH = 1 - - -qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)', - 'Length OM2(m)', 'Length OM1(m)', - 'Length Cable Assembly(m)') - -sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)', - 'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)', - 'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)') - -sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode', - 'ESCONComplianceCodes', 'SONETComplianceCodes', - 'EthernetComplianceCodes', 'FibreChannelLinkLength', - 'FibreChannelTechnology', 'SFP+CableTechnology', - 'FibreChannelTransmissionMedia', 'FibreChannelSpeed') - -qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes', - 'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes', - 'Fibre Channel link length/Transmitter Technology', - 'Fibre Channel transmission media', 'Fibre Channel Speed') - -SFP_TYPE = "SFP" -QSFP_TYPE = "QSFP" -OSFP_TYPE = "OSFP" - -PORT_START = 1 -PORT_END = 34 -OSFP_PORT_START = 1 -OSFP_PORT_END = 32 -SFP_PORT_START = 33 -SFP_PORT_END = 34 - -PORT_INFO_PATH = '/sys/devices/platform/cls-xcvr' - - -class Sfp(SfpBase): - """Platform-specific Sfp class""" - - # Path to QSFP sysfs - PLATFORM_ROOT_PATH = "/usr/share/sonic/device" - PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" - HOST_CHK_CMD = ["docker"] - - PLATFORM = "x86_64-cel_silverstone-r0" - HWSKU = "Silverstone" - - def __init__(self, sfp_index): - SfpBase.__init__(self) - # Init index - self.index = sfp_index - self.port_num = self.index + 1 - self.dom_supported = False - self.sfp_type, self.port_name = self.__get_sfp_info() - - # Init eeprom path - eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' - self.port_to_eeprom_mapping = {} - self.port_to_i2c_mapping = { - 1: 10, - 2: 11, - 3: 12, - 4: 13, - 5: 14, - 6: 15, - 7: 16, - 8: 17, - 9: 18, - 10: 19, - 11: 20, - 12: 21, - 13: 22, - 14: 23, - 15: 24, - 16: 25, - 17: 26, - 18: 27, - 19: 28, - 20: 29, - 21: 30, - 22: 31, - 23: 32, - 24: 33, - 25: 34, - 26: 35, - 27: 36, - 28: 37, - 29: 38, - 30: 39, - 31: 40, - 32: 41, - 33: 1, - 34: 2 - } - - for x in range(PORT_START, PORT_END + 1): - port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x]) - self.port_to_eeprom_mapping[x] = port_eeprom_path - - self.info_dict_keys = ['type', 'vendor_rev', 'serial', 'manufacturer', 'model', 'connector', 'encoding', 'ext_identifier', - 'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui'] - - self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage', - 'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power'] - - self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning', - 'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning'] - - self._dom_capability_detect() - - def __get_sfp_info(self): - port_num = self.index + PORT_START - sfp_type = OSFP_PORT_START - port_name = "Unknown" - - if port_num >= OSFP_PORT_START and port_num <= OSFP_PORT_END: - sfp_type = OSFP_TYPE - port_name = "QSFP" + str(port_num - OSFP_PORT_START + 1) - elif port_num >= SFP_PORT_START and port_num <= SFP_PORT_END: - sfp_type = SFP_TYPE - port_name = "SFP" + str(port_num - SFP_PORT_START + 1) - return sfp_type, port_name - - def __convert_string_to_num(self, value_str): - if "-inf" in value_str: - return 'N/A' - elif "Unknown" in value_str: - return 'N/A' - elif 'dBm' in value_str: - t_str = value_str.rstrip('dBm') - return float(t_str) - elif 'mA' in value_str: - t_str = value_str.rstrip('mA') - return float(t_str) - elif 'C' in value_str: - t_str = value_str.rstrip('C') - return float(t_str) - elif 'Volts' in value_str: - t_str = value_str.rstrip('Volts') - return float(t_str) - else: - return 'N/A' - - def __is_host(self): - try: - subprocess.call(self.HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) - except FileNotFoundError: - return False - return True - - def __get_path_to_port_config_file(self): - platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM]) - hwsku_path = "/".join([platform_path, self.HWSKU] - ) if self.__is_host() else self.PMON_HWSKU_PATH - return "/".join([hwsku_path, "port_config.ini"]) - - def __read_eeprom_specific_bytes(self, offset, num_bytes): - sysfsfile_eeprom = None - eeprom_raw = [] - for i in range(0, num_bytes): - eeprom_raw.append("0x00") - - sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num] - try: - sysfsfile_eeprom = open( - sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0) - sysfsfile_eeprom.seek(offset) - raw = sysfsfile_eeprom.read(num_bytes) - for n in range(0, num_bytes): - eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2) - except: - pass - finally: - if sysfsfile_eeprom: - sysfsfile_eeprom.close() - - return eeprom_raw - - def _dom_capability_detect(self): - if not self.get_presence(): - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - return - - if self.sfp_type == "QSFP": - self.calibration = 1 - sfpi_obj = sff8436InterfaceId() - if sfpi_obj is None: - self.dom_supported = False - offset = 128 - - # QSFP capability byte parse, through this byte can know whether it support tx_power or not. - # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436, - # need to add more code for determining the capability and version compliance - # in SFF-8636 dom capability definitions evolving with the versions. - qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes( - (offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH) - if qsfp_dom_capability_raw is not None: - qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes( - QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH) - qsfp_version_compliance = int( - qsfp_version_compliance_raw[0], 16) - dom_capability = sfpi_obj.parse_dom_capability( - qsfp_dom_capability_raw, 0) - if qsfp_version_compliance >= 0x08: - self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On' - self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On' - self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' - self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On' - else: - self.dom_temp_supported = True - self.dom_volt_supported = True - self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On' - self.dom_tx_power_supported = True - - self.dom_supported = True - self.calibration = 1 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - qsfp_option_value_raw = self.__read_eeprom_specific_bytes( - QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH) - if qsfp_option_value_raw is not None: - optional_capability = sfpd_obj.parse_option_params( - qsfp_option_value_raw, 0) - self.dom_tx_disable_supported = optional_capability[ - 'data']['TxDisable']['value'] == 'On' - dom_status_indicator = sfpd_obj.parse_dom_status_indicator( - qsfp_version_compliance_raw, 1) - self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off' - else: - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - self.qsfp_page3_available = False - - elif self.sfp_type == "SFP": - sfpi_obj = sff8472InterfaceId() - if sfpi_obj is None: - return None - sfp_dom_capability_raw = self.__read_eeprom_specific_bytes( - XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH) - if sfp_dom_capability_raw is not None: - sfp_dom_capability = int(sfp_dom_capability_raw[0], 16) - self.dom_supported = (sfp_dom_capability & 0x40 != 0) - if self.dom_supported: - self.dom_temp_supported = True - self.dom_volt_supported = True - self.dom_rx_power_supported = True - self.dom_tx_power_supported = True - if sfp_dom_capability & 0x20 != 0: - self.calibration = 1 - elif sfp_dom_capability & 0x10 != 0: - self.calibration = 2 - else: - self.calibration = 0 - else: - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - self.calibration = 0 - self.dom_tx_disable_supported = ( - int(sfp_dom_capability_raw[1], 16) & 0x40 != 0) - else: - self.dom_supported = False - self.dom_temp_supported = False - self.dom_volt_supported = False - self.dom_rx_power_supported = False - self.dom_tx_power_supported = False - - def get_transceiver_info(self): - """ - Retrieves transceiver info of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - type |1*255VCHAR |type of SFP - vendor_rev |1*255VCHAR |vendor revision of SFP - serial |1*255VCHAR |serial number of the SFP - manufacturer |1*255VCHAR |SFP vendor name - model |1*255VCHAR |SFP model name - connector |1*255VCHAR |connector information - encoding |1*255VCHAR |encoding information - ext_identifier |1*255VCHAR |extend identifier - ext_rateselect_compliance |1*255VCHAR |extended rateSelect compliance - cable_length |INT |cable length in m - nominal_bit_rate |INT |nominal bit rate by 100Mbs - specification_compliance |1*255VCHAR |specification compliance - vendor_date |1*255VCHAR |vendor date - vendor_oui |1*255VCHAR |vendor OUI - ======================================================================== - """ - compliance_code_dict = {} - transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A') - if not self.get_presence(): - return transceiver_info_dict - - # ToDo: OSFP tranceiver info parsing not fully supported. - # in inf8628.py lack of some memory map definition - # will be implemented when the inf8628 memory map ready - if self.sfp_type == OSFP_TYPE: - offset = 0 - vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP - - sfpi_obj = inf8628InterfaceId() - if sfpi_obj is None: - return None - - sfp_type_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH) - if sfp_type_raw is not None: - sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0) - else: - return None - - sfp_vendor_name_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH) - if sfp_vendor_name_raw is not None: - sfp_vendor_name_data = sfpi_obj.parse_vendor_name( - sfp_vendor_name_raw, 0) - else: - return None - - sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH) - if sfp_vendor_pn_raw is not None: - sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( - sfp_vendor_pn_raw, 0) - else: - return None - - sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_HW_REV_OFFSET), vendor_rev_width) - if sfp_vendor_rev_raw is not None: - sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( - sfp_vendor_rev_raw, 0) - else: - return None - - sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes( - (offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH) - if sfp_vendor_sn_raw is not None: - sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( - sfp_vendor_sn_raw, 0) - else: - return None - - transceiver_info_dict['type'] = sfp_type_data['data']['type']['value'] - transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value'] - transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] - transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] - transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] - transceiver_info_dict['vendor_oui'] = 'N/A' - transceiver_info_dict['vendor_date'] = 'N/A' - transceiver_info_dict['connector'] = 'N/A' - transceiver_info_dict['encoding'] = 'N/A' - transceiver_info_dict['ext_identifier'] = 'N/A' - transceiver_info_dict['ext_rateselect_compliance'] = 'N/A' - transceiver_info_dict['cable_type'] = 'N/A' - transceiver_info_dict['cable_length'] = 'N/A' - transceiver_info_dict['specification_compliance'] = 'N/A' - transceiver_info_dict['nominal_bit_rate'] = 'N/A' - - else: - if self.sfp_type == QSFP_TYPE: - offset = 128 - vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP - cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP - interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP - sfp_type = 'QSFP' - - sfpi_obj = sff8436InterfaceId() - if sfpi_obj is None: - print("Error: sfp_object open failed") - return None - - else: - offset = 0 - vendor_rev_width = XCVR_HW_REV_WIDTH_SFP - cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP - interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP - sfp_type = 'SFP' - - sfpi_obj = sff8472InterfaceId() - if sfpi_obj is None: - print("Error: sfp_object open failed") - return None - sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes( - offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE) - if sfp_interface_bulk_raw is None: - return None - - start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START - end = start + interface_info_bulk_width - sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_NAME_WIDTH - sfp_vendor_name_data = sfpi_obj.parse_vendor_name( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_PN_WIDTH - sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START - end = start + vendor_rev_width - sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_SN_WIDTH - sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_OUI_WIDTH - sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui( - sfp_interface_bulk_raw[start: end], 0) - - start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START - end = start + XCVR_VENDOR_DATE_WIDTH - sfp_vendor_date_data = sfpi_obj.parse_vendor_date( - sfp_interface_bulk_raw[start: end], 0) - transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value'] - transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value'] - transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value'] - transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value'] - transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value'] - transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value'] - transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[ - 'data']['VendorDataCode(YYYY-MM-DD Lot)']['value'] - transceiver_info_dict['connector'] = sfp_interface_bulk_data['data']['Connector']['value'] - transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value'] - transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value'] - transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value'] - if self.sfp_type == QSFP_TYPE: - for key in qsfp_cable_length_tup: - if key in sfp_interface_bulk_data['data']: - transceiver_info_dict['cable_type'] = key - transceiver_info_dict['cable_length'] = str( - sfp_interface_bulk_data['data'][key]['value']) - - for key in qsfp_compliance_code_tup: - if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: - compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] - transceiver_info_dict['specification_compliance'] = str( - compliance_code_dict) - - transceiver_info_dict['nominal_bit_rate'] = str( - sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value']) - else: - for key in sfp_cable_length_tup: - if key in sfp_interface_bulk_data['data']: - transceiver_info_dict['cable_type'] = key - transceiver_info_dict['cable_length'] = str( - sfp_interface_bulk_data['data'][key]['value']) - - for key in sfp_compliance_code_tup: - if key in sfp_interface_bulk_data['data']['Specification compliance']['value']: - compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value'] - transceiver_info_dict['specification_compliance'] = str( - compliance_code_dict) - - transceiver_info_dict['nominal_bit_rate'] = str( - sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value']) - - return transceiver_info_dict - - def get_transceiver_bulk_status(self): - """ - Retrieves transceiver bulk status of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - rx_los |BOOLEAN |RX loss-of-signal status, True if has RX los, False if not. - tx_fault |BOOLEAN |TX fault status, True if has TX fault, False if not. - reset_status |BOOLEAN |reset status, True if SFP in reset, False if not. - lp_mode |BOOLEAN |low power mode status, True in lp mode, False if not. - tx_disable |BOOLEAN |TX disable status, True TX disabled, False if not. - tx_disabled_channel |HEX |disabled TX channels in hex, bits 0 to 3 represent channel 0 - | |to channel 3. - temperature |INT |module temperature in Celsius - voltage |INT |supply voltage in mV - txbias |INT |TX Bias Current in mA, n is the channel number, - | |for example, tx2bias stands for tx bias of channel 2. - rxpower |INT |received optical power in mW, n is the channel number, - | |for example, rx2power stands for rx power of channel 2. - txpower |INT |TX output power in mW, n is the channel number, - | |for example, tx2power stands for tx power of channel 2. - ======================================================================== - """ - transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A') - - if self.sfp_type == OSFP_TYPE: - pass - - elif self.sfp_type == QSFP_TYPE: - if not self.dom_supported: - return transceiver_dom_info_dict - - offset = 0 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return transceiver_dom_info_dict - - dom_data_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE) - if dom_data_raw is None: - return transceiver_dom_info_dict - - if self.dom_temp_supported: - start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_TEMPE_WIDTH - dom_temperature_data = sfpd_obj.parse_temperature( - dom_data_raw[start: end], 0) - temp = self.__convert_string_to_num( - dom_temperature_data['data']['Temperature']['value']) - if temp is not None: - transceiver_dom_info_dict['temperature'] = temp - - if self.dom_volt_supported: - start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_VOLT_WIDTH - dom_voltage_data = sfpd_obj.parse_voltage( - dom_data_raw[start: end], 0) - volt = self.__convert_string_to_num( - dom_voltage_data['data']['Vcc']['value']) - if volt is not None: - transceiver_dom_info_dict['voltage'] = volt - - start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START - end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_data_raw[start: end], 0) - - if self.dom_tx_power_supported: - transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX1Power']['value']) - transceiver_dom_info_dict['tx2power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX2Power']['value']) - transceiver_dom_info_dict['tx3power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX3Power']['value']) - transceiver_dom_info_dict['tx4power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX4Power']['value']) - - if self.dom_rx_power_supported: - transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX1Power']['value']) - transceiver_dom_info_dict['rx2power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX2Power']['value']) - transceiver_dom_info_dict['rx3power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX3Power']['value']) - transceiver_dom_info_dict['rx4power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX4Power']['value']) - - transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value'] - transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value'] - transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value'] - transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value'] - - else: - if not self.dom_supported: - return transceiver_dom_info_dict - - offset = 256 - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return transceiver_dom_info_dict - sfpd_obj._calibration_type = self.calibration - - dom_data_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_DOM_BULK_DATA_START), SFP_DOM_BULK_DATA_SIZE) - - start = SFP_TEMPE_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_TEMPE_WIDTH - dom_temperature_data = sfpd_obj.parse_temperature( - dom_data_raw[start: end], 0) - - start = SFP_VOLT_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_VOLT_WIDTH - dom_voltage_data = sfpd_obj.parse_voltage( - dom_data_raw[start: end], 0) - - start = SFP_CHANNL_MON_OFFSET - SFP_DOM_BULK_DATA_START - end = start + SFP_CHANNL_MON_WIDTH - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_data_raw[start: end], 0) - - transceiver_dom_info_dict['temperature'] = self.__convert_string_to_num( - dom_temperature_data['data']['Temperature']['value']) - transceiver_dom_info_dict['voltage'] = self.__convert_string_to_num( - dom_voltage_data['data']['Vcc']['value']) - transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['RXPower']['value']) - transceiver_dom_info_dict['tx1bias'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXBias']['value']) - transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXPower']['value']) - - transceiver_dom_info_dict['rx_los'] = self.get_rx_los() - transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault() - transceiver_dom_info_dict['reset_status'] = self.get_reset_status() - transceiver_dom_info_dict['lp_mode'] = self.get_lpmode() - - return transceiver_dom_info_dict - - def get_transceiver_threshold_info(self): - """ - Retrieves transceiver threshold info of this SFP - Returns: - A dict which contains following keys/values : - ======================================================================== - keys |Value Format |Information - ---------------------------|---------------|---------------------------- - temphighalarm |FLOAT |High Alarm Threshold value of temperature in Celsius. - templowalarm |FLOAT |Low Alarm Threshold value of temperature in Celsius. - temphighwarning |FLOAT |High Warning Threshold value of temperature in Celsius. - templowwarning |FLOAT |Low Warning Threshold value of temperature in Celsius. - vcchighalarm |FLOAT |High Alarm Threshold value of supply voltage in mV. - vcclowalarm |FLOAT |Low Alarm Threshold value of supply voltage in mV. - vcchighwarning |FLOAT |High Warning Threshold value of supply voltage in mV. - vcclowwarning |FLOAT |Low Warning Threshold value of supply voltage in mV. - rxpowerhighalarm |FLOAT |High Alarm Threshold value of received power in dBm. - rxpowerlowalarm |FLOAT |Low Alarm Threshold value of received power in dBm. - rxpowerhighwarning |FLOAT |High Warning Threshold value of received power in dBm. - rxpowerlowwarning |FLOAT |Low Warning Threshold value of received power in dBm. - txpowerhighalarm |FLOAT |High Alarm Threshold value of transmit power in dBm. - txpowerlowalarm |FLOAT |Low Alarm Threshold value of transmit power in dBm. - txpowerhighwarning |FLOAT |High Warning Threshold value of transmit power in dBm. - txpowerlowwarning |FLOAT |Low Warning Threshold value of transmit power in dBm. - txbiashighalarm |FLOAT |High Alarm Threshold value of tx Bias Current in mA. - txbiaslowalarm |FLOAT |Low Alarm Threshold value of tx Bias Current in mA. - txbiashighwarning |FLOAT |High Warning Threshold value of tx Bias Current in mA. - txbiaslowwarning |FLOAT |Low Warning Threshold value of tx Bias Current in mA. - ======================================================================== - """ - transceiver_dom_threshold_info_dict = dict.fromkeys( - self.threshold_dict_keys, 'N/A') - - if self.sfp_type == OSFP_TYPE: - pass - - elif self.sfp_type == QSFP_TYPE: - if not self.dom_supported or not self.qsfp_page3_available: - return transceiver_dom_threshold_info_dict - - # Dom Threshold data starts from offset 384 - # Revert offset back to 0 once data is retrieved - offset = QSFP_MODULE_UPPER_PAGE3_START - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH) - if dom_module_threshold_raw is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_data = sfpd_obj.parse_module_threshold_values( - dom_module_threshold_raw, 0) - - dom_channel_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET), - QSFP_CHANNL_THRESHOLD_WIDTH) - if dom_channel_threshold_raw is None: - return transceiver_dom_threshold_info_dict - dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values( - dom_channel_threshold_raw, 0) - - # Threshold Data - transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] - transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] - transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] - transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] - transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value'] - transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value'] - transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value'] - transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value'] - transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value'] - transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value'] - - else: - offset = SFP_MODULE_ADDRA2_OFFSET - - if not self.dom_supported: - return transceiver_dom_threshold_info_dict - - sfpd_obj = sff8472Dom(None, self.calibration) - if sfpd_obj is None: - return transceiver_dom_threshold_info_dict - - dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET), - SFP_MODULE_THRESHOLD_WIDTH) - if dom_module_threshold_raw is not None: - dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold( - dom_module_threshold_raw, 0) - else: - return transceiver_dom_threshold_info_dict - - # Threshold Data - transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value'] - transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value'] - transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value'] - transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value'] - transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value'] - transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value'] - transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data[ - 'data']['VoltageHighWarning']['value'] - transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value'] - transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value'] - transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value'] - transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value'] - transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value'] - - return transceiver_dom_threshold_info_dict - - def get_reset_status(self): - """ - Retrieves the reset status of SFP - Returns: - A Boolean, True if reset enabled, False if disabled - """ - if not self.dom_supported: - return False - - if self.sfp_type == OSFP_TYPE: - return False - elif self.sfp_type == QSFP_TYPE: - offset = 0 - sfpd_obj = sff8436Dom() - dom_module_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_MODULE_MONITOR_OFFSET), QSFP_MODULE_MONITOR_WIDTH) - - if dom_module_monitor_raw is not None: - return True - else: - return False - elif self.sfp_type == SFP_TYPE: - offset = 0 - sfpd_obj = sff8472Dom() - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - - if dom_channel_monitor_raw is not None: - return True - else: - return False - - def get_rx_los(self): - """ - Retrieves the RX LOS (lost-of-signal) status of SFP - Returns: - A Boolean, True if SFP has RX LOS, False if not. - Note : RX LOS status is latched until a call to get_rx_los or a reset. - """ - if not self.dom_supported: - return None - - rx_los_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - rx_los_data = int(dom_channel_monitor_raw[0], 16) - rx_los_list.append(rx_los_data & 0x01 != 0) - rx_los_list.append(rx_los_data & 0x02 != 0) - rx_los_list.append(rx_los_data & 0x04 != 0) - rx_los_list.append(rx_los_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - rx_los_data = int(dom_channel_monitor_raw[0], 16) - rx_los_list.append(rx_los_data & 0x02 != 0) - else: - return None - return rx_los_list - - def get_tx_fault(self): - """ - Retrieves the TX fault status of SFP - Returns: - A Boolean, True if SFP has TX fault, False if not - Note : TX fault status is lached until a call to get_tx_fault or a reset. - """ - if not self.dom_supported: - return None - - tx_fault_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_fault_data = int(dom_channel_monitor_raw[0], 16) - tx_fault_list.append(tx_fault_data & 0x01 != 0) - tx_fault_list.append(tx_fault_data & 0x02 != 0) - tx_fault_list.append(tx_fault_data & 0x04 != 0) - tx_fault_list.append(tx_fault_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_fault_data = int(dom_channel_monitor_raw[0], 16) - tx_fault_list.append(tx_fault_data & 0x04 != 0) - else: - return None - return tx_fault_list - - def get_tx_disable(self): - """ - Retrieves the tx_disable status of this SFP - Returns: - A Boolean, True if tx_disable is enabled, False if disabled - """ - if not self.dom_supported: - return None - - tx_disable_list = [] - if self.sfp_type == OSFP_TYPE: - return None - elif self.sfp_type == QSFP_TYPE: - offset = 0 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_disable_data = int(dom_channel_monitor_raw[0], 16) - tx_disable_list.append(tx_disable_data & 0x01 != 0) - tx_disable_list.append(tx_disable_data & 0x02 != 0) - tx_disable_list.append(tx_disable_data & 0x04 != 0) - tx_disable_list.append(tx_disable_data & 0x08 != 0) - else: - offset = 256 - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH) - if dom_channel_monitor_raw is not None: - tx_disable_data = int(dom_channel_monitor_raw[0], 16) - tx_disable_list.append(tx_disable_data & 0xC0 != 0) - else: - return None - return tx_disable_list - - def get_tx_disable_channel(self): - """ - Retrieves the TX disabled channels in this SFP - Returns: - A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent - TX channels which have been disabled in this SFP. - As an example, a returned value of 0x5 indicates that channel 0 - and channel 2 have been disabled. - """ - tx_disable_list = self.get_tx_disable() - if tx_disable_list is None: - return 0 - tx_disabled = 0 - for i in range(len(tx_disable_list)): - if tx_disable_list[i]: - tx_disabled |= 1 << i - return tx_disabled - - def get_lpmode(self): - """ - Retrieves the lpmode (low power mode) status of this SFP - Returns: - A Boolean, True if lpmode is enabled, False if disabled - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Read status - content = reg_file.readline().rstrip() - reg_value = int(content) - # low power mode is active high - if reg_value == 0: - return False - - return True - - def get_power_override(self): - """ - Retrieves the power-override status of this SFP - Returns: - A Boolean, True if power-override is enabled, False if disabled - """ - if self.sfp_type == QSFP_TYPE: - offset = 0 - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return False - - dom_control_raw = self.__read_eeprom_specific_bytes( - QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) if self.get_presence() else None - if dom_control_raw is not None: - dom_control_data = sfpd_obj.parse_control_bytes( - dom_control_raw, 0) - power_override = ( - 'On' == dom_control_data['data']['PowerOverride']['value']) - else: - return False - - def get_temperature(self): - """ - Retrieves the temperature of this SFP - Returns: - An integer number of current temperature in Celsius - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - return transceiver_bulk_status.get("temperature", "N/A") - - def get_voltage(self): - """ - Retrieves the supply voltage of this SFP - Returns: - An integer number of supply voltage in mV - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - return transceiver_bulk_status.get("voltage", "N/A") - - def get_tx_bias(self): - """ - Retrieves the TX bias current of this SFP - Returns: - A list of four integer numbers, representing TX bias in mA - for channel 0 to channel 4. - Ex. ['110.09', '111.12', '108.21', '112.09'] - """ - transceiver_bulk_status = self.get_transceiver_bulk_status() - tx1_bs = transceiver_bulk_status.get("tx1bias", "N/A") - tx2_bs = transceiver_bulk_status.get("tx2bias", "N/A") - tx3_bs = transceiver_bulk_status.get("tx3bias", "N/A") - tx4_bs = transceiver_bulk_status.get("tx4bias", "N/A") - tx_bias_list = [tx1_bs, tx2_bs, tx3_bs, tx4_bs] - return tx_bias_list - - def get_rx_power(self): - """ - Retrieves the received optical power for this SFP - Returns: - A list of four integer numbers, representing received optical - power in mW for channel 0 to channel 4. - Ex. ['1.77', '1.71', '1.68', '1.70'] - """ - rx_power_list = [] - if self.sfp_type == OSFP_TYPE: - # OSFP not supported on our platform yet. - return None - - elif self.sfp_type == QSFP_TYPE: - offset = 0 - offset_xcvr = 128 - - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - - if self.dom_rx_power_supported: - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_channel_monitor_raw, 0) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX1Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX2Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX3Power']['value'])) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RX4Power']['value'])) - else: - return None - else: - return None - else: - offset = 256 - - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return None - - if self.dom_supported: - sfpd_obj._calibration_type = self.calibration - - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_channel_monitor_raw, 0) - rx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['RXPower']['value'])) - else: - return None - else: - return None - - return rx_power_list - - def get_tx_power(self): - """ - Retrieves the TX power of this SFP - Returns: - A list of four integer numbers, representing TX power in mW - for channel 0 to channel 4. - Ex. ['1.86', '1.86', '1.86', '1.86'] - """ - tx_power_list = [] - if self.sfp_type == OSFP_TYPE: - # OSFP not supported on our platform yet. - return None - - elif self.sfp_type == QSFP_TYPE: - offset = 0 - offset_xcvr = 128 - - sfpd_obj = sff8436Dom() - if sfpd_obj is None: - return None - - if self.dom_tx_power_supported: - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power( - dom_channel_monitor_raw, 0) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX1Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX2Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX3Power']['value'])) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TX4Power']['value'])) - else: - return None - else: - return None - else: - offset = 256 - sfpd_obj = sff8472Dom() - if sfpd_obj is None: - return None - - if self.dom_supported: - sfpd_obj._calibration_type = self.calibration - - dom_channel_monitor_raw = self.__read_eeprom_specific_bytes( - (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH) - if dom_channel_monitor_raw is not None: - dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params( - dom_channel_monitor_raw, 0) - tx_power_list.append(self.__convert_string_to_num( - dom_channel_monitor_data['data']['TXPower']['value'])) - else: - return None - else: - return None - return tx_power_list - - def reset(self): - """ - Reset SFP and return all user module settings to their default srate. - Returns: - A boolean, True if successful, False if not - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Convert our register value back to a hex string and write back - reg_file.seek(0) - reg_file.write(hex(0)) - reg_file.close() - - # Sleep 1 second to allow it to settle - time.sleep(1) - - # Flip the bit back high and write back to the register to take port out of reset - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - reg_file.seek(0) - reg_file.write(hex(1)) - reg_file.close() - - return True - - def tx_disable(self, tx_disable): - """ - Disable SFP TX for all channels - Args: - tx_disable : A Boolean, True to enable tx_disable mode, False to disable - tx_disable mode. - Returns: - A boolean, True if tx_disable is set successfully, False if not - """ - if self.sfp_type == QSFP_TYPE: - sysfsfile_eeprom = None - try: - tx_disable_ctl = 0xf if tx_disable else 0x0 - buffer = create_string_buffer(1) - buffer[0] = chr(tx_disable_ctl) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def tx_disable_channel(self, channel, disable): - """ - Sets the tx_disable for specified SFP channels - Args: - channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3, - e.g. 0x5 for channel 0 and channel 2. - disable : A boolean, True to disable TX channels specified in channel, - False to enable - Returns: - A boolean, True if successful, False if not - """ - if self.sfp_type == QSFP_TYPE: - sysfsfile_eeprom = None - try: - channel_state = self.get_tx_disable_channel() - tx_enable_mask = [0xe, 0xd, 0xb, 0x7] - tx_disable_mask = [0x1, 0x3, 0x7, 0xf] - tx_disable_ctl = channel_state | tx_disable_mask[ - channel] if disable else channel_state & tx_enable_mask[channel] - buffer = create_string_buffer(1) - buffer[0] = chr(tx_disable_ctl) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def set_lpmode(self, lpmode): - """ - Sets the lpmode (low power mode) of SFP - Args: - lpmode: A Boolean, True to enable lpmode, False to disable it - Note : lpmode can be overridden by set_power_override - Returns: - A boolean, True if lpmode is set successfully, False if not - """ - if self.sfp_type != OSFP_TYPE: - return False - - try: - reg_file = open( - "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "r+") - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - content = hex(lpmode) - - reg_file.seek(0) - reg_file.write(content) - reg_file.close() - - return True - - def set_power_override(self, power_override, power_set): - """ - Sets SFP power level using power_override and power_set - Args: - power_override : - A Boolean, True to override set_lpmode and use power_set - to control SFP power, False to disable SFP power control - through power_override/power_set and use set_lpmode - to control SFP power. - power_set : - Only valid when power_override is True. - A Boolean, True to set SFP to low power mode, False to set - SFP to high power mode. - Returns: - A boolean, True if power-override and power_set are set successfully, - False if not - """ - if self.sfp_type == QSFP_TYPE: - try: - power_override_bit = 0 - if power_override: - power_override_bit |= 1 << 0 - - power_set_bit = 0 - if power_set: - power_set_bit |= 1 << 1 - - buffer = create_string_buffer(1) - buffer[0] = chr(power_override_bit | power_set_bit) - # Write to eeprom - sysfsfile_eeprom = open( - self.port_to_eeprom_mapping[self.port_num], "r+b") - sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET) - sysfsfile_eeprom.write(buffer[0]) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - finally: - if sysfsfile_eeprom is not None: - sysfsfile_eeprom.close() - time.sleep(0.01) - return True - return False - - def get_name(self): - """ - Retrieves the name of the device - Returns: - string: The name of the device - """ - sfputil_helper = SfpUtilHelper() - sfputil_helper.read_porttab_mappings( - self.__get_path_to_port_config_file()) - name = sfputil_helper.logical[self.index] or "Unknown" - return name - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if PSU is present, False if not - """ - sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprsL" - reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) - - # Read status - try: - reg_file = open(reg_path) - content = reg_file.readline().rstrip() - reg_value = int(content) - except IOError as e: - print("Error: unable to open file: %s" % str(e)) - return False - - # Module present is active low - if reg_value == 0: - return True - - return False - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - transceiver_dom_info_dict = self.get_transceiver_info() - return transceiver_dom_info_dict.get("model", "N/A") - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - transceiver_dom_info_dict = self.get_transceiver_info() - return transceiver_dom_info_dict.get("serial", "N/A") - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - return self.get_presence() diff --git a/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..56fda7de4f5d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json @@ -0,0 +1,13 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "green_blink_1hz" + } +} diff --git a/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin new file mode 100755 index 000000000000..22212b5afe13 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin @@ -0,0 +1,4 @@ +#!/bin/bash + +# Set all LEDs to BMC's control +ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json new file mode 100644 index 000000000000..b97d516509ec --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json @@ -0,0 +1,164 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json new file mode 100644 index 000000000000..4644f6e4549d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json @@ -0,0 +1,23 @@ +{ + "fec-mode": { + "Ethernet0-127": { + "1": { + "10000": [ "none", "fc" ], + "25000": [ "none", "fc" ] + }, + "2": { + "20000": [ "none", "fc" ], + "50000": [ "none", "rs" ] + }, + "4": { + "40000": [ "none", "fc" ], + "100000": [ "none", "rs" ] + } + } + }, + "native-port-supported-speeds": { + "Ethernet0-127": { + "4": ["100000","40000"] + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini new file mode 100644 index 000000000000..f7929e6f5c17 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 33,34,35,36,37,38,39,40 Eth1/1 1 400000 +Ethernet8 41,42,43,44,45,46,47,48 Eth1/2 2 400000 +Ethernet16 49,50,51,52,53,54,55,56 Eth1/3 3 400000 +Ethernet24 57,58,59,60,61,62,63,64 Eth1/4 4 400000 +Ethernet32 65,66,67,68,69,70,71,72 Eth1/5 5 400000 +Ethernet40 73,74,75,76,77,78,79,80 Eth1/6 6 400000 +Ethernet48 81,82,83,84,85,86,87,88 Eth1/7 7 400000 +Ethernet56 89,90,91,92,93,94,95,96 Eth1/8 8 400000 +Ethernet64 1,2,3,4,5,6,7,8 Eth1/9 9 400000 +Ethernet72 9,10,11,12,13,14,15,16 Eth1/10 10 400000 +Ethernet80 17,18,19,20,21,22,23,24 Eth1/11 11 400000 +Ethernet88 25,26,27,28,29,30,31,32 Eth1/12 12 400000 +Ethernet96 97,98,99,100,101,102,103,104 Eth1/13 13 400000 +Ethernet104 105,106,107,108,109,110,111,112 Eth1/14 14 400000 +Ethernet112 113,114,115,116,117,118,119,120 Eth1/15 15 400000 +Ethernet120 121,122,123,124,125,126,127,128 Eth1/16 16 400000 +Ethernet128 129,130,131,132,133,134,135,136 Eth1/17 17 400000 +Ethernet136 137,138,139,140,141,142,143,144 Eth1/18 18 400000 +Ethernet144 145,146,147,148,149,150,151,152 Eth1/19 19 400000 +Ethernet152 153,154,155,156,157,158,159,160 Eth1/20 20 400000 +Ethernet160 225,226,227,228,229,230,231,232 Eth1/21 21 400000 +Ethernet168 233,234,235,236,237,238,239,240 Eth1/22 22 400000 +Ethernet176 241,242,243,244,245,246,247,248 Eth1/23 23 400000 +Ethernet184 249,250,251,252,253,254,255,256 Eth1/24 24 400000 +Ethernet192 161,162,163,164,165,166,167,168 Eth1/25 25 400000 +Ethernet200 169,170,171,172,173,174,175,176 Eth1/26 26 400000 +Ethernet208 177,178,179,180,181,182,183,184 Eth1/27 27 400000 +Ethernet216 185,186,187,188,189,190,191,192 Eth1/28 28 400000 +Ethernet224 193,194,195,196,197,198,199,200 Eth1/29 29 400000 +Ethernet232 201,202,203,204,205,206,207,208 Eth1/30 30 400000 +Ethernet240 209,210,211,212,213,214,215,216 Eth1/31 31 400000 +Ethernet248 217,218,219,220,221,222,223,224 Eth1/32 32 400000 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile new file mode 100644 index 000000000000..550bfe181df4 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-32x400G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc new file mode 100644 index 000000000000..731625308a5e --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc @@ -0,0 +1,2 @@ +modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1 +modreg ING_MISC_CONFIG INPUT_PRI_UNTAGGED=1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm new file mode 100644 index 000000000000..f478e2ea85eb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm @@ -0,0 +1,231 @@ +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +#pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222 +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +sai_tunnel_global_sip_mask_enable=1 + +port_fec=9 + +#portmap_38=257:10 +#portmap_118=258:10 + + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + +#dport_map_port_20=1 +#dport_map_port_24=2 +#dport_map_port_28=3 +#dport_map_port_32=4 +#dport_map_port_40=5 +#dport_map_port_44=6 +#dport_map_port_48=7 +#dport_map_port_52=8 +#dport_map_port_1=9 +#dport_map_port_5=10 +#dport_map_port_9=11 +#dport_map_port_13=12 +#dport_map_port_60=13 +#dport_map_port_64=14 +#dport_map_port_68=15 +#dport_map_port_72=16 +#dport_map_port_80=17 +#dport_map_port_84=18 +#dport_map_port_88=19 +#dport_map_port_92=20 +#dport_map_port_140=21 +#dport_map_port_144=22 +#dport_map_port_148=23 +#dport_map_port_152=24 +#dport_map_port_100=25 +#dport_map_port_104=26 +#dport_map_port_108=27 +#dport_map_port_112=28 +#dport_map_port_120=29 +#dport_map_port_124=30 +#dport_map_port_128=31 +#dport_map_port_132=32 +# +#dport_map_port_38=33 +#dport_map_port_118=34 + + + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 + +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 new file mode 100644 index 000000000000..b67cf577ab75 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..44fcf21887a6 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 @@ -0,0 +1,45 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..740cfdf79e96 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 @@ -0,0 +1,46 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "xoff": "4625920", + "size": "12766208", + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "12766208", + "type": "egress", + "mode": "static" + }, + "egress_lossy_pool": { + "size": "7326924", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"12766208" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json new file mode 100644 index 000000000000..1a6031b4b543 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json @@ -0,0 +1,100 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "4x100G" + }, + "Ethernet8": { + "default_brkout_mode": "4x100G" + }, + "Ethernet16": { + "default_brkout_mode": "4x100G" + }, + "Ethernet24": { + "default_brkout_mode": "4x100G" + }, + "Ethernet32": { + "default_brkout_mode": "4x100G" + }, + "Ethernet40": { + "default_brkout_mode": "4x100G" + }, + "Ethernet48": { + "default_brkout_mode": "4x100G" + }, + "Ethernet56": { + "default_brkout_mode": "4x100G" + }, + "Ethernet64": { + "default_brkout_mode": "4x100G" + }, + "Ethernet72": { + "default_brkout_mode": "4x100G" + }, + "Ethernet80": { + "default_brkout_mode": "4x100G" + }, + "Ethernet88": { + "default_brkout_mode": "4x100G" + }, + "Ethernet96": { + "default_brkout_mode": "4x100G" + }, + "Ethernet104": { + "default_brkout_mode": "4x100G" + }, + "Ethernet112": { + "default_brkout_mode": "4x100G" + }, + "Ethernet120": { + "default_brkout_mode": "4x100G" + }, + "Ethernet128": { + "default_brkout_mode": "4x100G" + }, + "Ethernet136": { + "default_brkout_mode": "4x100G" + }, + "Ethernet144": { + "default_brkout_mode": "4x100G" + }, + "Ethernet152": { + "default_brkout_mode": "4x100G" + }, + "Ethernet160": { + "default_brkout_mode": "4x100G" + }, + "Ethernet168": { + "default_brkout_mode": "4x100G" + }, + "Ethernet176": { + "default_brkout_mode": "4x100G" + }, + "Ethernet184": { + "default_brkout_mode": "4x100G" + }, + "Ethernet192": { + "default_brkout_mode": "4x100G" + }, + "Ethernet200": { + "default_brkout_mode": "4x100G" + }, + "Ethernet208": { + "default_brkout_mode": "4x100G" + }, + "Ethernet216": { + "default_brkout_mode": "4x100G" + }, + "Ethernet224": { + "default_brkout_mode": "4x100G" + }, + "Ethernet232": { + "default_brkout_mode": "4x100G" + }, + "Ethernet240": { + "default_brkout_mode": "4x100G" + }, + "Ethernet248": { + "default_brkout_mode": "4x100G" + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config new file mode 100644 index 000000000000..45a7b84d5032 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config @@ -0,0 +1,3 @@ +l2_mem_entries=139264 +l3_mem_entries=8192 +l3_alpm_enable=0 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config new file mode 100644 index 000000000000..3467c1b39716 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config @@ -0,0 +1,3 @@ +l2_mem_entries=40000 +l3_mem_entries=40000 +l3_alpm_enable=2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini new file mode 100644 index 000000000000..9f2eacb6fc42 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 56368 18432 55120 -3 2496 + 25000 5m 56368 18432 55120 -3 2496 + 40000 5m 56368 18432 55120 -3 2496 + 50000 5m 56368 18432 55120 -3 2496 + 100000 5m 56368 18432 55120 -3 2496 + 10000 40m 56368 18432 55120 -3 2496 + 25000 40m 56368 18432 55120 -3 2496 + 40000 40m 56368 18432 55120 -3 2496 + 50000 40m 56368 18432 55120 -3 2496 + 100000 40m 56368 18432 55120 -3 2496 + 10000 300m 56368 18432 55120 -3 2496 + 25000 300m 56368 18432 55120 -3 2496 + 40000 300m 56368 18432 55120 -3 2496 + 50000 300m 56368 18432 55120 -3 2496 + 100000 300m 56368 18432 55120 -3 2496 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json new file mode 100644 index 000000000000..4644f6e4549d --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json @@ -0,0 +1,23 @@ +{ + "fec-mode": { + "Ethernet0-127": { + "1": { + "10000": [ "none", "fc" ], + "25000": [ "none", "fc" ] + }, + "2": { + "20000": [ "none", "fc" ], + "50000": [ "none", "rs" ] + }, + "4": { + "40000": [ "none", "fc" ], + "100000": [ "none", "rs" ] + } + } + }, + "native-port-supported-speeds": { + "Ethernet0-127": { + "4": ["100000","40000"] + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini new file mode 100644 index 000000000000..77deb1931856 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed +Ethernet0 33,34 QSFP1/1 1 100000 +Ethernet2 35,36 QSFP1/2 1 100000 +Ethernet4 37,38 QSFP1/3 1 100000 +Ethernet6 39,40 QSFP1/4 1 100000 +Ethernet8 41,42 QSFP2/1 2 100000 +Ethernet10 43,44 QSFP2/2 2 100000 +Ethernet12 45,46 QSFP2/3 2 100000 +Ethernet14 47,48 QSFP2/4 2 100000 +Ethernet16 49,50 QSFP3/1 3 100000 +Ethernet18 51,52 QSFP3/2 3 100000 +Ethernet20 53,54 QSFP3/3 3 100000 +Ethernet22 55,56 QSFP3/4 3 100000 +Ethernet24 57,58 QSFP4/1 4 100000 +Ethernet26 59,60 QSFP4/2 4 100000 +Ethernet28 61,62 QSFP4/3 4 100000 +Ethernet30 63,64 QSFP4/4 4 100000 +Ethernet32 65,66 QSFP5/1 5 100000 +Ethernet34 67,68 QSFP5/2 5 100000 +Ethernet36 69,70 QSFP5/3 5 100000 +Ethernet38 71,72 QSFP5/4 5 100000 +Ethernet40 73,74 QSFP6/1 6 100000 +Ethernet42 75,76 QSFP6/2 6 100000 +Ethernet44 77,78 QSFP6/3 6 100000 +Ethernet46 79,80 QSFP6/4 6 100000 +Ethernet48 81,82 QSFP7/1 7 100000 +Ethernet50 83,84 QSFP7/2 7 100000 +Ethernet52 85,86 QSFP7/3 7 100000 +Ethernet54 87,88 QSFP7/4 7 100000 +Ethernet56 89,90 QSFP8/1 8 100000 +Ethernet58 91,92 QSFP8/2 8 100000 +Ethernet60 93,94 QSFP8/3 8 100000 +Ethernet62 95,96 QSFP8/4 8 100000 +Ethernet64 1,2 QSFP9/1 9 100000 +Ethernet66 3,4 QSFP9/2 9 100000 +Ethernet68 5,6 QSFP9/3 9 100000 +Ethernet70 7,8 QSFP9/4 9 100000 +Ethernet72 9,10 QSFP10/1 10 100000 +Ethernet74 11,12 QSFP10/2 10 100000 +Ethernet76 13,14 QSFP10/3 10 100000 +Ethernet78 15,16 QSFP10/4 10 100000 +Ethernet80 17,18 QSFP11/1 11 100000 +Ethernet82 19,20 QSFP11/2 11 100000 +Ethernet84 21,22 QSFP11/3 11 100000 +Ethernet86 23,24 QSFP11/4 11 100000 +Ethernet88 25,26 QSFP12/1 12 100000 +Ethernet90 27,28 QSFP12/2 12 100000 +Ethernet92 29,30 QSFP12/3 12 100000 +Ethernet94 31,32 QSFP12/4 12 100000 +Ethernet96 97,98 QSFP13/1 13 100000 +Ethernet98 99,100 QSFP13/2 13 100000 +Ethernet100 101,102 QSFP13/3 13 100000 +Ethernet102 103,104 QSFP13/4 13 100000 +Ethernet104 105,106 QSFP14/1 14 100000 +Ethernet106 107,108 QSFP14/2 14 100000 +Ethernet108 109,110 QSFP14/3 14 100000 +Ethernet110 111,112 QSFP14/4 14 100000 +Ethernet112 113,114 QSFP15/1 15 100000 +Ethernet114 115,116 QSFP15/2 15 100000 +Ethernet116 117,118 QSFP15/3 15 100000 +Ethernet118 119,120 QSFP15/4 15 100000 +Ethernet120 121,122 QSFP16/1 16 100000 +Ethernet122 123,124 QSFP16/2 16 100000 +Ethernet124 125,126 QSFP16/3 16 100000 +Ethernet126 127,128 QSFP16/4 16 100000 +Ethernet128 129,130 QSFP17/1 17 100000 +Ethernet130 131,132 QSFP17/2 17 100000 +Ethernet132 133,134 QSFP17/3 17 100000 +Ethernet134 135,136 QSFP17/4 17 100000 +Ethernet136 137,138 QSFP18/1 18 100000 +Ethernet138 139,140 QSFP18/2 18 100000 +Ethernet140 141,142 QSFP18/3 18 100000 +Ethernet142 143,144 QSFP18/4 18 100000 +Ethernet144 145,146 QSFP19/1 19 100000 +Ethernet146 147,148 QSFP19/2 19 100000 +Ethernet148 149,150 QSFP19/3 19 100000 +Ethernet150 151,152 QSFP19/4 19 100000 +Ethernet152 153,154 QSFP20/1 20 100000 +Ethernet154 155,156 QSFP20/2 20 100000 +Ethernet156 157,158 QSFP20/3 20 100000 +Ethernet158 159,160 QSFP20/4 20 100000 +Ethernet160 225,226 QSFP21/1 21 100000 +Ethernet162 227,228 QSFP21/2 21 100000 +Ethernet164 229,230 QSFP21/3 21 100000 +Ethernet166 231,232 QSFP21/4 21 100000 +Ethernet168 233,234 QSFP22/1 22 100000 +Ethernet170 235,236 QSFP22/2 22 100000 +Ethernet172 237,238 QSFP22/3 22 100000 +Ethernet174 239,240 QSFP22/4 22 100000 +Ethernet176 241,242 QSFP23/1 23 100000 +Ethernet178 243,244 QSFP23/2 23 100000 +Ethernet180 245,246 QSFP23/3 23 100000 +Ethernet182 247,248 QSFP23/4 23 100000 +Ethernet184 249,250 QSFP24/1 24 100000 +Ethernet186 251,252 QSFP24/2 24 100000 +Ethernet188 253,254 QSFP24/3 24 100000 +Ethernet190 255,256 QSFP24/4 24 100000 +Ethernet192 161,162 QSFP25/1 25 100000 +Ethernet194 163,164 QSFP25/2 25 100000 +Ethernet196 165,166 QSFP25/3 25 100000 +Ethernet198 167,168 QSFP25/4 25 100000 +Ethernet200 169,170 QSFP26/1 26 100000 +Ethernet202 171,172 QSFP26/2 26 100000 +Ethernet204 173,174 QSFP26/3 26 100000 +Ethernet206 175,176 QSFP26/4 26 100000 +Ethernet208 177,178 QSFP27/1 27 100000 +Ethernet210 179,180 QSFP27/2 27 100000 +Ethernet212 181,182 QSFP27/3 27 100000 +Ethernet214 183,184 QSFP27/4 27 100000 +Ethernet216 185,186 QSFP28/1 28 100000 +Ethernet218 187,188 QSFP28/2 28 100000 +Ethernet220 189,190 QSFP28/3 28 100000 +Ethernet222 191,192 QSFP28/4 28 100000 +Ethernet224 193,194 QSFP29/1 29 100000 +Ethernet226 195,196 QSFP29/2 29 100000 +Ethernet228 197,198 QSFP29/3 29 100000 +Ethernet230 199,200 QSFP29/4 29 100000 +Ethernet232 201,202 QSFP30/1 30 100000 +Ethernet234 203,204 QSFP30/2 30 100000 +Ethernet236 205,206 QSFP30/3 30 100000 +Ethernet238 207,208 QSFP30/4 30 100000 +Ethernet240 209,210 QSFP31/1 31 100000 +Ethernet242 211,212 QSFP31/2 31 100000 +Ethernet244 213,214 QSFP31/3 31 100000 +Ethernet246 215,216 QSFP31/4 31 100000 +Ethernet248 217,218 QSFP32/1 32 100000 +Ethernet250 219,220 QSFP32/2 32 100000 +Ethernet252 221,222 QSFP32/3 32 100000 +Ethernet254 223,224 QSFP32/4 32 100000 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 new file mode 100644 index 000000000000..3e548325ea30 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile new file mode 100644 index 000000000000..483e85c0c1fa --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-128x100G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm new file mode 100644 index 000000000000..2aa1955c10bc --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm @@ -0,0 +1,445 @@ +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe +ccm_dma_enable=0 +ccmdma_intr_enable=0 +ctr_evict_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 +pll_bypass=1 + +port_fec=3 + +init_all_modules=0 + +sai_tunnel_global_sip_mask_enable=1 + +portmap_20=33:100:2 +portmap_21=35:100:2 +portmap_22=37:100:2 +portmap_23=39:100:2 + +portmap_24=41:100:2 +portmap_25=43:100:2 +portmap_26=45:100:2 +portmap_27=47:100:2 + +portmap_28=49:100:2 +portmap_29=51:100:2 +portmap_30=53:100:2 +portmap_31=55:100:2 + +portmap_32=57:100:2 +portmap_33=59:100:2 +portmap_34=61:100:2 +portmap_35=63:100:2 + +portmap_40=65:100:2 +portmap_41=67:100:2 +portmap_42=69:100:2 +portmap_43=71:100:2 + +portmap_44=73:100:2 +portmap_45=75:100:2 +portmap_46=77:100:2 +portmap_47=79:100:2 + +portmap_48=81:100:2 +portmap_49=83:100:2 +portmap_50=85:100:2 +portmap_51=87:100:2 + +portmap_52=89:100:2 +portmap_53=91:100:2 +portmap_54=93:100:2 +portmap_55=95:100:2 + +portmap_1=1:100:2 +portmap_2=3:100:2 +portmap_3=5:100:2 +portmap_4=7:100:2 + +portmap_5=9:100:2 +portmap_6=11:100:2 +portmap_7=13:100:2 +portmap_8=15:100:2 + +portmap_9=17:100:2 +portmap_10=19:100:2 +portmap_11=21:100:2 +portmap_12=23:100:2 + +portmap_13=25:100:2 +portmap_14=27:100:2 +portmap_15=29:100:2 +portmap_16=31:100:2 + +portmap_60=97:100:2 +portmap_61=99:100:2 +portmap_62=101:100:2 +portmap_63=103:100:2 + +portmap_64=105:100:2 +portmap_65=107:100:2 +portmap_66=109:100:2 +portmap_67=111:100:2 + +portmap_68=113:100:2 +portmap_69=115:100:2 +portmap_70=117:100:2 +portmap_71=119:100:2 + +portmap_72=121:100:2 +portmap_73=123:100:2 +portmap_74=125:100:2 +portmap_75=127:100:2 + +portmap_80=129:100:2 +portmap_81=131:100:2 +portmap_82=133:100:2 +portmap_83=135:100:2 + +portmap_84=137:100:2 +portmap_85=139:100:2 +portmap_86=141:100:2 +portmap_87=143:100:2 + +portmap_88=145:100:2 +portmap_89=147:100:2 +portmap_90=149:100:2 +portmap_91=151:100:2 + +portmap_92=153:100:2 +portmap_93=155:100:2 +portmap_94=157:100:2 +portmap_95=159:100:2 + +portmap_140=225:100:2 +portmap_141=227:100:2 +portmap_142=229:100:2 +portmap_143=231:100:2 + +portmap_144=233:100:2 +portmap_145=235:100:2 +portmap_146=237:100:2 +portmap_147=239:100:2 + +portmap_148=241:100:2 +portmap_149=243:100:2 +portmap_150=245:100:2 +portmap_151=247:100:2 + +portmap_152=249:100:2 +portmap_153=251:100:2 +portmap_154=253:100:2 +portmap_155=255:100:2 + +portmap_100=161:100:2 +portmap_101=163:100:2 +portmap_102=165:100:2 +portmap_103=167:100:2 + +portmap_104=169:100:2 +portmap_105=171:100:2 +portmap_106=173:100:2 +portmap_107=175:100:2 + +portmap_108=177:100:2 +portmap_109=179:100:2 +portmap_110=181:100:2 +portmap_111=183:100:2 + +portmap_112=185:100:2 +portmap_113=187:100:2 +portmap_114=189:100:2 +portmap_115=191:100:2 + +portmap_120=193:100:2 +portmap_121=195:100:2 +portmap_122=197:100:2 +portmap_123=199:100:2 + +portmap_124=201:100:2 +portmap_125=203:100:2 +portmap_126=205:100:2 +portmap_127=207:100:2 + +portmap_128=209:100:2 +portmap_129=211:100:2 +portmap_130=213:100:2 +portmap_131=215:100:2 + +portmap_132=217:100:2 +portmap_133=219:100:2 +portmap_134=221:100:2 +portmap_135=223:100:2 + +phy_chain_rx_lane_map_physical{33.0}=0x65732041 +phy_chain_tx_lane_map_physical{33.0}=0x47206531 +phy_chain_rx_lane_map_physical{41.0}=0x07561243 +phy_chain_tx_lane_map_physical{41.0}=0x36207514 +phy_chain_rx_lane_map_physical{49.0}=0x54632071 +phy_chain_tx_lane_map_physical{49.0}=0x06241735 +phy_chain_rx_lane_map_physical{57.0}=0x07561243 +phy_chain_tx_lane_map_physical{57.0}=0x35207614 +phy_chain_rx_lane_map_physical{65.0}=0x45623170 +phy_chain_tx_lane_map_physical{65.0}=0x51260734 +phy_chain_rx_lane_map_physical{73.0}=0x07561243 +phy_chain_tx_lane_map_physical{73.0}=0x37245610 +phy_chain_rx_lane_map_physical{81.0}=0x45632071 +phy_chain_tx_lane_map_physical{81.0}=0x51260734 +phy_chain_rx_lane_map_physical{89.0}=0x07561243 +phy_chain_tx_lane_map_physical{89.0}=0x26437510 +phy_chain_rx_lane_map_physical{1.0}=0x30176524 +phy_chain_tx_lane_map_physical{1.0}=0x20615374 +phy_chain_rx_lane_map_physical{9.0}=0x37562041 +phy_chain_tx_lane_map_physical{9.0}=0x05176432 +phy_chain_rx_lane_map_physical{17.0}=0x43607251 +phy_chain_tx_lane_map_physical{17.0}=0x70261435 +phy_chain_rx_lane_map_physical{25.0}=0x60347125 +phy_chain_tx_lane_map_physical{25.0}=0x46357120 +phy_chain_rx_lane_map_physical{97.0}=0x47601352 +phy_chain_tx_lane_map_physical{97.0}=0x04265137 +phy_chain_rx_lane_map_physical{105.0}=0x73206415 +phy_chain_tx_lane_map_physical{105.0}=0x26374150 +phy_chain_rx_lane_map_physical{113.0}=0x47632051 +phy_chain_tx_lane_map_physical{113.0}=0x03254617 +phy_chain_rx_lane_map_physical{121.0}=0x63027415 +phy_chain_tx_lane_map_physical{121.0}=0x63721045 +phy_chain_rx_lane_map_physical{129.0}=0x30154627 +phy_chain_tx_lane_map_physical{129.0}=0x04735261 +phy_chain_rx_lane_map_physical{137.0}=0x24753061 +phy_chain_tx_lane_map_physical{137.0}=0x37614520 +phy_chain_rx_lane_map_physical{145.0}=0x47601352 +phy_chain_tx_lane_map_physical{145.0}=0x63274510 +phy_chain_rx_lane_map_physical{153.0}=0x07361524 +phy_chain_tx_lane_map_physical{153.0}=0x36527104 +phy_chain_rx_lane_map_physical{225.0}=0x56410273 +phy_chain_tx_lane_map_physical{225.0}=0x10274635 +phy_chain_rx_lane_map_physical{233.0}=0x15740263 +phy_chain_tx_lane_map_physical{233.0}=0x24351607 +phy_chain_rx_lane_map_physical{241.0}=0x74015263 +phy_chain_tx_lane_map_physical{241.0}=0x04152637 +phy_chain_rx_lane_map_physical{249.0}=0x62037514 +phy_chain_tx_lane_map_physical{249.0}=0x72453160 +phy_chain_rx_lane_map_physical{161.0}=0x46510273 +phy_chain_tx_lane_map_physical{161.0}=0x01653724 +phy_chain_rx_lane_map_physical{169.0}=0x25743160 +phy_chain_tx_lane_map_physical{169.0}=0x07216435 +phy_chain_rx_lane_map_physical{177.0}=0x46510273 +phy_chain_tx_lane_map_physical{177.0}=0x01652734 +phy_chain_rx_lane_map_physical{185.0}=0x25743160 +phy_chain_tx_lane_map_physical{185.0}=0x37016425 +phy_chain_rx_lane_map_physical{193.0}=0x46510372 +phy_chain_tx_lane_map_physical{193.0}=0x06153724 +phy_chain_rx_lane_map_physical{201.0}=0x25743160 +phy_chain_tx_lane_map_physical{201.0}=0x36017524 +phy_chain_rx_lane_map_physical{209.0}=0x47601352 +phy_chain_tx_lane_map_physical{209.0}=0x04152736 +phy_chain_rx_lane_map_physical{217.0}=0x26453170 +phy_chain_tx_lane_map_physical{217.0}=0x36027415 + +serdes_core_rx_polarity_flip_physical{33}=0x29 +serdes_core_tx_polarity_flip_physical{33}=0xfe +serdes_core_rx_polarity_flip_physical{41}=0xb1 +serdes_core_tx_polarity_flip_physical{41}=0xe8 +serdes_core_rx_polarity_flip_physical{49}=0xca +serdes_core_tx_polarity_flip_physical{49}=0xb6 +serdes_core_rx_polarity_flip_physical{57}=0x9b +serdes_core_tx_polarity_flip_physical{57}=0xdc +serdes_core_rx_polarity_flip_physical{65}=0x17 +serdes_core_tx_polarity_flip_physical{65}=0x86 +serdes_core_rx_polarity_flip_physical{73}=0x9b +serdes_core_tx_polarity_flip_physical{73}=0x55 +serdes_core_rx_polarity_flip_physical{81}=0xa +serdes_core_tx_polarity_flip_physical{81}=0x6 +serdes_core_rx_polarity_flip_physical{89}=0x9b +serdes_core_tx_polarity_flip_physical{89}=0x48 +serdes_core_rx_polarity_flip_physical{1}=0xec +serdes_core_tx_polarity_flip_physical{1}=0x56 +serdes_core_rx_polarity_flip_physical{9}=0x13 +serdes_core_tx_polarity_flip_physical{9}=0xa6 +serdes_core_rx_polarity_flip_physical{17}=0x5a +serdes_core_tx_polarity_flip_physical{17}=0xc6 +serdes_core_rx_polarity_flip_physical{25}=0xf +serdes_core_tx_polarity_flip_physical{25}=0x4e +serdes_core_rx_polarity_flip_physical{97}=0x17 +serdes_core_tx_polarity_flip_physical{97}=0x2e +serdes_core_rx_polarity_flip_physical{105}=0xce +serdes_core_tx_polarity_flip_physical{105}=0x7c +serdes_core_rx_polarity_flip_physical{113}=0xa +serdes_core_tx_polarity_flip_physical{113}=0x35 + +serdes_core_rx_polarity_flip_physical{121}=0xb9 +serdes_core_tx_polarity_flip_physical{121}=0xef +serdes_core_rx_polarity_flip_physical{129}=0xe8 +serdes_core_tx_polarity_flip_physical{129}=0xac +serdes_core_rx_polarity_flip_physical{137}=0xcb +serdes_core_tx_polarity_flip_physical{137}=0x9c +serdes_core_rx_polarity_flip_physical{145}=0x17 +serdes_core_tx_polarity_flip_physical{145}=0x32 +serdes_core_rx_polarity_flip_physical{153}=0xb9 +serdes_core_tx_polarity_flip_physical{153}=0xaf +serdes_core_rx_polarity_flip_physical{225}=0xaa +serdes_core_tx_polarity_flip_physical{225}=0x7 +serdes_core_rx_polarity_flip_physical{233}=0x31 +serdes_core_tx_polarity_flip_physical{233}=0x47 +serdes_core_rx_polarity_flip_physical{241}=0xe8 +serdes_core_tx_polarity_flip_physical{241}=0x9e +serdes_core_rx_polarity_flip_physical{249}=0xec +serdes_core_tx_polarity_flip_physical{249}=0x1f +serdes_core_rx_polarity_flip_physical{161}=0x6a +serdes_core_tx_polarity_flip_physical{161}=0xd4 +serdes_core_rx_polarity_flip_physical{169}=0x9e +serdes_core_tx_polarity_flip_physical{169}=0x7b +serdes_core_rx_polarity_flip_physical{177}=0x6a +serdes_core_tx_polarity_flip_physical{177}=0xcc +serdes_core_rx_polarity_flip_physical{185}=0x9e +serdes_core_tx_polarity_flip_physical{185}=0x58 +serdes_core_rx_polarity_flip_physical{193}=0x6f +serdes_core_tx_polarity_flip_physical{193}=0x24 +serdes_core_rx_polarity_flip_physical{201}=0x9e +serdes_core_tx_polarity_flip_physical{201}=0xdf +serdes_core_rx_polarity_flip_physical{209}=0x17 +serdes_core_tx_polarity_flip_physical{209}=0xe9 +serdes_core_rx_polarity_flip_physical{217}=0xec +serdes_core_tx_polarity_flip_physical{217}=0x68 + + +#dport_map_port_20=1 +#dport_map_port_21=2 +#dport_map_port_22=3 +#dport_map_port_23=4 +#dport_map_port_24=5 +#dport_map_port_25=6 +#dport_map_port_26=7 +#dport_map_port_27=8 +#dport_map_port_28=9 +#dport_map_port_29=10 +#dport_map_port_30=11 +#dport_map_port_31=12 +#dport_map_port_32=13 +#dport_map_port_33=14 +#dport_map_port_34=15 +#dport_map_port_35=16 +#dport_map_port_40=17 +#dport_map_port_41=18 +#dport_map_port_42=19 +#dport_map_port_43=20 +#dport_map_port_44=21 +#dport_map_port_45=22 +#dport_map_port_46=23 +#dport_map_port_47=24 +#dport_map_port_48=25 +#dport_map_port_49=26 +#dport_map_port_50=27 +#dport_map_port_51=28 +#dport_map_port_52=29 +#dport_map_port_53=30 +#dport_map_port_54=31 +#dport_map_port_55=32 +#dport_map_port_1=33 +#dport_map_port_2=34 +#dport_map_port_3=35 +#dport_map_port_4=36 +#dport_map_port_5=37 +#dport_map_port_6=38 +#dport_map_port_7=39 +#dport_map_port_8=40 +#dport_map_port_9=41 +#dport_map_port_10=42 +#dport_map_port_11=43 +#dport_map_port_12=44 +#dport_map_port_13=45 +#dport_map_port_14=46 +#dport_map_port_15=47 +#dport_map_port_16=48 +#dport_map_port_60=49 +#dport_map_port_61=50 +#dport_map_port_62=51 +#dport_map_port_63=52 +#dport_map_port_64=53 +#dport_map_port_65=54 +#dport_map_port_66=55 +#dport_map_port_67=56 +#dport_map_port_68=57 +#dport_map_port_69=58 +#dport_map_port_70=59 +#dport_map_port_71=60 +#dport_map_port_72=61 +#dport_map_port_73=62 +#dport_map_port_74=63 +#dport_map_port_75=64 +#dport_map_port_80=65 +#dport_map_port_81=66 +#dport_map_port_82=67 +#dport_map_port_83=68 +#dport_map_port_84=69 +#dport_map_port_85=70 +#dport_map_port_86=71 +#dport_map_port_87=72 +#dport_map_port_88=73 +#dport_map_port_89=74 +#dport_map_port_90=75 +#dport_map_port_91=76 +#dport_map_port_92=77 +#dport_map_port_93=78 +#dport_map_port_94=79 +#dport_map_port_95=80 +#dport_map_port_140=81 +#dport_map_port_141=82 +#dport_map_port_142=83 +#dport_map_port_143=84 +#dport_map_port_144=85 +#dport_map_port_145=86 +#dport_map_port_146=87 +#dport_map_port_147=88 +#dport_map_port_148=89 +#dport_map_port_149=90 +#dport_map_port_150=91 +#dport_map_port_151=92 +#dport_map_port_152=93 +#dport_map_port_153=94 +#dport_map_port_154=95 +#dport_map_port_155=96 +#dport_map_port_100=97 +#dport_map_port_101=98 +#dport_map_port_102=99 +#dport_map_port_103=100 +#dport_map_port_104=101 +#dport_map_port_105=102 +#dport_map_port_106=103 +#dport_map_port_107=104 +#dport_map_port_108=105 +#dport_map_port_109=106 +#dport_map_port_110=107 +#dport_map_port_111=108 +#dport_map_port_112=109 +#dport_map_port_113=110 +#dport_map_port_114=111 +#dport_map_port_115=112 +#dport_map_port_120=113 +#dport_map_port_121=114 +#dport_map_port_122=115 +#dport_map_port_123=116 +#dport_map_port_124=117 +#dport_map_port_125=118 +#dport_map_port_126=119 +#dport_map_port_127=120 +#dport_map_port_128=121 +#dport_map_port_129=122 +#dport_map_port_130=123 +#dport_map_port_131=124 +#dport_map_port_132=125 +#dport_map_port_133=126 +#dport_map_port_134=127 +#dport_map_port_135=128 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 + +#firmware load method, use fast load +load_firmware=0x2 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin b/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin new file mode 100644 index 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+ "lane0": "0x00000000", + "lane4": "0x00000000", + "lane1": "0x00000000", + "lane5": "0x00000000", + "lane2": "0x00000000", + "lane6": "0x00000000", + "lane3": "0x00000000", + "lane7": "0x00000000" + } + }, + "25000-copper-3.0M": { + "pre1": { + "lane0": "0xffffffec", + "lane4": "0xffffffec", + "lane1": "0xffffffec", + "lane5": "0xffffffec", + "lane2": "0xffffffec", + "lane6": "0xffffffec", + "lane3": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x00000069", + "lane4": "0x00000069", + "lane1": "0x00000069", + "lane5": "0x00000069", + "lane2": "0x00000069", + "lane6": "0x00000069", + "lane3": "0x00000069", + "lane7": "0x00000069" + }, + "post1": { + "lane0": "0x00000000", + "lane4": "0x00000000", + "lane1": "0x00000000", + "lane5": "0x00000000", + "lane2": "0x00000000", + "lane6": "0x00000000", + "lane3": "0x00000000", + "lane7": "0x00000000" + } + }, + "25000-copper-5.0M": { + "pre1": { + "lane0": "0xffffffec", + "lane4": "0xffffffec", + "lane1": "0xffffffec", + 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"0x00000000", + "lane1": "0x00000000", + "lane5": "0x00000000", + "lane2": "0x00000000", + "lane6": "0x00000000", + "lane3": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000001e", + "lane4": "0x0000001e", + "lane1": "0x0000001e", + "lane5": "0x0000001e", + "lane2": "0x0000001e", + "lane6": "0x0000001e", + "lane3": "0x0000001e", + "lane7": "0x0000001e" + }, + "post1": { + "lane0": "0x00000000", + "lane4": "0x00000000", + "lane1": "0x00000000", + "lane5": "0x00000000", + "lane2": "0x00000000", + "lane6": "0x00000000", + "lane3": "0x00000000", + "lane7": "0x00000000" + } + }, + "10000-copper-3.0M": { + "pre1": { + "lane0": "0x00000000", + "lane4": "0x00000000", + "lane1": "0x00000000", + "lane5": "0x00000000", + "lane2": "0x00000000", + "lane6": "0x00000000", + "lane3": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003c", + "lane4": "0x0000003c", + "lane1": "0x0000003c", + "lane5": "0x0000003c", + "lane2": "0x0000003c", + "lane6": "0x0000003c", + "lane3": "0x0000003c", + "lane7": "0x0000003c" + }, + "post1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "10000-copper-5.0M": { + "pre1": { + "lane0": "0xfffffffa", + "lane4": "0xfffffffa", + "lane1": "0xfffffffa", + "lane5": "0xfffffffa", + "lane2": "0xfffffffa", + "lane6": "0xfffffffa", + "lane3": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x00000057", + "lane4": "0x00000057", + "lane1": "0x00000057", + "lane5": "0x00000057", + "lane2": "0x00000057", + "lane6": "0x00000057", + "lane3": "0x00000057", + "lane7": "0x00000057" + }, + "post1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "10000-copper-7.0M": { + "pre1": { + "lane0": "0xfffffffa", + "lane4": "0xfffffffa", + "lane1": "0xfffffffa", + "lane5": "0xfffffffa", + "lane2": "0xfffffffa", + "lane6": "0xfffffffa", + "lane3": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x00000057", + "lane4": "0x00000057", + "lane1": "0x00000057", + "lane5": "0x00000057", + "lane2": "0x00000057", + "lane6": "0x00000057", + "lane3": "0x00000057", + "lane7": "0x00000057" + }, + "post1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "10000-optical": { + "pre1": { + "lane0": "0xfffffffe", + "lane4": "0xfffffffe", + "lane1": "0xfffffffe", + "lane5": "0xfffffffe", + "lane2": "0xfffffffe", + "lane6": "0xfffffffe", + "lane3": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004a", + "lane4": "0x0000004a", + "lane1": "0x0000004a", + "lane5": "0x0000004a", + "lane2": "0x0000004a", + "lane6": "0x0000004a", + "lane3": "0x0000004a", + "lane7": "0x0000004a" + }, + "post1": { + "lane0": "0xfffffff2", + "lane4": "0xfffffff2", + "lane1": "0xfffffff2", + "lane5": "0xfffffff2", + "lane2": "0xfffffff2", + "lane6": "0xfffffff2", + "lane3": "0xfffffff2", + "lane7": "0xfffffff2" + } + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml new file mode 100644 index 000000000000..0a4fcfbb29da --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml @@ -0,0 +1,35 @@ +- bus: '00' + dev: '1f' + fn: '3' + id: 8c22 + name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller (rev 05)' + +- bus: '04' + dev: '00' + fn: '0' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' + +- bus: '04' + dev: '00' + fn: '1' + id: 15ab + name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane' + +- bus: '06' + dev: '00' + fn: '0' + id: b980 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)' + +- bus: '0f' + dev: '00' + fn: '0' + id: 1533 + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)' + +- bus: '10' + dev: '00' + fn: '0' + id: 7021 + name: 'Memory controller: Xilinx Corporation Device 7021' diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..e17bdf2aee33 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json @@ -0,0 +1,188 @@ +{ + "XCVR": + { + "xcvr_present": { + "i2c": + { + "valmap-QSFP-DD": {"0": true,"1": false}, + "valmap-SFP+": { "0": true, "1": false} + } + } + }, + + "PSU": + { + "name": + { + "1": "PSU 1", + "2": "PSU 2" + }, + "fan_name": + { + "1": + { + "1": "PSU 1 Fan 1" + }, + "2": + { + "1": "PSU 2 Fan 1" + } + + }, + "thermal_name": + { + "1": "PSU 1 Temp1", + "2": "PSU 2 Temp1" + }, + "psu_present": + { + "bmc": + { + "valmap": {"1":true, "0":false} + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + "psu_fan_dir": + { + "bmc": + { + "valmap": {"1":"INTAKE", "0":"EXHAUST"} + }, + "i2c": + { + "valmap": + { + "TDPS-1500AB-A 6":"EXHAUST", + "SAC1500D12AA":"EXHAUST", + "TDPS-1500AB-6 B":"EXHAUST", + "TDPS-1500AB-6 D":"EXHAUST", + "TDPS-1500AB-6 E":"EXHAUST", + "SAC1500D12RA":"INTAKE", + "TDPS-1500AB-6 C":"INTAKE", + "TDPS-1500AB-7 C":"INTAKE" + } + } + }, + "psu_led_color": + { + "colmap": {"green":"green", "red":"red"} + }, + "psu_power_good": + { + "bmc": + { + "valmap": {"1":true} + }, + "i2c": + { + "valmap": {"1":true, "0": false} + } + }, + "PSU_FAN_MAX_SPEED":"29000" + }, + + "FAN": + { + "drawer_name": + { + "1": "Drawer 1", + "2": "Drawer 2", + "3": "Drawer 3", + "4": "Drawer 4", + "5": "Drawer 5", + "6": "Drawer 6", + "7": "Drawer 7" + }, + "name": + { + "1": + { + "1": "Fan 1 Front", + "2": "Fan 1 Rear" + }, + "2": + { + "1": "Fan 2 Front", + "2": "Fan 2 Rear" + }, + "3": + { + "1": "Fan 3 Front", + "2": "Fan 3 Rear" + }, + "4": + { + "1": "Fan 4 Front", + "2": "Fan 4 Rear" + }, + "5": + { + "1": "Fan 5 Front", + "2": "Fan 5 Rear" + }, + "6": + { + "1": "Fan 6 Front", + "2": "Fan 6 Rear" + }, + "7": + { + "1": "Fan 7 Front", + "2": "Fan 7 Rear" + } + }, + "direction": + { + "bmc": + { + "valmap": {"1":"INTAKE", "0":"EXHAUST"} + }, + "i2c": + { + "valmap": {"0":"INTAKE", "1":"EXHAUST"} + } + + }, + + "present": + { + "i2c": + { + "valmap": {"0":true, "1":false} + }, + "bmc": + { + "valmap": {"0":true, "1":false} + } + }, + + "FAN_MAX_RPM_SPEED": + { + "INTAKE": {"0": "32000", "1": "28000"}, + "EXHAUST": {"0": "32000", "1": "30200"} + }, + "pwm_to_duty_cycle": "lambda pwm: ((pwm*100)/255)", + "duty_cycle_to_pwm": "lambda dc: ((dc*255)/100)" + }, + + "THERMAL": + { + "NONE_BMC": + { + "temp1_high_threshold": + { + "PSU1_TEMP1": {"B2F": "116", "F2B": "116"}, + "PSU2_TEMP1": {"B2F": "116", "F2B": "116"}, + "TEMP_FB_U17": {"B2F": "56", "F2B": "N/A"}, + "TEMP_SW_U16": {"B2F": "N/A", "F2B": "59"}, + "XP0R8V_Temp": {"B2F": "125", "F2B": "125"}, + "VDD_CORE_Temp": {"B2F": "125", "F2B": "125"}, + "XP3R3V_L_Temp": {"B2F": "125", "F2B": "125"}, + "XP3R3V_R_Temp": {"B2F": "125", "F2B": "125"} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc new file mode 100644 index 000000000000..87647bff54f9 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc @@ -0,0 +1,2114 @@ +{ +"PLATFORM": +{ + "num_psus": 2, + "num_fantrays": 7, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 14, + "num_component": 11, + "bmc_present": "True", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + }, + "std_kos": + [ + "lpc_ich", + "i2c-dev", + "ipmi_devintf", + "ipmi_si", + "i2c_mux_pca954x", + "optoe", + "at24", + "i2c-i801" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_led_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fpgapci_driver", + "pddf_fpgapci_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module" + ], + "custom_kos": + [ + "pddf_custom_fpga_algo", + "pddf_custom_wdt" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + {"dev_name":"i2c-0", "dev":"SMBUS0"}, + {"dev_name":"pcie-0", "dev":"PCIE0"} + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x0"}, + "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", + "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xf"}, + "channel": + [ + {"chn":"9", "dev":"CPLD_S1"}, + {"chn":"9", "dev":"CPLD_S2"}, + {"chn":"10", "dev":"MUX1"}, + {"chn":"10", "dev":"MUX2"}, + {"chn":"10", "dev":"MUX3"}, + {"chn":"10", "dev":"MUX4"}, + {"chn":"11", "dev":"PORT33"}, + {"chn":"12", "dev":"PORT34"} + ] + } + }, + + "CPLD_S1": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x2", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT16"}, + {"chn":"1", "dev":"PORT13"}, + {"chn":"2", "dev":"PORT12"}, + {"chn":"3", "dev":"PORT10"}, + {"chn":"4", "dev":"PORT9"}, + {"chn":"5", "dev":"PORT14"}, + {"chn":"6", "dev":"PORT11"}, + {"chn":"7", "dev":"PORT7"} + ] + } + }, + + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0xa", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT20"}, + {"chn":"1", "dev":"PORT17"}, + {"chn":"2", "dev":"PORT22"}, + {"chn":"3", "dev":"PORT25"}, + {"chn":"4", "dev":"PORT19"}, + {"chn":"5", "dev":"PORT21"}, + {"chn":"6", "dev":"PORT24"}, + {"chn":"7", "dev":"PORT18"} + ] + } + }, + + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x12", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT3"}, + {"chn":"1", "dev":"PORT4"}, + {"chn":"2", "dev":"PORT1"}, + {"chn":"3", "dev":"PORT2"}, + {"chn":"4", "dev":"PORT8"}, + {"chn":"5", "dev":"PORT6"}, + {"chn":"6", "dev":"PORT5"}, + {"chn":"7", "dev":"PORT15"} + ] + } + }, + + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x1a", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT27"}, + {"chn":"1", "dev":"PORT32"}, + {"chn":"2", "dev":"PORT29"}, + {"chn":"3", "dev":"PORT31"}, + {"chn":"4", "dev":"PORT30"}, + {"chn":"5", "dev":"PORT23"}, + {"chn":"6", "dev":"PORT26"}, + {"chn":"7", "dev":"PORT28"} + ] + } + }, + + "PORT1": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"1"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT1-EEPROM" }, + {"itf":"control", "dev":"PORT1-CTRL" } + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"2"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT2-EEPROM" }, + {"itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + "PORT2-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT2-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + + "PORT3": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"3"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT3-EEPROM" }, + {"itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT3-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"4"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT4-EEPROM" }, + {"itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT4-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT5": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"5"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT5-EEPROM" }, + {"itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + "PORT5-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT5-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"6"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT6-EEPROM" }, + {"itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT6-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT7": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"7"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT7-EEPROM" }, + {"itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT7-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x8", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT8": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"8"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT8-EEPROM" }, + {"itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT8-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"9"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT9-EEPROM" }, + {"itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT9-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX1", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x5", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"10"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT10-EEPROM" }, + {"itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT10-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX1", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x4", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT11": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"11"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT11-EEPROM" }, + {"itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT11-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX1", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x7", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"12"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT12-EEPROM" }, + {"itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT12-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX1", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x3", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"13"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT13-EEPROM" }, + {"itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT13-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX1", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"14"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT14-EEPROM" }, + {"itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT14-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX1", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"15"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT15-EEPROM" }, + {"itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT15-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX3", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX1"}, + "dev_attr": {"dev_idx":"16"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT16-EEPROM" }, + {"itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT16-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX1", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"17"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT17-EEPROM" }, + {"itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT17-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX2", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0xa", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"18"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT18-EEPROM" }, + {"itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT18-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX2", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"19"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT19-EEPROM" }, + {"itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT19-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX2", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0xd", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"20"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT20-EEPROM" }, + {"itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT20-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX2", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x9", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"21"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT21-EEPROM" }, + {"itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT21-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX2", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0xe", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"22"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT22-EEPROM" }, + {"itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT22-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX2", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0xb", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"23"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT23-EEPROM" }, + {"itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT23-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX4", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"24"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT24-EEPROM" }, + {"itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0xf", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT24-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX2", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0xf", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX2"}, + "dev_attr": {"dev_idx":"25"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT25-EEPROM" }, + {"itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT25-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX2", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0xc", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"26"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT26-EEPROM" }, + {"itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT26-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT27": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"27"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT27-EEPROM" }, + {"itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT27-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT28": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"28"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT28-EEPROM" }, + {"itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT28-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"29"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT29-EEPROM" }, + {"itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT29-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"30"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT30-EEPROM" }, + {"itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"31"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT31-EEPROM" }, + {"itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT31-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT32": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"32"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT32-EEPROM" }, + {"itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT32-CTRL": + { + "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"33"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT33-EEPROM"}, + {"itf":"control", "dev":"PORT33-CTRL"} + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT33-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PORT34": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"34"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT34-EEPROM" }, + {"itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT34-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": {"device_type":"PSU"}, + "dev_attr": {"dev_idx":"0", "num_psu_fans": "1"}, + "bmc": { + "ipmitool": { + "attr_list": + [ + {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"}, + {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"}, + {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"}, + {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw","raw": "1"}, + {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x30", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2E", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2F", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2B", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"}, + {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2C", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"}, + {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2C", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"}, + {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"}, + {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"}, + {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x30", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": {"device_type":"PSU"}, + "dev_attr": {"dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"}, + {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"}, + {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"}, + {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"}, + {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw", "raw": "1"}, + {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x39", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x37", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x38", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x33", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"}, + {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x31", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"}, + {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x32", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"}, + {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x34", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"}, + {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x35", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"}, + {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x35", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"}, + {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"}, + {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"}, + {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x39", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": {"device_type":"FAN"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"}, + {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"}, + {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"}, + {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"}, + {"attr_name":"fan9_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"}, + {"attr_name":"fan10_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"}, + {"attr_name":"fan11_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"}, + {"attr_name":"fan12_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"}, + {"attr_name":"fan13_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"}, + {"attr_name":"fan14_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"}, + {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"}, + {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"}, + {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"}, + {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"}, + {"attr_name":"fan9_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"}, + {"attr_name":"fan10_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"}, + {"attr_name":"fan11_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"}, + {"attr_name":"fan12_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"}, + {"attr_name":"fan13_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"}, + {"attr_name":"fan14_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"}, + {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan9_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan10_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan11_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan12_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan13_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"}, + {"attr_name":"fan14_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"}, + {"attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan9_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan10_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan11_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan12_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan13_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"}, + {"attr_name":"fan14_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 1 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2D", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2D", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 1 Temp3"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6A", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6A", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 2 Temp2"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x36", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x36", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"PSU 2 Temp3"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6B", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6B", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"CPU Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x5", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP6": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"ASIC Internal Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP7": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Fanboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + "TEMP8": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Switchboard Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x4", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP9": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 3.3v Chip Right Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x68", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x68", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP10": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 3.3v Chip Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x69", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x69", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP11": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"TPS536C7 Chip Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x66", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x66", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP12": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"MP2975 0.8v Chip Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"}, + {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x67", "type": "raw", "raw":"1", "offset":"5"} + ] + } + } + }, + "TEMP13": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Fanboard Center Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + "TEMP14": + { + "dev_info": {"device_type":"TEMP_SENSOR"}, + "dev_attr": {"display_name":"Switchboard Left Temp"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "type": "raw", "raw":"1", "offset":"0"} + ] + } + } + }, + + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "2"}, + {"attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "3"}, + {"attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": 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raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY2_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY2_LED"}, + "dev_attr": {"index":"1", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY3_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY3_LED"}, + "dev_attr": {"index":"2", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY4_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY4_LED"}, + "dev_attr": {"index":"3", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY5_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY5_LED"}, + "dev_attr": {"index":"4", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY6_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY6_LED"}, + "dev_attr": {"index":"5", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + }, + "FANTRAY7_LED": + { + "dev_info": {"device_type":"LED", "device_name":"FANTRAY7_LED"}, + "dev_attr": {"index":"6", "flag": "ro"}, + "bmc": { + "ipmitool" : { + "attr_list": + [ + {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "0"}, + {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "1"}, + {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "2"} + ] + } + } + } +} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc new file mode 100644 index 000000000000..f58c32095338 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc @@ -0,0 +1,2058 @@ +{ +"PLATFORM": +{ + "num_psus": 2, + "num_fantrays": 7, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 6, + "num_component": 8, + "bmc_present": "False", + "pddf_dev_types": + { + "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld", + "cpld_eeprom" + ], + "PSU": + [ + "psu_pmbus" + ], + "FAN": + [ + "fan_ctrl", + "fan_eeprom", + "fan_cpld" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ], + "FPGAPCIE": + [ + "fpgapci" + ] + }, + "std_kos": + [ + "lpc_ich", + "i2c-dev", + "ipmi_devintf", + "i2c_mux_pca954x", + "optoe", + "at24", + "i2c-i801" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_psu_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fpgapci_driver", + "pddf_fpgapci_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_fan_module" + ], + "custom_kos": + [ + "pddf_custom_led_module", + "pddf_custom_wdt", + "pddf_custom_fpga_algo", + "pddf_custom_fan_driver_module", + "pddf_custom_psu_driver_module", + "tps536c7" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + {"dev_name":"i2c-0", "dev":"SMBUS0"}, + {"dev_name":"pcie-0", "dev":"PCIE0"} + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24c64"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "PCIE0": + { + "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"}, + "i2c": + { + "DEVICES": + [ + {"dev": "FPGAPCIE0"} + ] + } + }, + + "FPGAPCIE0": + { + "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x0"}, + "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", + "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000", "virt_i2c_ch":"0xf"}, + "channel": + [ + {"chn":"1", "dev":"CPLD_B"}, + {"chn":"3", "dev":"TEMP1"}, + {"chn":"4", "dev":"TEMP2"}, + {"chn":"4", "dev":"TEMP3"}, + {"chn":"4", "dev":"TEMP4"}, + {"chn":"5", "dev":"CPLD_COME"}, + {"chn":"6", "dev":"MUX1"}, + {"chn":"7", "dev":"TEMP5"}, + {"chn":"8", "dev":"MUX2"}, + {"chn":"8", "dev":"FAN_CPLD"}, + {"chn":"8", "dev":"FAN-CTRL"}, + {"chn":"9", "dev":"CPLD_S1"}, + {"chn":"9", "dev":"CPLD_S2"}, + {"chn":"10", "dev":"MUX3"}, + {"chn":"10", "dev":"MUX4"}, + {"chn":"10", "dev":"MUX5"}, + {"chn":"10", "dev":"MUX6"}, + {"chn":"11", "dev":"PORT33"}, + {"chn":"12", "dev":"PORT34"} + ] + } + }, + + "CPLD_B": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x64", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_COME": + { + "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x68", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "FAN_CPLD": + { + "dev_info": { "device_type":"CPLD", "device_name":"FAN_CPLD", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x0d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S1": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "CPLD_S2": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "MUX1": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x69", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x01", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PSU1"}, + {"chn":"1", "dev":"PSU2"} + ] + } + }, + "MUX2": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6B", "dev_addr":"0x77", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x09", "idle_state": "-2"}, + "channel": + [ + {"chn":"7", "dev":"TEMP6"} + ] + } + }, + "MUX3": + { + "dev_info": {"device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x11", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT16"}, + {"chn":"1", "dev":"PORT13"}, + {"chn":"2", "dev":"PORT12"}, + {"chn":"3", "dev":"PORT10"}, + {"chn":"4", "dev":"PORT9"}, + {"chn":"5", "dev":"PORT14"}, + {"chn":"6", "dev":"PORT11"}, + {"chn":"7", "dev":"PORT7"} + ] + } + }, + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x19", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT20"}, + {"chn":"1", "dev":"PORT17"}, + {"chn":"2", "dev":"PORT22"}, + {"chn":"3", "dev":"PORT25"}, + {"chn":"4", "dev":"PORT19"}, + {"chn":"5", "dev":"PORT21"}, + {"chn":"6", "dev":"PORT24"}, + {"chn":"7", "dev":"PORT18"} + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x21", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT3"}, + {"chn":"1", "dev":"PORT4"}, + {"chn":"2", "dev":"PORT1"}, + {"chn":"3", "dev":"PORT2"}, + {"chn":"4", "dev":"PORT8"}, + {"chn":"5", "dev":"PORT6"}, + {"chn":"6", "dev":"PORT5"}, + {"chn":"7", "dev":"PORT15"} + ] + } + }, + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": {"virt_bus":"0x29", "idle_state": "-2"}, + "channel": + [ + {"chn":"0", "dev":"PORT27"}, + {"chn":"1", "dev":"PORT32"}, + {"chn":"2", "dev":"PORT29"}, + {"chn":"3", "dev":"PORT31"}, + {"chn":"4", "dev":"PORT30"}, + {"chn":"5", "dev":"PORT23"}, + {"chn":"6", "dev":"PORT26"}, + {"chn":"7", "dev":"PORT28"} + ] + } + }, + + "PORT1": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"1"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT1-EEPROM" }, + {"itf":"control", "dev":"PORT1-CTRL" } + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX5", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": {"parent_bus":"0x23", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT2": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"2"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT2-EEPROM" }, + {"itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + "PORT2-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT2-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX5", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": {"parent_bus":"0x24", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT3": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"3"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT3-EEPROM" }, + {"itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT3-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX5", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": {"parent_bus":"0x21", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT4": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"4"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT4-EEPROM" }, + {"itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT4-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX5", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": {"parent_bus":"0x22", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT5": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"5"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT5-EEPROM" }, + {"itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + "PORT5-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT5-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX5", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": {"parent_bus":"0x27", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT6": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"6"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT6-EEPROM" }, + {"itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT6-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX5", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": {"parent_bus":"0x26", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT7": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"7"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT7-EEPROM" }, + {"itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT7-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": {"parent_bus":"0x18", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT8": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"8"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT8-EEPROM" }, + {"itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT8-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX5", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": {"parent_bus":"0x25", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT9": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"9"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT9-EEPROM" }, + {"itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT9-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX3", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": {"parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT10": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"10"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT10-EEPROM" }, + {"itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT10-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX3", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": {"parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT11": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"11"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT11-EEPROM" }, + {"itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT11-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX3", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": {"parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT12": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"12"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT12-EEPROM" }, + {"itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT12-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX3", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": {"parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT13": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"13"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT13-EEPROM" }, + {"itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT13-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX3", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": {"parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT14": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"14"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT14-EEPROM" }, + {"itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT14-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX3", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": {"parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT15": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX5"}, + "dev_attr": {"dev_idx":"15"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT15-EEPROM" }, + {"itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT15-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX5", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": {"parent_bus":"0x28", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT16": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX3"}, + "dev_attr": {"dev_idx":"16"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT16-EEPROM" }, + {"itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT16-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX3", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": {"parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT17": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"17"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT17-EEPROM" }, + {"itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT17-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX4", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT18": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"18"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT18-EEPROM" }, + {"itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT18-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX4", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": {"parent_bus":"0x20", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT19": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"19"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT19-EEPROM" }, + {"itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT19-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX4", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT20": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"20"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT20-EEPROM" }, + {"itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT20-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX4", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": {"parent_bus":"0x19", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT21": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"21"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT21-EEPROM" }, + {"itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT21-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX4", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT22": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"22"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT22-EEPROM" }, + {"itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT22-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX4", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT23": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"23"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT23-EEPROM" }, + {"itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT23-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX6", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT24": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"24"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT24-EEPROM" }, + {"itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT24-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX4", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT25": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX4"}, + "dev_attr": {"dev_idx":"25"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT25-EEPROM" }, + {"itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT25-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT26": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"26"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT26-EEPROM" }, + {"itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT26-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT27": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"27"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT27-EEPROM" }, + {"itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT27-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": {"parent_bus":"0x29", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT28": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"28"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT28-EEPROM" }, + {"itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT28-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": {"parent_bus":"0x30", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT29": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"29"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT29-EEPROM" }, + {"itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT29-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT30": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"30"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT30-EEPROM" }, + {"itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + + "PORT30-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT31": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"31"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT31-EEPROM" }, + {"itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT31-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT32": + { + "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX6"}, + "dev_attr": {"dev_idx":"32"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT32-EEPROM" }, + {"itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe1"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT32-CTRL": + { + "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": {"parent_bus":"0x2a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"} + ] + } + }, + + "PORT33": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"33"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT33-EEPROM"}, + {"itf":"control", "dev":"PORT33-CTRL"} + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT33-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + "PORT34": + { + "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"dev_idx":"34"}, + "i2c": + { + "interface": + [ + {"itf":"eeprom", "dev":"PORT34-EEPROM" }, + {"itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + {"attr_name":"eeprom"} + ] + } + }, + "PORT34-CTRL": + { + "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU1-PMBUS"} + + ] + } + }, + + "PSU1-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x1", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "i2c": + { + "interface": + [ + {"itf":"pmbus", "dev":"PSU2-PMBUS"} + + ] + } + }, + + "PSU2-PMBUS": + { + "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x2", "dev_addr":"0x59", "dev_type":"psu_pmbus"}, + "attr_list": + [ + {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"}, + {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"}, + {"attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"}, + {"attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"}, + {"attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"}, + {"attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_v_out_min", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}, + {"attr_name":"psu_p_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"} + ] + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x66", "dev_type":"fan_cpld"}, + "dev_attr": { "num_fantrays":"7"}, + "attr_list": + [ + {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x20", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x21", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x30", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x40", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x41", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x50", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x51", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan9_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x60", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan10_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x61", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan11_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x70", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan12_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x71", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan13_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x80", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan14_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x81", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}, + {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan9_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan10_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan11_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan12_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan13_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan14_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"}, + {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan9_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan10_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan11_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan12_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan13_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan14_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"}, + {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan9_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan10_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan11_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan12_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan13_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}, + {"attr_name":"fan14_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"} + ] + } + }, + + "TEMP1": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"VDD_CORE_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x66", "dev_addr":"0x6c", "dev_type":"tps536c7"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP2": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP3R3V_L_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x76", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP3": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP3R3V_R_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x7b", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP4": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"XP0R8V_Temp"}, + "i2c": + { + "topo_info": { "parent_bus":"0x67", "dev_addr":"0x70", "dev_type":"mp2975"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP5": + { + "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"}, + "dev_attr": {"display_name":"TEMP_SW_U16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6A", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + "TEMP6": + { + "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"MUX2"}, + "dev_attr": { "display_name":"TEMP_FB_U17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x10", "dev_addr":"0x49", "dev_type":"lm75"}, + "attr_list": + [ + {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"}, + {"attr_name": "temp1_max_hyst"}, + {"attr_name": "temp1_input"} + ] + } + }, + + + "SYS_LED": + { + "dev_info": {"device_type":"LED", "device_name":"SYS_LED"}, + "dev_attr": {"index":"0"}, + "i2c": { + "attr_list": + [ + {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}, + {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"} + ] + } + }, + "FANTRAY1_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"0"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x24"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x24"} + ] + } + }, + "FANTRAY2_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"1"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x34"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x34"} + ] + } + }, + "FANTRAY3_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"2"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x44"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x44"} + ] + } + }, + "FANTRAY4_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"3"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x54"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x54"} + ] + } + }, + "FANTRAY5_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"4"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x64"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x64"} + ] + } + }, + "FANTRAY6_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"5"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x74"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x74"} + ] + } + }, + "FANTRAY7_LED": + { + "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"}, + "dev_attr": { "index":"6"}, + "i2c" : { + "attr_list": + [ + {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x84"}, + {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x84"} + ] + } + } +} + diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json new file mode 100644 index 000000000000..da5f089819ab --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json @@ -0,0 +1,914 @@ +{ + "chassis": { + "name": "Silverstone_v2", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "components": [ + { + "name": "BIOS" + }, + { + "name": "ONIE" + }, + { + "name": "BMC" + }, + { + "name": "FPGA" + }, + { + "name": "CPLD COMe" + }, + { + "name": "CPLD BASE" + }, + { + "name": "CPLD SW1" + }, + { + "name": "CPLD SW2" + }, + { + "name": "CPLD FAN" + }, + { + "name": "ASIC PCIe" + }, + { + "name": "SSD" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ], + "fan_drawers": [ + { + "name": "Fantray1", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray2", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray2_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray3", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray3_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray4", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray4_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray5", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray5_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray6", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray6_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray7", + "status_led": { + "controllable": true, + "colors": [ + "green", + "amber", + "off" + ] + }, + "fans": [ + { + "name": "Fantray7_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU 1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "PSU 2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth1/1"], + "2x100G": ["Eth1/1", "Eth1/5"], + "2x40G": ["Eth1/1", "Eth1/5"], + "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"], + "1x100G(2)": ["Eth1/1"], + "1x100G(4)": ["Eth1/1"], + "1x40G(4)": ["Eth1/1"], + "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"], + "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + 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"4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth11/1"], + "2x100G": ["Eth11/1", "Eth11/5"], + "2x40G": ["Eth11/1", "Eth11/5"], + "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"], + "1x100G(2)": ["Eth11/1"], + "1x100G(4)": ["Eth11/1"], + "1x40G(4)": ["Eth11/1"], + "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"], + "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth12/1"], + "2x100G": ["Eth12/1", "Eth12/5"], + "2x40G": ["Eth12/1", "Eth12/5"], + "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"], + "1x100G(2)": ["Eth12/1"], + "1x100G(4)": ["Eth12/1"], + "1x40G(4)": ["Eth12/1"], + "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"], + "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth13/1"], + "2x100G": ["Eth13/1", "Eth13/5"], + "2x40G": ["Eth13/1", "Eth13/5"], + "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"], + "1x100G(2)": ["Eth13/1"], + "1x100G(4)": ["Eth13/1"], + "1x40G(4)": ["Eth13/1"], + "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"], + "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth14/1"], + "2x100G": ["Eth14/1", "Eth14/5"], + "2x40G": ["Eth14/1", "Eth14/5"], + "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"], + "1x100G(2)": ["Eth14/1"], + "1x100G(4)": ["Eth14/1"], + "1x40G(4)": ["Eth14/1"], + "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"], + "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth15/1"], + "2x100G": ["Eth15/1", "Eth15/5"], + "2x40G": ["Eth15/1", "Eth15/5"], + "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"], + "1x100G(2)": ["Eth15/1"], + "1x100G(4)": ["Eth15/1"], + "1x40G(4)": ["Eth15/1"], + "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"], + "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth16/1"], + "2x100G": ["Eth16/1", "Eth16/5"], + "2x40G": ["Eth16/1", "Eth16/5"], + "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"], + "1x100G(2)": ["Eth16/1"], + "1x100G(4)": ["Eth16/1"], + "1x40G(4)": ["Eth16/1"], + "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"], + "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth17/1"], + "2x100G": ["Eth17/1", "Eth17/5"], + "2x40G": ["Eth17/1", "Eth17/5"], + "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"], + "1x100G(2)": ["Eth17/1"], + "1x100G(4)": ["Eth17/1"], + "1x40G(4)": ["Eth17/1"], + "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"], + "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth18/1"], + "2x100G": ["Eth18/1", "Eth18/5"], + "2x40G": ["Eth18/1", "Eth18/5"], + "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"], + "1x100G(2)": ["Eth18/1"], + "1x100G(4)": ["Eth18/1"], + "1x40G(4)": ["Eth18/1"], + "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"], + "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth19/1"], + "2x100G": ["Eth19/1", "Eth19/5"], + "2x40G": ["Eth19/1", "Eth19/5"], + "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"], + "1x100G(2)": ["Eth19/1"], + "1x100G(4)": ["Eth19/1"], + "1x40G(4)": ["Eth19/1"], + "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"], + "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth20/1"], + "2x100G": ["Eth20/1", "Eth20/5"], + "2x40G": ["Eth20/1", "Eth20/5"], + "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"], + "1x100G(2)": ["Eth20/1"], + "1x100G(4)": ["Eth20/1"], + "1x40G(4)": ["Eth20/1"], + "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"], + "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth21/1"], + "2x100G": ["Eth21/1", "Eth21/5"], + "2x40G": ["Eth21/1", "Eth21/5"], + "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"], + "1x100G(2)": ["Eth21/1"], + "1x100G(4)": ["Eth21/1"], + "1x40G(4)": ["Eth21/1"], + "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"], + "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth22/1"], + "2x100G": ["Eth22/1", "Eth22/5"], + "2x40G": ["Eth22/1", "Eth22/5"], + "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"], + "1x100G(2)": ["Eth22/1"], + "1x100G(4)": ["Eth22/1"], + "1x40G(4)": ["Eth22/1"], + "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"], + "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth23/1"], + "2x100G": ["Eth23/1", "Eth23/5"], + "2x40G": ["Eth23/1", "Eth23/5"], + "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"], + "1x100G(2)": ["Eth23/1"], + "1x100G(4)": ["Eth23/1"], + "1x40G(4)": ["Eth23/1"], + "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"], + "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth24/1"], + "2x100G": ["Eth24/1", "Eth24/5"], + "2x40G": ["Eth24/1", "Eth24/5"], + "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"], + "1x100G(2)": ["Eth24/1"], + "1x100G(4)": ["Eth24/1"], + "1x40G(4)": ["Eth24/1"], + "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"], + "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth25/1"], + "2x100G": ["Eth25/1", "Eth25/5"], + "2x40G": ["Eth25/1", "Eth25/5"], + "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"], + "1x100G(2)": ["Eth25/1"], + "1x100G(4)": ["Eth25/1"], + "1x40G(4)": ["Eth25/1"], + "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"], + "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth26/1"], + "2x100G": ["Eth26/1", "Eth26/5"], + "2x40G": ["Eth26/1", "Eth26/5"], + "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"], + "1x100G(2)": ["Eth26/1"], + "1x100G(4)": ["Eth26/1"], + "1x40G(4)": ["Eth26/1"], + "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"], + "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth27/1"], + "2x100G": ["Eth27/1", "Eth27/5"], + "2x40G": ["Eth27/1", "Eth27/5"], + "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"], + "1x100G(2)": ["Eth27/1"], + "1x100G(4)": ["Eth27/1"], + "1x40G(4)": ["Eth27/1"], + "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"], + "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth28/1"], + "2x100G": ["Eth28/1", "Eth28/5"], + "2x40G": ["Eth28/1", "Eth28/5"], + "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"], + "1x100G(2)": ["Eth28/1"], + "1x100G(4)": ["Eth28/1"], + "1x40G(4)": ["Eth28/1"], + "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"], + "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth29/1"], + "2x100G": ["Eth29/1", "Eth29/5"], + "2x40G": ["Eth29/1", "Eth29/5"], + "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"], + "1x100G(2)": ["Eth29/1"], + "1x100G(4)": ["Eth29/1"], + "1x40G(4)": ["Eth29/1"], + "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"], + "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth30/1"], + "2x100G": ["Eth30/1", "Eth30/5"], + "2x40G": ["Eth30/1", "Eth30/5"], + "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"], + "1x100G(2)": ["Eth30/1"], + "1x100G(4)": ["Eth30/1"], + "1x40G(4)": ["Eth30/1"], + "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"], + "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth31/1"], + "2x100G": ["Eth31/1", "Eth31/5"], + "2x40G": ["Eth31/1", "Eth31/5"], + "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"], + "1x100G(2)": ["Eth31/1"], + "1x100G(4)": ["Eth31/1"], + "1x40G(4)": ["Eth31/1"], + "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"], + "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth32/1"], + "2x100G": ["Eth32/1", "Eth32/5"], + "2x40G": ["Eth32/1", "Eth32/5"], + "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"], + "1x100G(2)": ["Eth32/1"], + "1x100G(4)": ["Eth32/1"], + "1x40G(4)": ["Eth32/1"], + "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"], + "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"] + } + } + } + +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc new file mode 100644 index 000000000000..8a187b11ffe0 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc @@ -0,0 +1,19 @@ +{ + "chassis": { + "DS4000-R 02": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "ASIC PCIe": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc new file mode 100644 index 000000000000..528b0c4dcbfb --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc @@ -0,0 +1,18 @@ +{ + "chassis": { + "DS4000": { + "component": { + "BIOS": {}, + "ONIE": {}, + "BMC": {}, + "FPGA": {}, + "CPLD COMe": {}, + "CPLD BASE": {}, + "CPLD SW1": {}, + "CPLD SW2": {}, + "CPLD FAN": {}, + "SSD": {} + } + } + } +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot new file mode 100755 index 000000000000..a3eef1d10ee2 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot @@ -0,0 +1,3 @@ +#!/bin/bash + +/usr/local/bin/silverstone_v2_platform_shutdown.sh system diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py new file mode 100644 index 000000000000..03bdb5262f2c --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py @@ -0,0 +1,20 @@ +############################################################################# +# Celestica Silverstone-v2 +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py new file mode 100644 index 000000000000..1b91409e82d7 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py @@ -0,0 +1,85 @@ +import os.path +import subprocess +import sys +import re + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + self.ipmi_sensor = "ipmitool sensor" + PsuBase.__init__(self) + + def run_command(self, command): + ret, data = subprocess.getstatusoutput(command) + if ret != 0: + sys.exit(ret) + else: + return data + + def find_value(self, grep_string): + result = re.search(".+\| (0x\d{2})\d{2}\|.+", grep_string) + if result: + return result.group(1) + else: + return result + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + return 2 + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is faulty + """ + if index is None: + return False + + grep_key = "PSUL_Status" if index == 1 else "PSUR_Status" + grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key) + status_byte = self.find_value(grep_string) + + if status_byte is None: + return False + + failure_detected = (int(status_byte, 16) >> 1) & 1 + input_lost = (int(status_byte, 16) >> 3) & 1 + if failure_detected or input_lost: + return False + else: + return True + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + if index is None: + return False + + grep_key = "PSUL_Status" if index == 1 else "PSUR_Status" + grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key) + status_byte = self.find_value(grep_string) + + if status_byte is None: + return False + + presence = (int(status_byte, 16) >> 0) & 1 + if presence: + return True + else: + return False diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py new file mode 100755 index 000000000000..7dd0ab18ae28 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py @@ -0,0 +1,179 @@ +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 33 + QSFP_PORT_START = 1 + QSFP_PORT_END = 32 + + EEPROM_OFFSET = 1 + PORT_INFO_PATH = '/sys/class/silverstonev2_fpga' + + _port_name = "" + _port_to_eeprom_mapping = {} + _port_to_i2cbus_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return list(range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1)) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def port_to_i2cbus_mapping(self): + return self._port_to_i2cbus_mapping + + def get_port_name(self, port_num): + if port_num in self.qsfp_ports: + self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1) + else: + self._port_name = "SFP" + str(port_num) + return self._port_name + + # def get_eeprom_dom_raw(self, port_num): + # if port_num in self.qsfp_ports: + # # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + # return None + # else: + # # Read dom eeprom at addr 0x51 + # return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256) + + def __init__(self): + # Override port_to_eeprom_mapping for class initialization + eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' + + for x in range(self.PORT_START, self.PORT_END+1): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_eeprom_mapping[x] = eeprom_path.format( + x + self.EEPROM_OFFSET) + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + + # Check for invalid port_num + if port_num not in list(range(self.port_start, self.port_end + 1)): + return False + + # Get path for access port presence status + port_name = self.get_port_name(port_num) + sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs" + reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename]) + + # Read status + try: + reg_file = open(reg_path) + content = reg_file.readline().rstrip() + reg_value = int(content) + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Module present is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Read status + content = reg_file.readline().rstrip() + reg_value = int(content, 16) + # ModPrsL is active low + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = hex(lpmode) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + # Check for invalid QSFP port_num + if port_num not in self.qsfp_ports: + return False + + try: + port_name = self.get_port_name(port_num) + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def get_transceiver_change_event(self, timeout=0): + """ + TBD: When the feature request. + """ + raise NotImplementedError diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py new file mode 100644 index 000000000000..374f13a684cd --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py @@ -0,0 +1,105 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/3/17 16:42 +# @Mail : J_Talong@163.com yajiang@celestica.com +# @Author : jiang tao + +from sonic_platform_base.sonic_ssd.ssd_base import SsdBase +from subprocess import Popen, PIPE +from re import findall +from os.path import exists + +NOT_AVAILABLE = "N/A" + + +class SsdUtil(SsdBase): + + def __init__(self, disk_dev): + """ + Constructor + Args: + disk_dev: Linux device name to get parameters for + """ + + super().__init__(disk_dev) + if not isinstance(disk_dev, str): + raise TypeError("disk dev type wrong {}".format(type(disk_dev))) + + if not exists(disk_dev): + raise RuntimeError("disk dev {} not found".format(disk_dev)) + + self.model = NOT_AVAILABLE + self.serial = NOT_AVAILABLE + self.firmware = NOT_AVAILABLE + self.temperature = NOT_AVAILABLE + self.health = NOT_AVAILABLE + + inno_disk = ["iSmart", "-d", disk_dev] + self.ssd_info = self._execute_shell(inno_disk) + + self.model = self._parse_re(r'Model Name:\s*(.+?)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'FW Version:\s*(.+?)\n', self.ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.ssd_info) + self.health = self._parse_re(r'Health:\s*(.+?)', self.ssd_info) + + @staticmethod + def _execute_shell(cmd): + process = Popen(cmd, universal_newlines=True, stdout=PIPE) + output, _ = process.communicate() + return output + + @staticmethod + def _parse_re(pattern, buffer): + res_list = findall(pattern, buffer) + return res_list[0] if res_list else NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + Returns: + A float number of current ssd health + e.g. 83.5 + """ + return self.health + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + return self.temperature + + def get_model(self): + """ + Retrieves model for the given disk device + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + Returns: + A string holding some vendor specific disk information + """ + return self.ssd_info diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..9a1f92753051 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true +} diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..5661a0d21396 --- /dev/null +++ b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature", + "PSU 1 Fan 1", + "PSU 2 Fan 1" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "alternate_blink_4hz" + } +} diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 4e86423bd7e8..b620c911cda6 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -54,7 +54,11 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(CEL_DX010_PLATFORM_MODULE) \ $(CEL_HALIBURTON_PLATFORM_MODULE) \ $(CEL_SEASTONE2_PLATFORM_MODULE) \ - $(CEL_BELGITE_PLATFORM_MODULE) \ + $(CEL_DS3000_PLATFORM_MODULE) \ + $(CEL_DS1000_PLATFORM_MODULE) \ + $(CEL_QUESTONE2_PLATFORM_MODULE) \ + $(CEL_SILVERSTONE_V2_PLATFORM_MODULE) \ + $(CEL_DS2000_PLATFORM_MODULE) \ $(DELTA_AG9032V1_PLATFORM_MODULE) \ $(DELTA_AG9064_PLATFORM_MODULE) \ $(DELTA_AG5648_PLATFORM_MODULE) \ diff --git a/platform/broadcom/platform-modules-cel.mk b/platform/broadcom/platform-modules-cel.mk index b25aeb7c0900..2db8560b8bf3 100644 --- a/platform/broadcom/platform-modules-cel.mk +++ b/platform/broadcom/platform-modules-cel.mk @@ -1,16 +1,24 @@ # Celestica DX010 and Haliburton Platform modules -CEL_DX010_PLATFORM_MODULE_VERSION = 0.9 -CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 0.9 -CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 0.9 -CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 0.9 -CEL_BELGITE_PLATFORM_MODULE_VERSION = 0.9 +CEL_DX010_PLATFORM_MODULE_VERSION = 1.0 +CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 1.0 +CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 1.0 +CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS1000_PLATFORM_MODULE_VERSION = 1.0 +CEL_QUESTONE2_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS3000_PLATFORM_MODULE_VERSION = 1.0 +CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION = 1.0 +CEL_DS2000_PLATFORM_MODULE_VERSION = 1.0 export CEL_DX010_PLATFORM_MODULE_VERSION export CEL_HALIBURTON_PLATFORM_MODULE_VERSION export CEL_SEASTONE2_PLATFORM_MODULE_VERSION export CEL_SILVERSTONE_PLATFORM_MODULE_VERSION -export CEL_BELGITE_PLATFORM_MODULE_VERSION +export CEL_DS1000_PLATFORM_MODULE_VERSION +export CEL_QUESTONE2_PLATFORM_MODULE_VERSION +export CEL_DS3000_PLATFORM_MODULE_VERSION +export CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION +export CEL_DS2000_PLATFORM_MODULE_VERSION CEL_DX010_PLATFORM_MODULE = platform-modules-dx010_$(CEL_DX010_PLATFORM_MODULE_VERSION)_amd64.deb $(CEL_DX010_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel @@ -30,6 +38,22 @@ CEL_SILVERSTONE_PLATFORM_MODULE = platform-modules-silverstone_$(CEL_SILVERSTONE $(CEL_SILVERSTONE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone-r0 $(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_PLATFORM_MODULE))) -CEL_BELGITE_PLATFORM_MODULE = platform-modules-belgite_$(CEL_BELGITE_PLATFORM_MODULE_VERSION)_amd64.deb -$(CEL_BELGITE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_belgite-r0 -$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_BELGITE_PLATFORM_MODULE))) +CEL_DS1000_PLATFORM_MODULE = platform-modules-ds1000_$(CEL_DS1000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS1000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds1000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS1000_PLATFORM_MODULE))) + +CEL_QUESTONE2_PLATFORM_MODULE = platform-modules-questone2_$(CEL_QUESTONE2_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_QUESTONE2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_questone_2-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_QUESTONE2_PLATFORM_MODULE))) + +CEL_DS3000_PLATFORM_MODULE = platform-modules-ds3000_$(CEL_DS3000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS3000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds3000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS3000_PLATFORM_MODULE))) + +CEL_SILVERSTONE_V2_PLATFORM_MODULE = platform-modules-silverstone-v2_$(CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_SILVERSTONE_V2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone_v2-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_V2_PLATFORM_MODULE))) + +CEL_DS2000_PLATFORM_MODULE = platform-modules-ds2000_$(CEL_DS2000_PLATFORM_MODULE_VERSION)_amd64.deb +$(CEL_DS2000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds2000-r0 +$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS2000_PLATFORM_MODULE))) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py deleted file mode 100644 index 5ece7e980980..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py +++ /dev/null @@ -1,93 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_fan import PddfFan - import subprocess -except ImportError as e: - raise ImportError(str(e) + "- required module not found") -# ------------------------------------------------------------------ -# HISTORY: -# 5/1/2022 (A.D.) -# add function:set_status_led, -# Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525 -# ------------------------------------------------------------------ - - -class Fan(PddfFan): - """PDDF Platform-Specific Fan class""" - - def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): - # idx is 0-based - PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) - - - def get_speed_tolerance(self): - """ - Retrieves the speed tolerance of the fan - - Returns: - An integer, the percentage of variance from target speed which is - considered tolerable - """ - # Fix the speed vairance to 10 percent. If it changes based on platforms, overwrite - # this value in derived pddf fan class - return 20 - - def get_presence(self): - if self.is_psu_fan: - #For PSU, FAN must be present when PSU is present - try: - cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41'] - p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - status = int(data[0].strip(), 16) - if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \ - (self.fans_psu_index == 2 and (status & 0x20) == 0): - return True - except (IOError, ValueError): - pass - - return False - else: - #Overwirte the PDDF Common since the FANs on Belgite are all Fixed and present - return True - - def get_direction(self): - """ - Retrieves the direction of fan - - Returns: - A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST - depending on fan direction - """ - if self.is_psu_fan: - # Belgite PSU module only has EXHAUST fan - return "EXHAUST" - else: - return super().get_direction() - - def get_status_led(self): - """ - Gets the state of the fan status LED - - Returns: - A string, one of the predefined STATUS_LED_COLOR_* strings above - """ - if self.is_psu_fan: - return "N/A" - else: - return super().get_status_led() - - def set_status_led(self, color): - """ - Sets the state of the fan module status LED - - Args: - color: A string representing the color with which to set the - fan module status LED - - Returns: - bool: True if status LED state is set successfully, False if not - """ - if self.is_psu_fan: - return False - else: - return super().set_status_led(color) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py deleted file mode 100644 index a216a37afcf8..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py +++ /dev/null @@ -1,15 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_sfp import PddfSfp -except ImportError as e: - raise ImportError (str(e) + "- required module not found") - - -class Sfp(PddfSfp): - """ - PDDF Platform-Specific Sfp class - """ - - def __init__(self, index, pddf_data=None, pddf_plugin_data=None): - PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) - - # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py deleted file mode 100644 index 7dd294fb8475..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py +++ /dev/null @@ -1,111 +0,0 @@ -try: - from sonic_platform_pddf_base.pddf_thermal import PddfThermal -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - - - -class Thermal(PddfThermal): - """PDDF Platform-Specific Thermal class""" - - def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): - PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) - self.minimum_thermal = self.get_temperature() - self.maximum_thermal = self.get_temperature() - # Provide the functions/variables below for which implementation is to be overwritten - - def get_low_critical_threshold(self): - """ - Retrieves the low critical threshold temperature of thermal - Returns: - A float number, the low critical threshold temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - return 0.001 - - def get_high_critical_threshold(self): - """ - Retrieves the high critical threshold temperature of thermal - Returns: - A float number, the high critical threshold temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - - return 100.000 - - def get_minimum_recorded(self): - """ - Retrieves the minimum recorded temperature of thermal - Returns: - A float number, the minimum recorded temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - tmp = self.get_temperature() - if tmp < self.minimum_thermal: - self.minimum_thermal = tmp - - return self.minimum_thermal - - def get_maximum_recorded(self): - """ - Retrieves the maximum recorded temperature of thermal - Returns: - A float number, the maximum recorded temperature of thermal in Celsius - up to nearest thousandth of one degree Celsius, e.g. 30.125 - """ - tmp = self.get_temperature() - if tmp > self.maximum_thermal: - self.maximum_thermal = tmp - - return self.maximum_thermal - - def get_presence(self): - """ - Retrieves the presence of the PSU - Returns: - bool: True if Thermal is present, False if not - """ - return True - - def get_model(self): - """ - Retrieves the model number (or part number) of the device - Returns: - string: Model/part number of device - """ - return "N/A" - - def get_serial(self): - """ - Retrieves the serial number of the device - Returns: - string: Serial number of device - """ - return "N/A" - - def get_status(self): - """ - Retrieves the operational status of the device - Returns: - A boolean value, True if device is operating properly, False if not - """ - if not self.get_presence(): - return False - - return True - - def is_replaceable(self): - """ - Retrieves whether thermal module is replaceable - Returns: - A boolean value, True if replaceable, False if not - """ - return False - - def get_position_in_parent(self): - """ - Retrieves the thermal position information - Returns: - A int value, 0 represent ASIC thermal, 1 represent CPU thermal info - """ - return 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh deleted file mode 100755 index 436cf61d6dbe..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/bash -# Set U60 shutdown threhold 80 -sudo i2cset -y -f 6 0x49 0x3 0x4e 0x00 i -sleep 0.1 -sudo i2cset -y -f 6 0x49 0x1 0x2 -sleep 0.1 -#Set LM75 shutdown enable -sudo i2cset -y -f 2 0x32 0x45 0x1 - -# set sys led green status -sudo i2cset -y -f 2 0x32 0x43 0xec - -echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py deleted file mode 100755 index 5ce0469a0ddf..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py +++ /dev/null @@ -1,272 +0,0 @@ -#!/usr/bin/env python3 -# -# Copyright (C) Celestica Technology Corporation -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . - -# ------------------------------------------------------------------ -# HISTORY: -# 9/16/2021 (A.D.) -# ------------------------------------------------------------------ - -try: - import sys - import getopt - import logging - import logging.config - import time # this is only being used as part of the example - import signal - import math - from sonic_platform import platform - from sonic_py_common.general import getstatusoutput_noshell -except ImportError as e: - raise ImportError('%s - required module not found' % str(e)) - -# Deafults -FUNCTION_NAME = 'cel_belgite_monitor' -DUTY_MAX = 100 -FAN_NUMBER = 3 -SENSOR_NUMBER = 4 -CPU_CORE_TEMP = r"/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input" - - -class cel_belgite_monitor(object): - """ - Make a class we can use to capture stdout and sterr in the log - """ - # static temp var - _ori_temp = 0 - _new_perc = DUTY_MAX / 2 - syslog = logging.getLogger("[" + FUNCTION_NAME + "]") - init_fan_temperature = [0, 0, 0, 0] - - def __init__(self, log_file, log_level): - """Needs a logger and a logger level.""" - formatter = logging.Formatter('%(name)s %(message)s') - sys_handler = logging.handlers.SysLogHandler(address='/dev/log') - sys_handler.setFormatter(formatter) - sys_handler.ident = 'common' - self.syslog.setLevel(logging.WARNING) - self.syslog.addHandler(sys_handler) - self.platform_chassis_obj = platform.Platform().get_chassis() - # set up logging to file - logging.basicConfig( - filename=log_file, - filemode='w', - level=log_level, - format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', - datefmt='%H:%M:%S' - ) - - # set up logging to console - if log_level == logging.DEBUG: - console = logging.StreamHandler() - console.setLevel(log_level) - formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') - console.setFormatter(formatter) - logging.getLogger('').addHandler(console) - logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) - - def get_all_temperature(self): - """ - return: all temperature - """ - all_temperature_list = list() - for sensor_index in range(SENSOR_NUMBER): - temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() - if temp is None or str(temp).strip() == "": - return False - temp = temp*1000 - all_temperature_list.append(temp) - u4_temperature = all_temperature_list[0] - u7_temperature = all_temperature_list[1] - # default CPU temperature 70 - cpu_temperature = 70000 - try: - with open(CPU_CORE_TEMP, "r") as f: - cpu_temperature = float(f.read().strip()) - except Exception as E: - logging.debug('Error: %s' % E) - u60_temperature = all_temperature_list[3] - return [u4_temperature, u7_temperature, cpu_temperature, u60_temperature] - - def get_fan_speed_by_temperature(self, temp_list): - fan1_direction = self.platform_chassis_obj.get_fan(0).get_direction() - logging.debug('INFO: fan direction: %s' % str(fan1_direction)) - all_temp = self.get_all_temperature() - logging.debug('INFO: all_temp: %s' % str(all_temp)) - # B2F=intake: U7 temperature， F2B-EXHAUST: U4 temperature - a = 1 if fan1_direction.lower() == "intake" else 0 - sensor_temp = all_temp[a] - cup_temp = all_temp[2] - u60_temp = all_temp[3] - logging.debug('sensor_temp:%d cup_temp:%d u60_temp:%d' % (sensor_temp, cup_temp, u60_temp)) - update_temp_sensor, update_temp_cpu, update_temp_u60 = True, True, True - if all_temp[a] - temp_list[a] < 0: - update_temp_sensor = False - if cup_temp - temp_list[2] < 0: - update_temp_cpu = False - if u60_temp - temp_list[3] < 0: - update_temp_u60 = False - - # U4 U7 - if not update_temp_sensor: # temperature down - b = math.trunc(1400/13) - if sensor_temp <= 32000: - sensor_temp_speed = 40 - elif sensor_temp >= 45000: - sensor_temp_speed = 100 - else: - sensor_temp_speed = int(math.trunc(60 / 13) * math.trunc(sensor_temp / 1000) - b) - else: # temperature up - b = math.trunc(1580 / 13) - if sensor_temp <= 35000: - sensor_temp_speed = 40 - elif sensor_temp >= 48000: - sensor_temp_speed = 100 - else: - sensor_temp_speed = int(math.trunc(60/13) * math.trunc(sensor_temp/1000) - b) - - # CPU - if not update_temp_cpu: # temperature down - b = 228 - if cup_temp <= 67000: - cpu_temp_speed = 40 - elif cup_temp >= 82000: - cpu_temp_speed = 100 - else: - cpu_temp_speed = int(4 * (cup_temp / 1000) - b) - else: # temperature up - b = 240 - if cup_temp <= 70000: - cpu_temp_speed = 40 - elif cup_temp >= 85000: - cpu_temp_speed = 100 - else: - cpu_temp_speed = int(4 * (cup_temp / 1000) - b) - - # U60 - if not update_temp_u60: # temperature down - b = 168 - if u60_temp <= 52000: - u60_temp_speed = 40 - elif u60_temp >= 67000: - u60_temp_speed = 100 - else: - u60_temp_speed = int(4 * (u60_temp / 1000) - b) - else: # temperature up - b = 180 - if u60_temp <= 55000: - u60_temp_speed = 40 - elif u60_temp >= 70000: - u60_temp_speed = 100 - else: - u60_temp_speed = int(4 * (u60_temp / 1000) - b) - return max([sensor_temp_speed, cpu_temp_speed, u60_temp_speed]) - - def manage_fans(self): - fan_presence_list = [True, True, True] # whether fan is absent or not - for fan_index in range(FAN_NUMBER): - if not self.platform_chassis_obj.get_fan(fan_index).get_presence() or not \ - self.platform_chassis_obj.get_fan(fan_index).get_status(): - fan_presence_list[fan_index] = False - logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_presence():%s' - % str(self.platform_chassis_obj.get_fan(fan_index).get_presence())) - logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_status():%s' - % str(self.platform_chassis_obj.get_fan(fan_index).get_status())) - else: - fan_presence_list[fan_index] = True - - fans_inserted_num = FAN_NUMBER - fan_presence_list.count(False) - if fans_inserted_num == 0: # all fans broken, power off - self.syslog.critical("No fans inserted. Severe overheating hazard. " - "Please insert Fans immediately or power off the device\n") - - # power off - elif fans_inserted_num in [1, 2]: # 1 or 2 present, full speed - self._new_perc = DUTY_MAX - else: # 3 fans normal, manage the fans follow thermal policy - self._new_perc = self.get_fan_speed_by_temperature(self.init_fan_temperature) - logging.debug('INFO: 3 fans inserted: self._new_perc: %s' % str(self._new_perc)) - self.init_fan_temperature = self.get_all_temperature() - - for i in range(FAN_NUMBER): - aa = self.platform_chassis_obj.get_fan(i).get_speed() - logging.debug("INFO: Get before setting fan speed: %s" % aa) - if self._new_perc < 40: - self._new_perc = 40 - if self._new_perc > 100: - self._new_perc = 100 - set_stat = self.platform_chassis_obj.get_fan(i).set_speed(self._new_perc) - if set_stat is True: - logging.debug('INFO: PASS. set_fan%d_duty_cycle (%d)' % (i, self._new_perc)) - else: - logging.debug('INFO: FAIL. set_fan%d_duty_cycle (%d)' % (i, self._new_perc)) - - -def handler(signum, frame): - platform_chassis = platform.Platform().get_chassis() - for _ in range(FAN_NUMBER): - set_stat = platform_chassis.get_fan(_).set_speed(DUTY_MAX) - if set_stat is True: - logging.debug('INFO:Cause signal %d, set fan speed max.' % signum) - else: - logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)' % DUTY_MAX) - # Enable the CPLD Heartbeat back - status, output = getstatusoutput_noshell(["i2cset", "-f", "-y", "75", "0x40", "0x22", "0x00"]) - if status == 0: - logging.debug('INFO: CPLD Heartbeat check is enabled back') - sys.exit(0) - - -def main(argv): - global test_temp - - log_file = '/home/admin/%s.log' % FUNCTION_NAME - log_level = logging.INFO - if len(sys.argv) != 1: - try: - opts, args = getopt.getopt(argv, 'hdlt:', ['lfile=']) - except getopt.GetoptError: - print('Usage: %s [-d] [-l ]' % sys.argv[0]) - return 0 - for opt, arg in opts: - if opt == '-h': - print('Usage: %s [-d] [-l ]' % sys.argv[0]) - return 0 - elif opt in ('-d', '--debug'): - log_level = logging.DEBUG - elif opt in ('-l', '--lfile'): - log_file = arg - - if sys.argv[1] == '-t': - if len(sys.argv) != 6: - print("temp test, need input 4 temp") - return 0 - - signal.signal(signal.SIGINT, handler) - signal.signal(signal.SIGTERM, handler) - # Disaable the CPLD Heartbeat check to control Fan speed from CPU via ADT7470 - getstatusoutput_noshell(['i2cset', '-f', '-y', '2', '0x32', '0x30', '0x01']) - - monitor = cel_belgite_monitor(log_file, log_level) - - # Loop forever, doing something useful hopefully: - while True: - monitor.manage_fans() - time.sleep(10) - - -if __name__ == '__main__': - main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/changelog b/platform/broadcom/sonic-platform-modules-cel/debian/changelog index aa89b4df6329..42f4d07630e7 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-cel/debian/changelog @@ -1,3 +1,12 @@ +sonic-cel-platform-modules (1.0) unstable; urgency=low + + * Add questone2 platform module. + * V2 platforms DS4000, DS3000, DS2000 + * Rename Belgite to DS1000 + * Hardened platform bug fixes + + -- Jemston Fernando Wed, 12 Jun 2024 15:00:00 +0530 + sonic-cel-platform-modules (0.9) unstable; urgency=low * Add haliburton platform module. diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control index 0dd6eb76e00e..4a05b4821de3 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/control +++ b/platform/broadcom/sonic-platform-modules-cel/debian/control @@ -26,7 +26,27 @@ Architecture: amd64 Depends: linux-image-6.1.0-11-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp. -Package: platform-modules-belgite +Package: platform-modules-ds1000 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-questone2 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-ds3000 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-silverstone-v2 +Architecture: amd64 +Depends: linux-image-6.1.0-11-2-amd64-unsigned +Description: kernel modules for platform devices such as led, sfp + +Package: platform-modules-ds2000 Architecture: amd64 Depends: linux-image-6.1.0-11-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install deleted file mode 100644 index 6f9f8f267ed9..000000000000 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install +++ /dev/null @@ -1,7 +0,0 @@ -belgite/systemd/pddf-platform-init.service etc/systemd/system -belgite/service/belgite-pddf-platform-monitor.service lib/systemd/system -belgite/scripts/pddf_pre_driver_install.sh usr/local/bin -belgite/scripts/pddf_post_device_create.sh usr/local/bin -belgite/utils/belgite_pddf_monitor.py usr/local/bin -belgite/pddf/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_belgite-r0/pddf -services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install new file mode 100644 index 000000000000..24a75dfe8240 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install @@ -0,0 +1,8 @@ +ds1000/systemd/pddf-platform-init.service etc/systemd/system +ds1000/service/ds1000-fan-control.service lib/systemd/system +ds1000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds1000/scripts/pddf_post_device_create.sh usr/local/bin +ds1000/scripts/ds1000_platform_shutdown.sh usr/local/bin +ds1000/utils/ds1000_fanctld.py usr/local/bin +ds1000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds1000-r0/pddf +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst similarity index 56% rename from platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst rename to platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst index 4abd671baec9..1b038ebcc32a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst @@ -1,6 +1,6 @@ depmod -a /usr/local/bin/platform_api_mgnt.sh install systemctl enable pddf-platform-init.service +systemctl enable ds1000-fan-control.service systemctl start pddf-platform-init.service -systemctl enable belgite-pddf-platform-monitor.service -systemctl start belgite-pddf-platform-monitor.service +systemctl start ds1000-fan-control.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install new file mode 100644 index 000000000000..e7a40d21a66f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install @@ -0,0 +1,12 @@ +ds2000/scripts/ds2000_platform_shutdown.sh usr/local/bin +ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds2000/scripts/pddf_post_device_create.sh usr/local/bin +ds2000/scripts/pre_pddf_init.sh usr/local/bin +ds2000/scripts/sensors usr/bin +ds2000/scripts/platform_sensors.py usr/local/bin +ds2000/systemd/pddf-platform-init.service etc/systemd/system +ds2000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds2000-r0/pddf +ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds2000/systemd/ds2000-pddf-platform-monitor.service lib/systemd/system +ds2000/utils/pddf_fan_control_sensor_refresh.py usr/local/bin +ds2000/utils/FanControl usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst new file mode 100644 index 000000000000..b517026a66a6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst @@ -0,0 +1,7 @@ +depmod -a + +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service + +systemctl enable ds2000-pddf-platform-monitor.service +systemctl start ds2000-pddf-platform-monitor.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install new file mode 100644 index 000000000000..1ea62240a8b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install @@ -0,0 +1,11 @@ +ds3000/systemd/pddf-platform-init.service etc/systemd/system +ds3000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds3000-r0/pddf +ds3000/scripts/pre_pddf_init.sh usr/local/bin +ds3000/scripts/sensors usr/bin +ds3000/scripts/platform_sensors.py usr/local/bin +ds3000/scripts/ds3000_platform_shutdown.sh usr/local/bin +ds3000/scripts/pddf_pre_driver_install.sh usr/local/bin +ds3000/scripts/pddf_post_device_create.sh usr/local/bin +ds3000/utils/afulnx_64 usr/local/bin +ds3000/utils/fpga_prog usr/local/bin +ds3000/utils/ispvm usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst new file mode 100644 index 000000000000..f8b021b6248a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst @@ -0,0 +1,4 @@ +depmod -a + +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init index fab61467da72..6e643e524d51 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init @@ -40,8 +40,14 @@ fi case "$1" in start) echo -n "Setting up board... " - + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x force-deselect-on-exit=1 modprobe dx010_wdt modprobe leds-dx010 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init index aff8503d7543..9a5bcdac4776 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init @@ -35,6 +35,15 @@ case "$1" in start) echo -n "Setting up board... " + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe smc modprobe hlx_gpio_ich modprobe dps200 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init new file mode 100644 index 000000000000..a32be9dd97d8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init @@ -0,0 +1,97 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: $portmap +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup questone2 board. +### END INIT INFO + + +case "$1" in +start) + echo -n "Setting up board... " + + # Loads kernel modules + modprobe i2c-ismt + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-dev + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe 8021q + + modprobe questone2_baseboard_cpld + modprobe questone2_switchboard + modprobe mc24lc64t + modprobe optoe + modprobe sff_8436_eeprom + + # Add driver to support TLV - EEPROM + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + if [[ $devname == 'SMBus iSMT adapter at '* ]]; then + echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device + echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt + break + fi + done + + # One platform support two hwskus, auto select the correct hwsku + # If label is not either Questone-II or Questone-IIA, then Questone-IIA is used by default + hwsku_file="/usr/share/sonic/device/x86_64-cel_questone_2-r0/default_sku" + if [ ! -f $hwsku_file ]; then + platform_path="/usr/share/sonic/device/x86_64-cel_questone_2-r0" + + sleep 1 # Wait for EEPROM driver initialization + hwsku=$(decode-syseeprom | grep "Label" | awk '{print $5}') + + cd ${platform_path} + if [ x$hwsku = x"Questone-II" ];then + echo "Questone_2 t1" > $hwsku_file + ln -sf ./Questone_2/platform.json platform.json + ln -sf ./Questone_2/platform_components.json platform_components.json + ln -sf ./Questone_2/custom_led.bin custom_led.bin + else + echo "Questone_2A t1" > $hwsku_file + ln -sf ./Questone_2A/platform.json platform.json + ln -sf ./Questone_2A/platform_components.json platform_components.json + ln -sf ./Questone_2A/custom_led.bin custom_led.bin + fi + fi + + # SONiC LED control policy + ipmitool raw 0x3a 0x0f 0x02 0x00 + # Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x0a 0x00 0x06 + # Set Alarm LED off + ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00 + # PSU and FAN LED are in default controlled by CPLD + + echo "done." + ;; + +stop) + if [ -f /tmp/eeprom_path.txt ]; then + echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device + fi + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-questone2 {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install new file mode 100644 index 000000000000..b08bfe00d4c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install @@ -0,0 +1,9 @@ +questone2/cfg/questone2-modules.conf etc/modules-load.d +questone2/cfg/questone2-modprobe.conf etc/modprobe.d +questone2/systemd/platform-modules-questone2.service lib/systemd/system +questone2/cfg/pid_config_questone2.ini usr/local/etc +questone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_questone_2-r0 +questone2/scripts/questone2_platform_shutdown.sh usr/local/bin +questone2/scripts/sensors usr/bin +questone2/scripts/platform_sensors.py usr/local/bin +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst new file mode 100644 index 000000000000..7a7371851fd0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst @@ -0,0 +1,6 @@ +depmod -a + +/usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-questone2.service +systemctl start platform-modules-questone2.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init index 977cdac06000..75edea4c0066 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init @@ -16,6 +16,16 @@ start) echo -n "Setting up board... " # Add driver to support HW + modprobe i2c-ismt + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-mux + modprobe i2c-smbus + modprobe i2c-mux-gpio + modprobe i2c-mux-pca954x + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c-dev modprobe ipmi_devintf modprobe ipmi_si @@ -28,14 +38,27 @@ start) devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` if [[ $devname == 'SMBus iSMT adapter at '* ]]; then echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device - break + echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt + break fi done + sleep 1 + # SONiC LED control policy + ipmitool raw 0x3a 0x0f 0x02 0x00 + # Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x0a 0x00 0x06 + # Set Alarm LED off + ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00 + # PSU is in default controlled by CPLD + echo "done." ;; stop) + if [ -f /tmp/eeprom_path.txt ]; then + echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device + fi echo "done." ;; diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install index 31fc4fd3bd6d..08923fedaf6a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install @@ -1,4 +1,7 @@ seastone2/cfg/seastone2-modules.conf etc/modules-load.d seastone2/systemd/platform-modules-seastone2.service lib/systemd/system seastone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_seastone_2-r0 +seastone2/scripts/seastone2_platform_shutdown.sh usr/local/bin +seastone2/scripts/sensors usr/bin +seastone2/scripts/platform_sensors.py usr/local/bin services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst index f232a2cac59d..fc5257b98494 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst @@ -1,5 +1,6 @@ depmod -a -systemctl enable platform-modules-seastone2.service -systemctl start platform-modules-seastone2.service /usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-seastone2.service +systemctl start platform-modules-seastone2.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install new file mode 100644 index 000000000000..15e497039647 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install @@ -0,0 +1,13 @@ +silverstone-v2/systemd/pddf-platform-init.service etc/systemd/system +silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service lib/systemd/system +silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh usr/local/bin +silverstone-v2/scripts/pddf_pre_driver_install.sh usr/local/bin +silverstone-v2/scripts/pddf_post_device_create.sh usr/local/bin +silverstone-v2/scripts/pre_pddf_init.py usr/local/bin +silverstone-v2/scripts/sensors usr/bin +silverstone-v2/scripts/platform_sensors.py usr/local/bin +silverstone-v2/utils/pddf_fan_control_sensor_refresh.py usr/local/bin +silverstone-v2/utils/pddf_sensor_list_refresh.py usr/local/bin +silverstone-v2/utils/FanControl usr/local/bin +silverstone-v2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/pddf +services/platform_api/platform_api_mgnt.sh usr/local/bin diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst new file mode 100644 index 000000000000..aa8cac74fd80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst @@ -0,0 +1,6 @@ +depmod -a +/usr/local/bin/platform_api_mgnt.sh install +systemctl enable silverstone-v2-pddf-platform-monitor.service +systemctl start silverstone-v2-pddf-platform-monitor.service +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init index eb003599ec61..38895aff2b3b 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init @@ -11,30 +11,105 @@ # Short-Description: Setup SilverStone board. ### END INIT INFO - case "$1" in start) echo -n "Setting up board... " + modprobe i2c-i801 + modprobe i2c-isch + modprobe i2c-ismt + modprobe i2c-mux + modprobe i2c-smbus + modprobe coretemp + modprobe ipmi_devintf + modprobe ipmi_si + modprobe i2c-dev - modprobe baseboard-lpc - modprobe switchboard - modprobe mc24lc64t modprobe ipmi_devintf + modprobe baseboard-lpc + modprobe cls-i2c-mux-pca954x + modprobe cls-switchboard + modprobe xcvr-cls + modprobe switch_cpld - # Instantiate TLV EEPROM device on I801 bus + sleep 1 + + for i in {0..3} + do + echo -2 > /sys/devices/pci0000:00/0000:00:1c.0/0000:09:00.0/ocores-i2c.3/i2c-3/3-007$i/idle_state + done + + # Instantiate TLV EEPROM device on I801 bus devname=`cat /sys/bus/i2c/devices/i2c-0/name` if [[ $devname == 'SMBus I801 adapter at '* ]]; then echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device fi + + # Clear system cache decode-syseeprom --init 2> /dev/null & + sleep 1 + + # Attach switchboard CPLD i2c device + echo switch_cpld 0x30 > /sys/bus/i2c/devices/i2c-4/new_device + + # Attach optical Module EEPROM + # use optoe2 for SFP+. + for i in {1..2} + do + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device + done + + # use optoe3 for QSFP-DD. + for i in {10..41} + do + echo optoe3 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device + done + + # SONiC LED control policy + ## Disable BMC LED control + ipmitool raw 0x3a 0x09 0x02 0x00 + ## Set status led to green blinking 1Hz to indicate NOS take control + ipmitool raw 0x3a 0x03 0x00 0x02 0x62 0xdd + ## Set Alarm LED off + ipmitool raw 0x3a 0x03 0x00 0x02 0x63 0xff + ## Set PSU HW control + ipmitool raw 0x3a 0x03 0x00 0x02 0x61 0x10 + ## Set FAN HW control + ipmitool raw 0x3a 0x03 0x00 0x02 0x65 0x10 + /bin/sh /usr/local/bin/platform_api_mgnt.sh init echo "done." ;; stop) + #TLV eeprom + if [ -d /sys/bus/i2c/devices/i2c-0/0-0056 ]; then + echo 0x56 > /sys/bus/i2c/devices/i2c-0/delete_device + fi + + #switchcpld i2c + if [ -d /sys/bus/i2c/devices/i2c-4/4-0030 ]; then + echo 0x30 > /sys/bus/i2c/devices/i2c-4/delete_device + fi + + #sfp+ module + for i in {1..2} + do + if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device + fi + done + + #qsfp-DD + for i in {10..41} + do + if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device + fi + done + echo "done." ;; @@ -48,4 +123,4 @@ force-reload|restart) ;; esac -exit 0 \ No newline at end of file +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install index 73fa4b90a4fc..0a973ed8d678 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install @@ -1,5 +1,6 @@ silverstone/scripts/sensors usr/bin silverstone/scripts/platform_sensors.py usr/local/bin +silverstone/scripts/silverstone_platform_shutdown.sh usr/local/bin silverstone/cfg/silverstone-modules.conf etc/modules-load.d silverstone/systemd/platform-modules-silverstone.service lib/systemd/system silverstone/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone-r0 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst index feb9cf45c219..f5dfe16c0bbb 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst +++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst @@ -1,5 +1,6 @@ depmod -a -systemctl enable platform-modules-silverstone.service -systemctl start platform-modules-silverstone.service /usr/local/bin/platform_api_mgnt.sh install + +systemctl enable platform-modules-silverstone.service +systemctl start platform-modules-silverstone.service diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/rules b/platform/broadcom/sonic-platform-modules-cel/debian/rules index 7c81e2496f1d..bcbcdcfd3e7c 100755 --- a/platform/broadcom/sonic-platform-modules-cel/debian/rules +++ b/platform/broadcom/sonic-platform-modules-cel/debian/rules @@ -6,7 +6,8 @@ export KBUILD_EXTRA_SYMBOLS := /sonic/platform/pddf/i2c/Module.symvers.PDDF KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite + +MODULE_DIRS:= dx010 haliburton silverstone seastone2 ds1000 questone2 silverstone-v2 ds2000 ds3000 %: dh $@ @@ -14,22 +15,13 @@ MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite override_dh_auto_build: (for mod in $(MODULE_DIRS); do \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ - if [ $$mod = "seastone2" ]; then \ - cd $(MOD_SRC_DIR)/services/platform_api; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \ - continue; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \ + cd $(MOD_SRC_DIR)/$${mod}/pddf; \ + else \ + cd $(MOD_SRC_DIR)/$${mod}; \ fi; \ - if [ $$mod = "belgite" ]; then \ - cd $(MOD_SRC_DIR); \ - if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \ - cd $(MOD_SRC_DIR)/$${mod}/pddf; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/pddf; \ - echo "Finished making pddf whl package for $$mod"; \ - fi; \ - continue; \ - fi; \ - cd $(MOD_SRC_DIR)/$${mod}; \ - python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \ + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \ + echo "Finished making sonic_platform whl package for $$mod"; \ done) override_dh_auto_install: @@ -46,7 +38,5 @@ override_dh_clean: dh_clean (for mod in $(MODULE_DIRS); do \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ - if [ -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl ]; then \ - rm -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl; \ - fi; \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \ done) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c new file mode 100644 index 000000000000..77e8ff7d44a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c @@ -0,0 +1,734 @@ +/*************************************************************************** + * Copyright (C) 2021 Celestica Corp * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WDT_CONTROL_BASE 0xA100 +#define TEST_SCRATCH_REG 0xA101 +#define REBOOT_CAUSE_REG 0xA105 +#define WDT_SET_TIMER_H_BIT_REG 0xA161 +#define WDT_SET_TIMER_M_BIT_REG 0xA162 +#define WDT_SET_TIMER_L_BIT_REG 0xA163 +#define WDT_TIMER_H_BIT_REG 0xA164 +#define WDT_TIMER_M_BIT_REG 0xA165 +#define WDT_TIMER_L_BIT_REG 0xA166 +#define WDT_ENABLE_REG 0xA167 +#define WDT_FEED_REG 0xA168 +#define WDT_PUNCH_REG 0xA169 +#define WDT_START_FEED 0x01 +#define WDT_STOP_FEED 0x00 + +#define POWER_CYCLE_RESET 0x00 +#define POWER_ON_RESET 0x11 +#define SOFT_SET_WARM_RESET 0x22 +#define SOFT_SET_COLD_RESET 0x33 +#define CPU_WARM_RESET 0x44 +#define CPU_COLD_RESET 0x55 +#define CPU_GPIO_WARM_RESET 0x66 +#define WDT_RESET 0x77 +#define CPU_OVERLOAD_RESET 0x88 +#define INSUFFICIENT_FAN_SPEED_RESET 0xAA + + +#define MAX_TIMER_VALUE 0xffffff +#define DEFUALT_TIMER_VALUE 180000 /* 180s */ +#define WDT_ENABLE 0x01 +#define WDT_DISABLE 0x00 +#define WDT_RESTART 0x00 +#define DRV_NAME "cpld_wdt" +#define DRV_VERSION "1.0.0" +#define DEV_NAME "cpld_wdt" + +struct wdt_data { + unsigned long opened; + struct mutex lock; + char expect_close; + struct watchdog_info ident; + int timeout; + int timer_val; + char caused_reboot; /* last reboot was by the watchdog */ + struct resource *res; +}; + +struct cpld_wdt_private { + struct platform_device *pdev; + struct watchdog_device wddev; + struct cdev cdev; + struct miscdevice mdev; + bool suspended; + struct wdt_data wdat; +}; + +//struct class *cpld_wdt; +static const int max_timeout = MAX_TIMER_VALUE; + +static int timeout = DEFUALT_TIMER_VALUE; /* default 180s */ +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Start watchdog timer on module load with" + " given initial timeout(unit: ms)." + " Zero (default) disables this feature."); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0644); +MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); + +static unsigned int watchdog_get_timeleft(struct cpld_wdt_private *wdt) +{ + int time = 0; + + mutex_lock(&wdt->wdat.lock); + + time = inb(WDT_TIMER_H_BIT_REG); + time = time << 8 | inb(WDT_TIMER_M_BIT_REG); + time = time << 8 | inb(WDT_TIMER_L_BIT_REG); + time = time/1000; + mutex_unlock(&wdt->wdat.lock); + + return time; +} +static int watchdog_get_timeout(struct cpld_wdt_private *wdt) +{ + int timeout = 0; + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + timeout = inb(WDT_SET_TIMER_H_BIT_REG); + timeout = timeout << 8 | inb(WDT_SET_TIMER_M_BIT_REG); + timeout = timeout << 8 | inb(WDT_SET_TIMER_L_BIT_REG); + timeout=timeout/1000; + mutex_unlock(&wdt->wdat.lock); + + return timeout; +} +static int watchdog_set_timeout(struct cpld_wdt_private *wdt, unsigned int timeout) +{ + unsigned char val = 0; + if(!wdt) + return -EINVAL; + + if (timeout <= 0 + || timeout > max_timeout) { + pr_err("watchdog timeout out of range\n"); + return -EINVAL; + } + + mutex_lock(&wdt->wdat.lock); + + wdt->wdat.timeout = timeout; + if (timeout > MAX_TIMER_VALUE) { + wdt->wdat.timer_val = MAX_TIMER_VALUE; + } else { + wdt->wdat.timer_val = timeout; + } + /* Set timer value */ + //pr_crit("Watchdog Timeout:0x%06x\n", wdt->wdat.timer_val); + + outb((wdt->wdat.timer_val >> 16) & 0xff, WDT_SET_TIMER_H_BIT_REG); + outb((wdt->wdat.timer_val >> 8) & 0xff, WDT_SET_TIMER_M_BIT_REG); + outb(wdt->wdat.timer_val & 0xff, WDT_SET_TIMER_L_BIT_REG); + + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static int watchdog_ping(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + + /* start feed watchdog */ + outb(WDT_START_FEED, WDT_FEED_REG); + /* stop feed watchdog */ + outb(WDT_STOP_FEED, WDT_FEED_REG); + + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static void watchdog_keepalive(struct cpld_wdt_private *wdt) +{ + unsigned char val = 0; + if(!wdt) + return; + + mutex_lock(&wdt->wdat.lock); + + val = inb(WDT_FEED_REG); + + val &= 0x1; + + val = ~val; + + val &= 0x1; + /* start feed watchdog */ + outb(val, WDT_FEED_REG); + + mutex_unlock(&wdt->wdat.lock); + return; +} + +static int watchdog_start(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + /* Make sure we don't die as soon as the watchdog is enabled below */ + //watchdog_keepalive(); + mutex_lock(&wdt->wdat.lock); + outb(WDT_ENABLE, WDT_ENABLE_REG); + outb(WDT_RESTART, WDT_PUNCH_REG); + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static int watchdog_stop(struct cpld_wdt_private *wdt) +{ + if(!wdt) + return -EINVAL; + + mutex_lock(&wdt->wdat.lock); + outb(WDT_DISABLE, WDT_ENABLE_REG); + mutex_unlock(&wdt->wdat.lock); + + return 0; +} + +static char watchdog_get_reason(struct cpld_wdt_private *p) +{ + char status = 0; + + if (!p) + return -1; + mutex_lock(&p->wdat.lock); + status = inb(REBOOT_CAUSE_REG); + mutex_unlock(&p->wdat.lock); + + return status; +} + +static bool watchdog_is_running(struct cpld_wdt_private *wdt) +{ + /* + * if we fail to determine the watchdog's status assume it to be + * running to be on the safe side + */ + + bool is_running = true; + + mutex_lock(&wdt->wdat.lock); + is_running = inb(WDT_ENABLE_REG); + mutex_unlock(&wdt->wdat.lock); + + return is_running; +} + +static const struct watchdog_info ident = { + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = DRV_NAME, +}; + +static ssize_t identity_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + return sprintf(buf, "%s\n", wdt->wdat.ident.identity); +} + +static DEVICE_ATTR_RO(identity); + + +static ssize_t state_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + bool state = watchdog_is_running(wdt); + if(true == state) + return sprintf(buf, "active\n"); + else + return sprintf(buf, "inactive\n"); +} + +static DEVICE_ATTR_RO(state); + +static ssize_t status_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int status; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + return sprintf(buf, "0x%x\n", status); +} + +static DEVICE_ATTR_RO(status); + +static ssize_t reason_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + char bootstatus; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + bootstatus = watchdog_get_reason(wdt); + + return sprintf(buf, "0x%02x\n", bootstatus); +} + +static DEVICE_ATTR_RO(reason); + +static ssize_t timeleft_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int timeleft; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + timeleft = watchdog_get_timeleft(wdt); + + return sprintf(buf, "%u\n", timeleft); + +} + +static DEVICE_ATTR_RO(timeleft); + + +static ssize_t timeout_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + unsigned int timeout; + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + if(!wdt) + return -EINVAL; + + timeout = watchdog_get_timeout(wdt); + + return sprintf(buf, "%u\n", timeout); +} +static DEVICE_ATTR_RO(timeout); + + +static struct attribute *wdt_attrs[] = { + &dev_attr_state.attr, + &dev_attr_identity.attr, + &dev_attr_status.attr, + &dev_attr_reason.attr, + &dev_attr_timeleft.attr, + &dev_attr_timeout.attr, + NULL, +}; + +static const struct attribute_group wdt_group = { + .attrs = wdt_attrs, +}; + +static int watchdog_open(struct inode *inode, struct file *file) +{ + struct cpld_wdt_private *wdt; + + wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); + + /* If the watchdog is alive we don't need to start it again */ + + if (test_and_set_bit(0, &wdt->wdat.opened)) + return -EBUSY; + + //watchdog_start(wdt); + + if (nowayout) + __module_get(THIS_MODULE); + + wdt->wdat.expect_close = 0; + + + return nonseekable_open(inode, file); +} + +static int watchdog_release(struct inode *inode, struct file *file) +{ + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + + if(!p) + return -EINVAL; + + clear_bit(0, &p->wdat.opened); + + if (!p->wdat.expect_close) { + //watchdog_keepalive(p); + //pr_crit("Unexpected close, Not stopping watchdog!\n"); + } else if (!nowayout) { + //pr_crit("Cpld Watchdog Stopped!\n"); + watchdog_stop(p); + } + return 0; +} + +/* + * watchdog_write: + * @file: file handle to the watchdog + * @buf: buffer to write + * @count: count of bytes + * @ppos: pointer to the position to write. No seeks allowed + * + * A write to a watchdog device is defined as a keepalive signal. Any + * write of data will do, as we we don't define content meaning. + */ + +static ssize_t watchdog_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + + if(!p) + return -EINVAL; + + + if (count) { + if (!nowayout) { + size_t i; + + /* In case it was set long ago */ + bool expect_close = false; + + for (i = 0; i != count; i++) { + char c; + if (get_user(c, buf + i)) + return -EFAULT; + expect_close = (c == 'V'); + } + + /* Properly order writes across fork()ed processes */ + mutex_lock(&p->wdat.lock); + p->wdat.expect_close = expect_close; + mutex_unlock(&p->wdat.lock); + } + + /* someone wrote to us, we should restart timer */ + watchdog_keepalive(p); + } + return count; +} + +/* + * watchdog_ioctl: + * @inode: inode of the device + * @file: file handle to the device + * @cmd: watchdog command + * @arg: argument pointer + * + * The watchdog API defines a common set of functions for all watchdogs + * according to their available features. + */ +static long watchdog_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + int status; + int new_options; + int new_timeout; + unsigned int val; + union { + struct watchdog_info __user *ident; + int __user *i; + } uarg; + + uarg.i = (int __user *)arg; + + struct cpld_wdt_private *p; + p = container_of(file->private_data, struct cpld_wdt_private, mdev); + if(!p) + return -EINVAL; + + switch (cmd) { + case WDIOC_GETSUPPORT: + return copy_to_user(uarg.ident, &p->wdat.ident, + sizeof(p->wdat.ident)) ? -EFAULT : 0; + + case WDIOC_GETSTATUS: + status = watchdog_is_running(p); + return put_user(status, uarg.i); + + case WDIOC_GETBOOTSTATUS: + //status = watchdog_get_bootstatus(p); + return put_user(status, uarg.i); + + case WDIOC_SETOPTIONS: + if (get_user(new_options, uarg.i)){ + return -EFAULT; + } + + if (new_options & WDIOS_DISABLECARD){ + return watchdog_stop(p); + } + + if (new_options & WDIOS_ENABLECARD){ + return watchdog_start(p); + } + + return 0; + + case WDIOC_KEEPALIVE: + watchdog_keepalive(p); + return 0; + + case WDIOC_SETTIMEOUT: + if (get_user(new_timeout, uarg.i)) + return -EFAULT; + new_timeout = new_timeout*1000; + if (watchdog_set_timeout(p, new_timeout)) + return -EINVAL; + + val = watchdog_get_timeout(p); + return put_user(val, uarg.i); + case WDIOC_GETTIMEOUT: + val = watchdog_get_timeout(p); + return put_user(val, uarg.i); + + case WDIOC_GETTIMELEFT: + val = watchdog_get_timeleft(p); + return put_user(val, uarg.i); + default: + return -ENOTTY; + + } +} + +static int watchdog_notify_sys(struct notifier_block *this, unsigned long code, + void *unused) +{ + if (code == SYS_DOWN || code == SYS_HALT) + //watchdog_stop(p); + + pr_err("CPLD Watchdog did not Stop!\n"); + return NOTIFY_DONE; +} + +static const struct file_operations watchdog_fops = { + .owner = THIS_MODULE, + .llseek = no_llseek, + .open = watchdog_open, + .release = watchdog_release, + .write = watchdog_write, + .unlocked_ioctl = watchdog_ioctl, +}; + +static struct miscdevice watchdog_miscdev = { + //.minor = WATCHDOG_MINOR, + .name = DEV_NAME, + .fops = &watchdog_fops, +}; + +static struct notifier_block watchdog_notifier = { + .notifier_call = watchdog_notify_sys, +}; + +static int cpld_wdt_probe(struct platform_device *pdev) +{ + int wdt_reboot_cause, err = 0; + unsigned char ver = 0; + struct device *dev = &pdev->dev; + + struct cpld_wdt_private *p; + + p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); + if (!p) + return -ENOMEM; + + + mutex_init(&(p->wdat.lock)); + + p->wdat.ident.options = WDIOC_SETTIMEOUT + | WDIOF_MAGICCLOSE + | WDIOF_KEEPALIVEPING + | WDIOC_GETTIMELEFT; + + snprintf(p->wdat.ident.identity, + sizeof(p->wdat.ident.identity), "%s", DRV_NAME); + + wdt_reboot_cause = inb(REBOOT_CAUSE_REG); // REBOOT_CAUSE + p->wdat.caused_reboot = wdt_reboot_cause; + ver = inb(WDT_CONTROL_BASE); + pr_info("Watchdog CPLD Version:0x%02x\n", + ver); + + if (timeout) { + if (timeout <= 0 + || timeout > max_timeout) { + pr_err("starting timeout out of range\n"); + err = -EINVAL; + return err; + } + + //watchdog_start(p); + + + if (timeout > MAX_TIMER_VALUE) { + watchdog_set_timeout(p, MAX_TIMER_VALUE); + } else { + watchdog_set_timeout(p, timeout); + } + + if (nowayout) + __module_get(THIS_MODULE); + + pr_info("watchdog started with initial timeout of %u Second(s)\n", + timeout/1000); + } + + err = watchdog_set_timeout(p, timeout); + if (err) + return err; + + err = register_reboot_notifier(&watchdog_notifier); + if (err) + return err; + p->mdev = watchdog_miscdev; + err = misc_register(&p->mdev); + if (err) { + pr_err("cannot register miscdev on minor=%d\n", + watchdog_miscdev.minor); + return err;; + } + + /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE); + if (!p->wdat.res) + return -ENODEV; + + if (!devm_request_region(dev, p->wdat.res->start, + resource_size(p->wdat.res), + pdev->name)) { + return -EBUSY; + } + */ + err = sysfs_create_group(&pdev->dev.kobj, &wdt_group); + if (err) { + printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); + return err; + } + + platform_set_drvdata(pdev, p); + dev_set_drvdata(dev, p); + + pr_info("initialized. sec (nowayout=%d)\n", + nowayout); + + return 0; +} + +static int cpld_wdt_remove(struct platform_device *pdev) +{ + struct cpld_wdt_private *p = platform_get_drvdata(pdev); + + if (p) { + sysfs_remove_group(&pdev->dev.kobj, &wdt_group); + misc_deregister(&p->mdev); + unregister_reboot_notifier(&watchdog_notifier); + } + return 0; +} + +static struct platform_driver cpld_wdt_driver = { + .probe = cpld_wdt_probe, + .remove = cpld_wdt_remove, + .driver = { + .name = DRV_NAME, + }, +}; + +static struct resource cpld_wdt_resources[] = { + { + .start = 0xA100, + .end = 0xA1F2, + .flags = IORESOURCE_IO, + }, +}; + +static void wdt_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_wdt_dev = { + .name = DRV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_wdt_resources), + .resource = cpld_wdt_resources, + .dev = { + .release = wdt_dev_release, + } +}; + +static int __init cpld_wdt_init_module(void) +{ + int err = 0; + + err = platform_device_register(&cpld_wdt_dev); + err += platform_driver_register(&cpld_wdt_driver); + if(err < 0) + pr_info("Platform Device/Driver Register Failed. err:%d\n", err); + + pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION); + return err; +} + +static void __exit cpld_wdt_cleanup_module(void) +{ + platform_driver_unregister(&cpld_wdt_driver); + platform_device_unregister(&cpld_wdt_dev); + pr_info("Watchdog Module Unloaded\n"); +} + +module_init(cpld_wdt_init_module); +module_exit(cpld_wdt_cleanup_module); + + +MODULE_DESCRIPTION("Cpld Watchdog Driver"); +MODULE_VERSION(DRV_VERSION); +MODULE_AUTHOR("Nicholas "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py new file mode 100644 index 000000000000..db095d23534a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py @@ -0,0 +1,27 @@ +import os +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py similarity index 71% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py index ed2e339461ac..e325c0af5569 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py @@ -5,21 +5,24 @@ ############################################################################# import os import time +import sys +import subprocess +import re try: from sonic_platform_pddf_base.pddf_chassis import PddfChassis from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom from sonic_platform_base.chassis_base import ChassisBase - from sonic_platform.fan_drawer import FanDrawer + from sonic_platform.thermal import Thermal from sonic_platform.watchdog import Watchdog - import sys - import subprocess from sonic_py_common import device_info from sonic_platform_base.sfp_base import SfpBase except ImportError as e: raise ImportError(str(e) + "- required module not found") -NUM_COMPONENT = 2 +NUM_COMPONENTS = 4 +NUM_SENSORS = 4 +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" class Chassis(PddfChassis): """ @@ -31,17 +34,23 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None): PddfChassis.__init__(self, pddf_data, pddf_plugin_data) (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + self._watchdog = None + self._airflow_direction = None self.__initialize_components() - self.sfp_port_list = list(range(49, 56+1)) - for port_idx in self.sfp_port_list: - present = self.get_sfp(port_idx).get_presence() - self.sfp_status_dict[port_idx] = '1' if present else '0' + for sfp in self._sfp_list: + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + + # PDDF doesn't support CPU internal temperature sensor + # Hence it is created from chassis init override and + # handled appropriately in thermal APIs + self._thermal_list.append(Thermal(NUM_SENSORS)) def __initialize_components(self): from sonic_platform.component import Component - for index in range(0, NUM_COMPONENT): + for index in range(0, NUM_COMPONENTS): component = Component(index) self._component_list.append(component) @@ -99,12 +108,18 @@ def get_reboot_cause(self): with open("/sys/devices/platform/cpld_wdt/reason", "r") as f: hw_reboot_cause = f.read().strip() - if hw_reboot_cause == "0x77": + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'NPU overload reset' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU overload reset' + elif hw_reboot_cause == "0x77": reboot_cause = self.REBOOT_CAUSE_WATCHDOG description = 'Hardware Watchdog Reset' elif hw_reboot_cause == "0x66": reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER - description = 'GPIO Request Warm Reset' + description = 'GPIO Warm Reset' elif hw_reboot_cause == "0x55": reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'CPU Cold Reset' @@ -112,19 +127,34 @@ def get_reboot_cause(self): reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = 'CPU Warm Reset' elif hw_reboot_cause == "0x33": - reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'Soft-Set Cold Reset' elif hw_reboot_cause == "0x22": - reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER description = 'Soft-Set Warm Reset' elif hw_reboot_cause == "0x11": reboot_cause = self.REBOOT_CAUSE_POWER_LOSS - description = 'Power Loss' + description = 'Power Loss' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Cold Powercycle' + if os.path.isfile(HW_REBOOT_CAUSE_FILE): + with open(HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'temp_fatal': + description = 'Fatal temperature trip [Time:{}]'.format(match.group(2)) + elif match.group(1) == 'temp_critical': + description = 'Critical temperature reboot [Time:{}]'.format(match.group(2)) + elif match.group(1) == 'system': + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'System cold reboot' else: reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE description = 'Unkown Reason' - return (reboot_cause, description) + return (reboot_cause, description) def get_revision(self): version_str = self._eeprom.revision_str() @@ -133,23 +163,20 @@ def get_revision(self): return str(bytearray(version_str, 'ascii')[0]) return version_str - + @staticmethod def get_position_in_parent(): return -1 - + @staticmethod def is_replaceable(): return False def set_status_led(self, color): - color_dict = { - 'green': "STATUS_LED_COLOR_GREEN", - 'red': "STATUS_LED_COLOR_AMBER", - 'amber': "STATUS_LED_COLOR_AMBER", - 'off': "STATUS_LED_COLOR_OFF" - } - return self.set_system_led("SYS_LED", color_dict.get(color, "STATUS_LED_COLOR_OFF")) + if color == self.get_system_led("SYS_LED"): + return True + + return self.set_system_led("SYS_LED", color) def get_status_led(self): return self.get_system_led("SYS_LED") @@ -224,13 +251,14 @@ def get_change_event(self, timeout=0): time_period = timeout/float(1000) #Convert msecs to secs while time.time() < (start_time + time_period) or timeout == 0: - for port_idx in self.sfp_port_list: + for sfp in self._sfp_list: + port_idx = sfp.index if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ - self.get_sfp(port_idx).get_presence() == SFP_PRESENT: + sfp.get_presence() == SFP_PRESENT: sfp_dict[port_idx] = SFP_INSERTED self.sfp_status_dict[port_idx] = SFP_INSERTED elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ - self.get_sfp(port_idx).get_presence() == SFP_ABSENT: + sfp.get_presence() == SFP_ABSENT: sfp_dict[port_idx] = SFP_REMOVED self.sfp_status_dict[port_idx] = SFP_REMOVED @@ -240,3 +268,21 @@ def get_change_event(self, timeout=0): time.sleep(0.5) return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py similarity index 52% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py index 3b68c5759b5a..23efdbda441a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py @@ -1,128 +1,168 @@ -#!/usr/bin/env python - -############################################################################# -# Celestica -# -# Component contains an implementation of SONiC Platform Base API and -# provides the components firmware management function -# -############################################################################# - -import subprocess -import time - -try: - from sonic_platform_base.component_base import ComponentBase - #from helper import APIHelper -except ImportError as e: - raise ImportError(str(e) + "- required module not found") - -SWCPLD_VERSION_PATH = ['i2cget', '-y', '-f', '2', '0x32', '0'] -BIOS_VERSION_PATH = ['dmidecode', '-s', 'bios-version'] -COMPONENT_NAME_LIST = ["SWCPLD", "BIOS"] -COMPONENT_DES_LIST = ["Used for managing the chassis and SFP+ ports (49-56)", - "Basic Input/Output System"] - - -class Component(ComponentBase): - """Platform-specific Component class""" - - DEVICE_TYPE = "component" - - def __init__(self, component_index): - ComponentBase.__init__(self) - self.index = component_index - self.name = self.get_name() - - def __get_bios_version(self): - # Retrieves the BIOS firmware version - version = "N/A" - - try: - p = subprocess.Popen(BIOS_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - version = data[0].strip() - except IOError: - pass - - return version - - def __get_cpld_version(self): - version = "N/A" - try: - p = subprocess.Popen(SWCPLD_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True) - data = p.communicate() - ver = int(data[0].strip(), 16) - version = "{0}.{1}".format(ver >> 4, ver & 0x0F) - except (IOError, ValueError): - pass - - return version - - def get_name(self): - """ - Retrieves the name of the component - Returns: - A string containing the name of the component - """ - return COMPONENT_NAME_LIST[self.index] - - def get_description(self): - """ - Retrieves the description of the component - Returns: - A string containing the description of the component - """ - return COMPONENT_DES_LIST[self.index] - - def get_firmware_version(self): - """ - Retrieves the firmware version of module - Returns: - string: The firmware versions of the module - """ - fw_version = None - - if self.name == "BIOS": - fw_version = self.__get_bios_version() - elif "CPLD" in self.name: - fw_version = self.__get_cpld_version() - - return fw_version - - def install_firmware(self, image_path): - """ - Install firmware to module - Args: - image_path: A string, path to firmware image - Returns: - A boolean, True if install successfully, False if not - """ - return False - - def update_firmware(self, image_path): - return False - - def get_available_firmware_version(self, image_path): - return 'N/A' - - def get_firmware_update_notification(self, image_path): - return "None" - - def get_model(self): - return 'N/A' - - def get_position_in_parent(self): - return -1 - - def get_presence(self): - return True - - def get_serial(self): - return 'N/A' - - def get_status(self): - return True - - def is_replaceable(self): - return False +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase + #from helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +COMPONENT_NAME = 0 +COMPONENT_DESC = 1 +COMPONENT_VER_CMD = 2 +COMPONENT_VER_FN = 3 +BIOS_VERSION_CMD = ['dmidecode', '-s', 'bios-version'] +ONIE_VERSION_CMD = ['cat', '/host/machine.conf'] +SWCPLD_VERSION_CMD = ['i2cget', '-y', '-f', '2', '0x32', '0'] +SSD_VERSION_CMD = ['smartctl', '-i', '/dev/sda'] + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + self.component_list = [["BIOS", "Basic Input/Output System", BIOS_VERSION_CMD, self.__get_cmd_output],\ + ["ONIE", "Open Network Install Environment", ONIE_VERSION_CMD, self.__get_onie_version],\ + ["CPLD SW", "CPLD for board functions, watchdog and port control SFP(49-56)", SWCPLD_VERSION_CMD, self.__get_cpld_version],\ + ["SSD", "Solid State Drive - {}", SSD_VERSION_CMD, self.__get_ssd_version]] + + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __get_cmd_output(self): + cmd = self.component_list[self.index][COMPONENT_VER_CMD] + version = "N/A" + + try: + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + version = data[0].strip() + except IOError: + pass + + return version + + def __get_onie_version(self): + version = "N/A" + + ret = re.search(r"(?<=onie_version=).+[^\n]", self.__get_cmd_output()) + if ret != None: + version = ret.group(0) + + return version + + def __get_ssd_version(self): + version = "N/A" + + ret = re.search(r"Firmware Version: +(.*)[^\\]", self.__get_cmd_output()) + if ret != None: + try: + version = ret.group(1) + except (IndexError): + pass + + return version + + def __get_cpld_version(self): + version = "N/A" + + try: + ver = int(self.__get_cmd_output(), 16) + version = "{0}.{1}".format(ver >> 4, ver & 0x0F) + except (ValueError): + pass + + return version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.component_list[self.index][COMPONENT_NAME] + + def __get_ssd_desc(self, desc_format): + description = "N/A" + + ret = re.search(r"Device Model: +(.*)[^\\]", self.__get_cmd_output()) + if ret != None: + try: + description = desc_format.format(ret.group(1)) + except (IndexError): + pass + + return description + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.__get_ssd_desc(self.component_list[self.index][COMPONENT_DESC]) + + return self.component_list[self.index][COMPONENT_DESC] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + fw_version = self.component_list[self.index][COMPONENT_VER_FN]() + + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + return False + + def update_firmware(self, image_path): + return False + + def get_available_firmware_version(self, image_path): + return 'N/A' + + def get_firmware_update_notification(self, image_path): + return "None" + + def get_model(self): + return 'N/A' + + def get_position_in_parent(self): + return -1 + + def get_presence(self): + return True + + def get_serial(self): + return 'N/A' + + def get_status(self): + return True + + def is_replaceable(self): + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py similarity index 81% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py index bc1ef6420b68..5379db32a5a0 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py @@ -6,7 +6,7 @@ class Eeprom(PddfEeprom): - _TLV_DISPLAY_VENDOR_EXT = True + _TLV_DISPLAY_VENDOR_EXT = True _TLV_INFO_MAX_LEN = 256 pddf_obj = {} plugin_data = {} @@ -58,18 +58,11 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None): else: name, value = self.decoder(None, tlv) - self.eeprom_tlv_dict[code] = value + self.eeprom_tlv_dict[code] = value.strip() if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: break tlv_index += (eeprom[tlv_index+1]) + 2 - def vendor_ext_str(self): - """ - :return: the direction of fan(FB or BF, string) - """ - (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_VENDOR_EXT) - if not is_valid: - return "N/A" - return str(hex(int(results[2][2]))).replace("0x", "").upper() - # Provide the functions/variables below for which implementation is to be overwritten + def get_vendor_extn(self): + return self.eeprom_tlv_dict.get('0xFD', 'N/A') diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..3a71e9723900 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py @@ -0,0 +1,153 @@ +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + import subprocess +except ImportError as e: + raise ImportError(str(e) + "- required module not found") +# ------------------------------------------------------------------ +# HISTORY: +# 5/1/2022 (A.D.) +# add function:set_status_led, +# Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525 +# ------------------------------------------------------------------ + +MIN_SPEED = 40 # Percentage + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + self.max_speed_rpm = 28600 #Max RPM from FAN spec + + # Remap LED color READ and OFF to AMBER as they are unsupported + self.STATUS_LED_COLOR_RED = "amber" + self.STATUS_LED_COLOR_OFF = "amber" + + def get_presence(self): + if not self.is_psu_fan: + # FANs on Ds1000 are all Fixed and present + return True + + #For PSU, FAN must be present when PSU is present + try: + cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41'] + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + status = int(data[0].strip(), 16) + if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \ + (self.fans_psu_index == 2 and (status & 0x20) == 0): + return True + except (IOError, ValueError): + pass + + def get_status(self): + if not self.is_psu_fan: + if not self.get_presence(): + return False + + # FANs must not be operated below MIN_SPEED + target_speed = self.get_target_speed() + if target_speed < MIN_SPEED: + return False + + # FANs target speed and actual speed must + # be within specified tolerance limits + current_speed = self.get_speed() + speed_tolerance = self.get_speed_tolerance() + if abs(target_speed - current_speed) > speed_tolerance: + return False + + return True + + return super().get_status() + + # Override get_speed as PDDF retrieves the speed from the + # set PWM value which is actually the target fan speed + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + if self.is_psu_fan: + return super().get_speed() + + # Percentage of current FAN speed against the max FAN speed + return round(super().get_speed_rpm() * 100 / self.max_speed_rpm) + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + if self.is_psu_fan: + # Ds1000 PSU module only has EXHAUST fan + return "exhaust" + + return super().get_direction() + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.is_psu_fan: + return "N/A" + + return super().get_status_led() + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + + Args: + color: A string representing the color with which to set the + fan module status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + if self.is_psu_fan: + return False + + if self.get_status_led() == color: + return True + + return super().set_status_led(color) + + def get_name(self): + if self.is_psu_fan: + return "PSU {} Fan {}".format(self.fans_psu_index, self.fan_index) + else: + return "Fan {}".format(self.fantray_index) + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py similarity index 91% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py index ac80aad4b1eb..beec44630406 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py @@ -6,7 +6,7 @@ ############################################################################# try: - from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer except ImportError as e: raise ImportError(str(e) + "- required module not found") @@ -16,8 +16,8 @@ class FanDrawer(PddfFanDrawer): def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): # idx is 0-based PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) - - + + def set_status_led(self, color): return self._fan_list[0].set_status_led(color) @@ -31,3 +31,6 @@ def get_serial(self): def get_model(self): model = "Unknown" return model + + def get_name(self): + return "Drawer {0}".format(self.fantray_index) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py new file mode 100644 index 000000000000..0f8bc0830384 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py similarity index 100% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py similarity index 61% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py index f1047bed740a..a3a7f6da8f34 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py @@ -6,12 +6,12 @@ class Psu(PddfPsu): """PDDF Platform-Specific PSU class""" - + PLATFORM_PSU_CAPACITY = 550 def __init__(self, index, pddf_data=None, pddf_plugin_data=None): PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) - + # Provide the functions/variables below for which implementation is to be overwritten def get_capacity(self): """ @@ -71,3 +71,38 @@ def get_voltage_low_threshold(self): e.g. 12.1 """ return 11.4 + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + # When AC power is not plugged into one of the PSU, the FAN of + # that PSU is driven using the power from the alternate PSU and + # because of this the PSU VOUT might read a small voltage value + # and it is misleading. Therefore the PSU VOUT is fetched from + # HW only when PSU status is OK + if self.get_status(): + return super().get_voltage() + + return 0.0 + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + # In Ds1000 PSU LED is controlled by the PSU firmware, so soft + # simulating the LED in a generic way based on the PSU status + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_AMBER + + return "N/A" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..9187edb1fdf3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py @@ -0,0 +1,36 @@ +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + self.index = index+1 + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + return self.SFP_STATUS_OK + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + + SFP+ don't support reset, so raise the error of NotImplemented + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..b17dfa4457df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py @@ -0,0 +1,105 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +import subprocess + +HIGH_THRESHOLD = 0 +LOW_THRESHOLD = 1 +HIGH_CRIT_THRESHOLD = 2 +LOW_CRIT_THRESHOLD = 3 + +NUM_SENSORS = 4 +CPU_SENSOR_STR = "CPU Internal Temp" +thermal_limits = { + # : , , , + 'Front Right Temp': [50.0, None, None, None], + 'Front Left Temp': [50.0, None, None, None], + 'Rear Right Temp': [50.0, None, None, None], + 'ASIC External Temp': [100.0, None, 105.0, None], + CPU_SENSOR_STR: [88.0, None, 91.0, None] +} + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + # PDDF doesn't support CPU internal temperature sensor + # Hence it is created from chassis init override and + # handled appropriately in thermal APIs + self.thermal_index = index + 1 + self.is_psu_thermal = is_psu_thermal + if self.thermal_index <= NUM_SENSORS: + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + if self.thermal_index <= NUM_SENSORS: + return super().get_name() + + return CPU_SENSOR_STR + + def get_temperature(self): + if self.thermal_index <= NUM_SENSORS: + return super().get_temperature() + + temperature = 0.0 + cmd = ['cat', '/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input'] + try: + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + temperature = int(data[0].strip())/1000.0 + except (IOError, ValueError): + pass + + return temperature + + def get_low_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[LOW_THRESHOLD] + + return None + + def __get_psu_high_threshold(self): + thermal_limit = None + try: + cmd = ['i2cget', '-y', '-f', '4', str(0x58 + (self.thermals_psu_index - 1)), '0x51', 'w'] + p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + data = p.communicate() + thermal_limit = int(data[0].strip(), 16) + except (IOError, ValueError): + pass + + return thermal_limit + + def get_high_threshold(self): + if self.is_psu_thermal: + return self.__get_psu_high_threshold() + + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[HIGH_THRESHOLD] + + return None + + def get_low_critical_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[LOW_CRIT_THRESHOLD] + + return None + + def get_high_critical_threshold(self): + thermal_limit = thermal_limits.get(self.get_name(), None) + if thermal_limit != None: + return thermal_limit[HIGH_CRIT_THRESHOLD] + + return None + + def set_high_threshold(self, temperature): + raise NotImplementedError + + def set_low_threshold(self, temperature): + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py similarity index 98% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py index 7973e8a3cfad..d43e1d74f5e3 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py @@ -1,7 +1,7 @@ #!/usr/bin/env python ############################################################################# -# +# # Watchdog contains an implementation of SONiC Platform Base Watchdog API # ############################################################################# @@ -55,14 +55,14 @@ class CpldWatchdog(WatchdogBase): watchdog = None def __init__(self): global watchdog - self.status_path = "/sys/devices/platform/cpld_wdt/status" - self.state_path = "/sys/devices/platform/cpld_wdt/state" - self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" + self.status_path = "/sys/devices/platform/cpld_wdt/status" + self.state_path = "/sys/devices/platform/cpld_wdt/state" + self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" # Set default value with open("/sys/devices/platform/cpld_wdt/state", "r") as fd: txt = fd.read() - state = txt.strip() - self.armed = True if state == "active" else False + state = txt.strip() + self.armed = True if state == "active" else False self.timeout = DEFAULT_TIMEOUT if not watchdog: watchdog = os.open("/dev/cpld_wdt", os.O_RDWR) @@ -160,7 +160,7 @@ def arm(self, seconds): else: self._enable() self.armed = True - + ret = self.timeout except IOError as e: pass @@ -226,4 +226,3 @@ def __init__(self): CpldWatchdog.__init__(self) # Provide the functions/variables below for which implementation is to be overwritten - diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh new file mode 100755 index 000000000000..a1ea8ccbe4ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# CPLD CPU cold power-cycle +i2cset -f -y 2 0x32 0x18 0x0 + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..9fd8364e23b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh @@ -0,0 +1,22 @@ +#!/bin/bash + +# Enable FAN WDT +sudo i2cset -y -f 2 0x32 0x30 0x01 + +# Set all FAN speed to 100% +sudo i2cset -y -f 2 0x32 0x32 0xff +sudo i2cset -y -f 2 0x32 0x36 0xff +sudo i2cset -y -f 2 0x32 0x3a 0xff + +# Set FAN LED status to GREEN +sudo i2cset -y -f 2 0x32 0x33 0x2 +sudo i2cset -y -f 2 0x32 0x37 0x2 +sudo i2cset -y -f 2 0x32 0x3b 0x2 + +# Set Alarm LED status to OFF, since it is unused in SONiC +sudo i2cset -y -f 2 0x32 0x44 0x00 + +# Set SYS LED status to GREEN +sudo i2cset -y -f 2 0x32 0x43 0xec + +echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh similarity index 70% rename from platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh rename to platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh index 2b37a5d5f6ff..39b055c1e55a 100755 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh @@ -1,5 +1,5 @@ #!/bin/bash -modprobe -r i2c_ismt +modprobe -r i2c_ismt sleep 0.1 modprobe -r i2c-i801 sleep 0.1 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service new file mode 100644 index 000000000000..7269080b53bc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service @@ -0,0 +1,17 @@ +[Unit] +Description=Ds1000 Fan Control service +After=pddf-platform-init.service +Requires=pddf-platform-init.service +BindsTo=pddf-platform-init.service + +[Service] +Type=simple +ExecStart=/usr/local/bin/ds1000_fanctld.py +KillSignal=SIGTERM +SuccessExitStatus=0 + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..becd98ea602e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service ds1000-fan-control.service +Before=opennsl-modules.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target +WantedBy=opennsl-modules.service diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py new file mode 100755 index 000000000000..9955568ac237 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py @@ -0,0 +1,346 @@ +#!/usr/bin/python3 +# +# Copyright (C) Celestica Technology Corporation +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# ------------------------------------------------------------------ +# HISTORY: +# 9/16/2021 (A.D.) +# ------------------------------------------------------------------ + +try: + import os + import sys + import getopt + import subprocess + import re + import time + import signal + from sonic_platform import platform + from sonic_py_common import daemon_base +except ImportError as e: + raise ImportError('%s - required module not found' % repr(e)) + +# Constants +NOMINAL_TEMP = 30 # degree C +MODULE_NAME = 'ds1000fanctld' +SP_LOW_TEMP = 0 +SP_HIGH_TEMP = 1 +SP_CRITICAL_TEMP = 2 +SP_FATAL_TEMP = 3 +SP_REF_TEMP = 4 +SP_FAN_SPEED = 5 +SP_VALIDATE = 6 + +# Daemon control platform specific constants +PDDF_INIT_WAIT = 30 #secs +POLL_INTERVAL = 10 #secs +CRITICAL_DURATION = 120 #secs +CRITICAL_LOG_INTERVAL = 20 #every 'n' secs +FAN_DUTY_MIN = 40 # percentage +FAN_DUTY_MAX = 100 #percentage +TEMP_HYST = 3 # degree C +NUM_FANS = 3 + +# Validation functions +def valid_if_exhaust(fan_dir): + if fan_dir == "EXHAUST": + return True + + return False + +def valid_if_intake(fan_dir): + if fan_dir == "INTAKE": + return True + + return False + +def valid_always(fan_dir): + return True + +def valid_never(fan_dir): + return False + +# Core data for Thermal FAN speed evaluation +# {: [low_temp, high_temp, critical_temp, fatal_temp, current_temp, fanspeed, validate_function]} +SENSOR_PARAM = { + 'Front Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_exhaust], + 'Front Left Temp': [None, None, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_never], + 'Rear Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_intake], + 'ASIC External Temp': [54, 69, 105, 110, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always], + 'CPU Internal Temp': [69, 84, 91, 94, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always] +} + +class Ds1000FanControl(daemon_base.DaemonBase): + global MODULE_NAME + global SENSOR_PARAM + + def __init__(self, log_level): + + str_to_log_level = { + 'ERROR' : self.LOG_PRIORITY_ERROR, \ + 'WARNING' : self.LOG_PRIORITY_WARNING, \ + 'NOTICE': self.LOG_PRIORITY_NOTICE, \ + 'INFO': self.LOG_PRIORITY_INFO, \ + 'DEBUG': self.LOG_PRIORITY_DEBUG + } + self.fan_list = [] + self.thermal_list = [] + + super(Ds1000FanControl, self).__init__(MODULE_NAME) + if log_level is not None: + self.set_min_log_priority(str_to_log_level.get(log_level)) + self.log_info("Forcing to loglevel {}".format(log_level)) + self.log_info("Starting up...") + + self.log_debug("Waiting {} secs for PDDF driver initialization".format(PDDF_INIT_WAIT)) + time.sleep(PDDF_INIT_WAIT) + + try: + self.critical_period = 0 + self.platform_chassis = platform.Platform().get_chassis() + + # Fetch FAN info + self.fan_list = self.platform_chassis.get_all_fans() + if len(self.fan_list) != NUM_FANS: + self.log_error("Fans detected({}) is not same as expected({}), so exiting..."\ + .format(len(self.fan_list), NUM_FANS)) + sys.exit(1) + + self.fan_dir = self.fan_list[0].get_direction() + self.log_debug("Fans direction is {}".format(self.fan_dir)) + + # Fetch THERMAL info + self.thermal_list = self.platform_chassis.get_all_thermals() + if len(self.thermal_list) != len(SENSOR_PARAM): + self.log_error("Thermals detected({}) is not same as expected({}), so exiting..."\ + .format(len(self.thermal_list), len(SENSOR_PARAM))) + sys.exit(1) + + # Initialize the thermal temperature dict + # {: [thermal_temp, fanspeed]} + for thermal in self.thermal_list: + thermal_name = thermal.get_name() + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal.get_temperature() + + except Exception as e: + self.log_error("Failed to init Ds1000FanControl due to {}, so exiting...".format(repr(e))) + sys.exit(1) + + # Signal handler + def signal_handler(self, sig, frame): + if sig == signal.SIGHUP: + self.log_notice("Caught SIGHUP - ignoring...") + elif sig == signal.SIGINT: + self.log_warning("Caught SIGINT - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX)) + self.set_all_fan_speed(FAN_DUTY_MAX) + sys.exit(0) + elif sig == signal.SIGTERM: + self.log_warning("Caught SIGTERM - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX)) + self.set_all_fan_speed(FAN_DUTY_MAX) + sys.exit(0) + else: + self.log_notice("Caught unhandled signal '" + sig + "'") + + + @staticmethod + def is_fan_operational(fan): + if fan.get_presence() and fan.get_status(): + return True + + return False + + @staticmethod + def get_speed_from_min_max(cur_temp, min_temp, max_temp, min_speed, max_speed): + if cur_temp <= min_temp: + speed = min_speed + elif cur_temp >= max_temp: + speed = max_speed + else: + multiplier = (max_speed - min_speed) / (max_temp - min_temp) + speed = int(((cur_temp - min_temp) * multiplier) + min_speed) + + return speed + + def thermal_shutdown(self, reason): + cmd = ['/usr/local/bin/ds1000_platform_shutdown.sh', reason] + + proc = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True) + proc.communicate() + if proc.returncode == 0: + return True + else: + self.log_error("Thermal {} shutdown failed with errorno {}"\ + .format(reason, proc.returncode)) + return False + + def get_fan_speed_from_thermals(self): + prominent_speed = FAN_DUTY_MIN + is_critical = False + + for thermal in self.thermal_list: + speed = prominent_speed + thermal_name = thermal.get_name() + thermal_temp = thermal.get_temperature() + thermal_info = SENSOR_PARAM[thermal_name] + thermal_ref = thermal_info[SP_REF_TEMP] + thermal_low = thermal_info[SP_LOW_TEMP] + thermal_high = thermal_info[SP_HIGH_TEMP] + thermal_critical = thermal_info[SP_CRITICAL_TEMP] + thermal_fatal = thermal_info[SP_FATAL_TEMP] + + if thermal_info[SP_VALIDATE](self.fan_dir): + self.log_debug("{} temperature is {}C".format(thermal_name, thermal_temp)) + if thermal_temp <= thermal_low: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_low + speed = FAN_DUTY_MIN + elif thermal_temp >= thermal_high: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_high + speed = FAN_DUTY_MAX + if thermal_fatal and thermal_temp >= thermal_fatal: + # Double check since immediate cold power-cycle + # is an expensive operation in field + if thermal.get_temperature() >= thermal_fatal: + self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C)."\ + " Triggering immediate cold power-cycle"\ + .format(thermal_name, thermal_temp, thermal_fatal)) + self.thermal_shutdown('temp_fatal') + sys.exit(0) + else: + self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C) intermittently"\ + .format(thermal_name, thermal_temp, thermal_fatal)) + elif thermal_critical and thermal_temp >= thermal_critical: + if self.critical_period < CRITICAL_DURATION: + if self.critical_period % CRITICAL_LOG_INTERVAL == 0: + self.log_warning("'{}' temperature ({}C) hit critical limit ({}C)."\ + " Triggering cold power-cycle in {} seconds"\ + .format(thermal_name, thermal_temp, thermal_critical,\ + (CRITICAL_DURATION - self.critical_period))) + is_critical = True + else: + self.log_warning("'{}' temperature ({}C) is in critical limit ({}C) for more"\ + " than {} seconds. Triggering cold power-cycle now"\ + .format(thermal_name, thermal_temp, thermal_critical,\ + CRITICAL_DURATION)) + self.thermal_shutdown('temp_critical') + sys.exit(0) + + else: + if thermal_temp > thermal_ref: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp + speed = self.get_speed_from_min_max(thermal_temp, thermal_low, thermal_high,\ + FAN_DUTY_MIN, FAN_DUTY_MAX) + elif thermal_ref - thermal_temp >= TEMP_HYST: + SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp + 1 + speed = self.get_speed_from_min_max(thermal_temp + 1, thermal_low, thermal_high,\ + FAN_DUTY_MIN, FAN_DUTY_MAX) + else: + speed = SENSOR_PARAM[thermal_name][SP_FAN_SPEED] + + self.log_debug("{} thermal speed is {}%".format(thermal_name, speed)) + SENSOR_PARAM[thermal_name][SP_FAN_SPEED] = speed + prominent_speed = max(prominent_speed, speed) + + if is_critical: + self.critical_period = self.critical_period + POLL_INTERVAL + elif self.critical_period > 0: + self.critical_period = 0 + self.log_notice("All thermals are now below critical limit."\ + " System cold power-cycle is now cancelled") + + self.log_debug("Prominent thermal speed is {}%".format(prominent_speed)) + + return prominent_speed + + def set_all_fan_speed(self, speed): + for fan in self.fan_list: + fan_name = fan.get_name() + try: + if fan.set_speed(speed): + self.log_debug("Set {} speed to {}%".format(fan_name, speed)) + else: + self.log_error("Set '{}' to speed {}% failed".format(fan_name, speed)) + except Exception as e: + self.log_error("Set '{}' to speed {}% failed due to {}".format(fan_name, speed, repr(e))) + + return False + + def run(self): + while True: + num_good_fans = 0 + dir_mismatch = False + for fan in self.fan_list: + if self.is_fan_operational(fan): + num_good_fans = num_good_fans + 1 + else: + self.log_notice("FAN '{}' is broken or not inserted".format(fan.get_name())) + + if self.fan_dir is None: + self.fan_dir = fan.get_direction() + elif self.fan_dir != fan.get_direction(): + dir_mismatch = True + self.log_debug("{} FANs are operational, there is{}direction mismatch"\ + .format('All' if num_good_fans == len(self.fan_list) else num_good_fans, + ' ' if dir_mismatch else ' no ')) + + # Always evaluate the thermals irrespective of the FAN state + speed = self.get_fan_speed_from_thermals() + + if dir_mismatch: + self.log_warning("Some FANs have incompatible direction. Please replace FANs immediately") + else: + if num_good_fans == len(self.fan_list): # Good FANs is equal to number of FANs + self.set_all_fan_speed(speed) + else: + if not num_good_fans: # None of the FANs are operational + self.log_warning("Overheating hazard!! All FANs are broken or not inserted") + else: + self.log_warning("Some FANs are broken or not inserted") + self.set_all_fan_speed(FAN_DUTY_MAX) + + time.sleep(POLL_INTERVAL) + +def main(argv): + log_level = None + valid_log_levels = ['ERROR', 'WARNING', 'NOTICE', 'INFO', 'DEBUG'] + + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv, 'hdl', ['log-level=']) + except getopt.GetoptError: + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + sys.exit(1) + for opt, arg in opts: + if opt == '-h': + print('Usage: %s [-d] [-l ]\nlog_level - ERROR, WARNING, NOTICE, INFO, DEBUG' % sys.argv[0]) + sys.exit(1) + elif opt in ('-l', '--log-level'): + if log_level not in valid_log_levels: + print('Invalid log level %s' % arg) + sys.exit(1) + elif opt == '-d': + log_level = 'DEBUG' + + fanctl = Ds1000FanControl(log_level) + + fanctl.log_debug("Start daemon main loop") + # Loop forever, doing something useful hopefully: + fanctl.run() + fanctl.log_debug("Stop daemon main loop") + + sys.exit(0) + +if __name__ == '__main__': + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py new file mode 100755 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile new file mode 100644 index 000000000000..51583c9fbbce --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile @@ -0,0 +1,5 @@ +TARGET:= pddf_custom_psu_driver_module +$(TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := $(TARGET).o +obj-m += mc24lc64t.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o lpc_basecpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c new file mode 100644 index 000000000000..f925b5d84564 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c @@ -0,0 +1,720 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * lpc_basecpld.c - The CPLD driver for the Base Board of ds2000 + * The driver implement sysfs to access CPLD register on the baseboard of ds2000 via LPC bus. + * + * Author: Nicholas Wu /Oscar Xu + * Copyright (C) 2022-2024 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define PSU_LED_ADDR 0xA161 +#define SYS_LED_ADDR 0xA162 +#define ALARM_LED_ADDR 0xA163 +#define FAN_LED_ADDR 0xA165 +#define COME_CPLD_VER_ADDR 0xA1E0 + +#define CPLD_REGISTER_SIZE 0xFF + +/* LED CTRL */ + +enum FAN_LED { + fan_led_amb = 1, + fan_led_grn, + fan_led_off, + fan_led_auto = 0x10 +} fan_led; + +enum SYS_LED { + sys_led_both = 0, + sys_led_grn, + sys_led_amb, + sys_led_off +} sys_led; + +enum PWR_LED { + pwr_led_amb = 1, + pwr_led_grn, + pwr_led_off, + pwr_led_auto = 0x10 +} pwr_led; + +enum ALARM_LED { + alarm_led_both = 0, + alarm_led_grn, + alarm_led_amb, + alarm_led_off +} alarm_led; + +enum LED_CTRL { + led_on = 0, + led_blk_1hz, + led_blk_4hz, + led_off +} led_ctrl; + +#define LED_OFF "off" +#define LED_GREEN "green" +#define LED_AMBER "amber" +#define LED_HZ_GBNK "grn_bnk_1hz" +#define LED_HZ_ABNK "amb_bnk_1hz" +#define LED_QHZ_GBNK "grn_bnk_4hz" +#define LED_QHZ_ABNK "amb_bnk_4hz" +#define LED_HZ_GABNK "grn_amb_1hz" +#define LED_QHZ_GABNK "grn_amb_4hz" + +struct cpld_b_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct cpld_b_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + + return sprintf(buf, "0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + int ret = 0; + unsigned long data; + + mutex_lock(&cpld_data->cpld_lock); + ret = kstrtoul(buf, 0, &data); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int len = 0; + unsigned char value = 0; + + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(VERSION_ADDR); + len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + + return len; +} + + +static ssize_t getreg_store(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + int ret = 0; + unsigned long addr; + + ret = kstrtoul(buf, 0, &addr); + if (ret != 0) { + return ret; + } + cpld_data->read_addr = addr; + + return count; +} + +static ssize_t getreg_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int len = 0; + + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n", inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + + return len; +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + int ret = 0; + unsigned long addr; + unsigned long value; + char *tok; + char clone[20]; + char *pclone = clone; + + strscpy(clone, buf,sizeof(clone)); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char **)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + ret = kstrtoul(tok, 0, &addr); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + + tok = strsep((char **)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + ret = kstrtoul(tok, 0, &value); + if (ret != 0) { + mutex_unlock(&cpld_data->cpld_lock); + return ret; + } + outb(value, addr); + mutex_unlock(&cpld_data->cpld_lock); + + return count; +} + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if (i < count) { + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; + mutex_unlock(&cpld_data->cpld_lock); + + return status; +} + +/** + * @brief Show status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/on/blink + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + unsigned char color = 0; + unsigned char control = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + color = (data & 0x30) >> 4; + control = (data & 0x3); + + switch(color){ + case sys_led_both: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GABNK); + }else{ + break; + } + case sys_led_amb: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_ABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_ABNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_AMBER); + }else{ + break; + } + case sys_led_grn: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GBNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GBNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_GREEN); + }else{ + break; + } + default: + break; + } + + return sprintf(buf, "%s\n", LED_OFF); +} + +/** + * @brief Set the status led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/on/blink + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + if(sysfs_streq(buf, LED_OFF)){ + data &= 0xCC; + data |= sys_led_off << 4; + data |= led_off; + }else if(sysfs_streq(buf, LED_GREEN)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_AMBER)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_HZ_GBNK)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_HZ_ABNK)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GBNK)){ + data &= 0xCC; + data |= sys_led_grn << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_QHZ_ABNK)){ + data &= 0xCC; + data |= sys_led_amb << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_HZ_GABNK)){ + data &= 0xCC; + data |= sys_led_both << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GABNK)){ + data &= 0xCC; + data |= sys_led_both << 4; + data |= led_blk_4hz; + }else{ + count = -EINVAL; + } + + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/** + * @brief Show alarm led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return led state - off/on/blink + */ +static ssize_t alarm_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + unsigned char color = 0; + unsigned char control = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(ALARM_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + color = (data & 0x30) >> 4; + control = (data & 0x3); + + switch(color){ + case alarm_led_both: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GABNK); + }else{ + break; + } + case alarm_led_amb: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_ABNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_ABNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_AMBER); + }else{ + break; + } + case alarm_led_grn: + if ( control == led_blk_1hz){ + return sprintf(buf, "%s\n", LED_HZ_GBNK); + }else if(control == led_blk_4hz){ + return sprintf(buf, "%s\n", LED_QHZ_GBNK); + }else if(control == led_on){ + return sprintf(buf, "%s\n", LED_GREEN); + }else{ + break; + } + default: + break; + } + + return sprintf(buf, "%s\n", LED_OFF); +} + +/** + * @brief Set the alarm led + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value - off/on/blink + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t alarm_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char data; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(ALARM_LED_ADDR); + if(sysfs_streq(buf, LED_OFF)){ + data &= 0xCC; + data |= alarm_led_off << 4; + data |= led_off; + }else if(sysfs_streq(buf, LED_GREEN)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_AMBER)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_on; + }else if(sysfs_streq(buf, LED_HZ_GBNK)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_HZ_ABNK)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GBNK)){ + data &= 0xCC; + data |= alarm_led_grn << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_QHZ_ABNK)){ + data &= 0xCC; + data |= alarm_led_amb << 4; + data |= led_blk_4hz; + }else if(sysfs_streq(buf, LED_HZ_GABNK)){ + data &= 0xCC; + data |= alarm_led_both << 4; + data |= led_blk_1hz; + }else if(sysfs_streq(buf, LED_QHZ_GABNK)){ + data &= 0xCC; + data |= alarm_led_both << 4; + data |= led_blk_4hz; + + }else{ + count = -EINVAL; + } + + outb(data, ALARM_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t pwr_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + if ((data & 0x10) != 0) + { + return sprintf(buf, "%s\n", "auto"); + } + data = data & 0x3; + return sprintf(buf, "%s\n", + data == pwr_led_grn ? "green" : data == pwr_led_amb ? "amber" : "off"); +} + + +static ssize_t pwr_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = pwr_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = pwr_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = pwr_led_amb; + } else if (sysfs_streq(buf, "auto")) { + led_status = pwr_led_auto; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(PSU_LED_ADDR); + /* Set bit 4 as 0 to control pwrled by software */ + data = data & ~(0x13); + data = data | led_status; + outb(data, PSU_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +static ssize_t fan_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + if ((data & 0x10) != 0) + { + return sprintf(buf, "%s\n", "auto"); + } + data = data & 0x3; + return sprintf(buf, "%s\n", + data == fan_led_grn ? "green" : data == fan_led_amb ? "amber" : "off"); +} + + +static ssize_t fan_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status, data; + + if (sysfs_streq(buf, "off")) { + led_status = fan_led_off; + } else if (sysfs_streq(buf, "green")) { + led_status = fan_led_grn; + } else if (sysfs_streq(buf, "amber")) { + led_status = fan_led_amb; + } else if (sysfs_streq(buf, "auto")) { + led_status = fan_led_auto; + } else { + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(FAN_LED_ADDR); + /* Set bit 4 as 0 to control fanled by software */ + data = data & ~(0x13); + data = data | led_status; + outb(data, FAN_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} + +/* COME CPLD version attributes */ +static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // COME CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} + +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); +static DEVICE_ATTR_RO(version); +static DEVICE_ATTR_RW(scratch); +static DEVICE_ATTR_RW(getreg); +static DEVICE_ATTR_WO(setreg); +static DEVICE_ATTR_RW(sys_led); +static DEVICE_ATTR_RW(alarm_led); +static DEVICE_ATTR_RW(pwr_led); +static DEVICE_ATTR_RW(fan_led); +static DEVICE_ATTR_RO(come_cpld_version); + +static struct attribute *cpld_b_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_alarm_led.attr, + &dev_attr_pwr_led.attr, + &dev_attr_fan_led.attr, + &dev_attr_come_cpld_version.attr, + NULL, +}; + +static struct bin_attribute *cpld_b_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group cpld_b_attrs_grp = { + .attrs = cpld_b_attrs, + .bin_attrs = cpld_b_bin_attrs, +}; + +static struct resource cpld_b_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_b_dev_release(struct device *dev) +{ + return; +} + +static struct platform_device cpld_b_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_b_resources), + .resource = cpld_b_resources, + .dev = { + .release = cpld_b_dev_release, + } +}; + +static int cpld_b_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err = 0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + dev_err(&pdev->dev, "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + if (err) { + dev_err(&pdev->dev, "Cannot create sysfs for baseboard CPLD\n"); + return err; + } + return 0; +} + +static int cpld_b_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + return 0; +} + +static struct platform_driver cpld_b_drv = { + .probe = cpld_b_drv_probe, + .remove = __exit_p(cpld_b_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_b_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_b_dev); + platform_driver_register(&cpld_b_drv); + return 0; +} + +void cpld_b_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_b_drv); + platform_device_unregister(&cpld_b_dev); +} + +module_init(cpld_b_init); +module_exit(cpld_b_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("LPC CPLD baseboard driver"); +MODULE_VERSION("0.0.2"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c new file mode 100644 index 000000000000..4603b3d41065 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c @@ -0,0 +1,171 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8)| off; + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..32ed875df587 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,631 @@ +/* +* +* Licensed under the GNU General Public License Version 2 +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +/* +* pddf_xilinx_device_7021_algo.c +* Description: +* A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters +* +*********************************************************************************/ +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: ocores I2C device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: ocores I2C device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } + else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + return err; +} + +static void ocores_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + + +static int fpgai2c_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = ocores_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + ocores_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + while( (-EIO == err) && (retry < max_retry)) + { + err = fpgai2c_poll(i2c, msgs, num); + retry++; + } + + return err; + +} + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ +/* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm= { + .master_xfer = fpgai2c_xfer, /*write I2C messages */ + .functionality = fpgai2c_func, /* what the adapter supports */ +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +} + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#if DEBUG + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) { + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &fpgai2c_algorithm; + + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_xilinx_device_7021_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} + +static void __exit pddf_xilinx_device_7021_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + + +module_init (pddf_xilinx_device_7021_algo_init); +module_exit (pddf_xilinx_device_7021_algo_exit); +MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..4ea09f09404f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define FPGA_VERSION_ADDR 0x0000 +#define FPGA_SCRATCH_ADDR 0x0004 +#define FPGA_BCM_TEMP_ADDR 0x001c +#define FPGA_BCM_TEMP_LOW_ADDR 0x0078 +#define FPGA_BCM_TEMP_HIGH_ADDR 0x0080 +#define FPGA_REG_SPACE_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > FPGA_REG_SPACE_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + +/** + * Show value of fpga bcm switch internal temp sensor register calculated by FPGA + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff; + + return sprintf(buf, "0x%08x\n", reg_val); +} + +/** + * Show value of fpga bcm switch internal temp sensor register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff; + u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff; + + return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL); +static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL); +static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_bcm_temp_fpga.attr, + &dev_attr_bcm_temp.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga access/control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h new file mode 100644 index 000000000000..cb6dbe29c0bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h @@ -0,0 +1,504 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_VIN_OFF BIT(3) +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 10 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, int page, int phase); +int pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py similarity index 98% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py index 159e26656138..a1535165bb66 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py @@ -1,4 +1,5 @@ import os +import sys from setuptools import setup os.listdir diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py similarity index 63% rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py index 0533d11584e1..21d9cd445e31 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py @@ -1,4 +1,4 @@ # All the derived classes for PDDF __all__ = ["platform", "chassis", "sfp", "psu", "thermal"] -from sonic_platform import * #[py/polluting-import] - +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..74a4a0ff899c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py @@ -0,0 +1,242 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + import sys + import subprocess + import time + import os + import re + import shutil + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_SFP = 56 +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +SETREG_PATH="/sys/devices/platform/sys_cpld/setreg" +SET_SYS_STATUS_LED="echo {} {} > {}" +SET_SYS_STATUS_LED_IPMI="0x3A 0x39 0x02 0x00 {}" +GET_REBOOT_CAUSE="echo '0xA107' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +BMC_EXIST = helper.APIHelper().is_bmc_present() + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + sfp_status_dict={} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + + for port_idx in range(1, NUM_SFP+1): + present = self.get_sfp(port_idx).get_presence() + self.sfp_status_dict[port_idx] = '1' if present else '0' + + # Component firmware version initialization + from sonic_platform.component import Component + if BMC_EXIST: + NUM_COMPONENT = 10 + else: + NUM_COMPONENT = 7 + for i in range(0, NUM_COMPONENT): + component = Component(i) + self._component_list.append(component) + + def _getstatusoutput(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + else: + return data + + return status, data + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def set_status_led(self, color): + if color == self.get_status_led(): + return False + + if BMC_EXIST: + sys_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'amber_blink_1hz': '03', + 'amber_blink_4hz': '04', + 'green_blink_1hz': '05', + 'green_blink_4hz': '06', + 'alternate_blink_1hz': '07', + 'alternate_blink_4hz': '08' + } + color_val = sys_led_color_map.get(color.lower(), None) + if color_val is None: + print("SYS LED color %s not support!" % color) + return False + + status, _ = helper.APIHelper().ipmi_raw(SET_SYS_STATUS_LED_IPMI.format(color_val)) + return status + else: + color_val="0xd0" + if color == "green": + color_val="0xd0" + elif color == "amber": + color_val="0xe0" + + cmd=SET_SYS_STATUS_LED.format("0xA162", color_val, SETREG_PATH) + status, res = self._getstatusoutput(cmd) + + if status != 0: + return False + else: + return True + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if (index == 0): + raise IndexError + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + # Newer baseboard CPLD to get reboot cause from CPLD register + hw_reboot_cause = "" + status, hw_reboot_cause = self._getstatusoutput(GET_REBOOT_CAUSE) + if status != 0: + pass + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'System cold reboot' + return (reboot_cause, description) + + if hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + elif hw_reboot_cause == "0x66": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + def get_change_event(self, timeout=0): + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for port_idx in range(1, NUM_SFP+1): + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + self.get_sfp(port_idx).get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + self.get_sfp(port_idx).get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + if self._watchdog is None: + from sonic_platform.cpld_watchdog import Watchdog + # Create the watchdog Instance + self._watchdog = Watchdog() + + except Exception as e: + print("Fail to load watchdog due to {}".format(e)) + return self._watchdog + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.revision_str().encode('utf-8').hex() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..bfa9e49ab0f7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py @@ -0,0 +1,214 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +COMPONENT_LIST = [ + ("BIOS", "Basic input/output System"), + ("ONIE", "Open Network Install Environment"), + ("BMC", "Baseboard Management Controller"), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access"), + ("CPLD COMe", "COMe board CPLD"), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog"), + ("CPLD SW1", "CPLD for port control SFP(1-24)"), + ("CPLD SW2", "CPLD for port control SFP(25-48), QSFP(49-56)"), + ("ASIC PCIe", "ASIC PCIe Firmware"), + ("SSD", "Solid State Drive - {}") +] +NAME_INDEX = 0 +DESCRIPTION_INDEX = 1 + +BIOS_VERSION_CMD = "dmidecode -s bios-version" +ONIE_VERSION_CMD = "cat /host/machine.conf" +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/sys_cpld/come_cpld_version" +SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0" +SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0" +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BASECPLD_VERSION_CMD="echo '0xA100' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) +BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) +SSD_VERSION_CMD = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + +UNKNOWN_VER = "Unknown" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.name = self.get_name() + + def __get_cpld_ver(self): + cpld_version_dict = dict() + cpld_ver_info = { + 'CPLD BASE': self.__get_basecpld_ver(), + 'CPLD SW1': self.__get_swcpld1_ver(), + 'CPLD SW2': self.__get_swcpld2_ver(), + 'CPLD COMe': self.__get_comecpld_ver() + } + for cpld_name, cpld_ver in cpld_ver_info.items(): + cpld_ver_str = "{}.{}".format(int(cpld_ver[2], 16), int( + cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + cpld_version_dict[cpld_name] = cpld_ver_str + + return cpld_version_dict + + def __get_asic_pcie_ver(self): + status, raw_ver=self.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bios_ver(self): + status, raw_ver=self.run_command(BIOS_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_comecpld_ver(self): + status, raw_ver=self.run_command(COME_CPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_basecpld_ver(self): + status, raw_ver=self.run_command(BASECPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld1_ver(self): + status, raw_ver=self.run_command(SWCPLD1_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld2_ver(self): + status, raw_ver=self.run_command(SWCPLD2_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bmc_presence(self): + status, raw_ver=self.run_command(BMC_PRESENCE) + if status and raw_ver == "0x00": + return True + else: + return False + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return {"BMC":bmc_ver} + else: + return {"BMC":"N/A"} + + def __get_fpga_version(self): + status, fpga_version = self.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return UNKNOWN_VER + return fpga_version.replace("0x", "") + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self.run_command(ONIE_VERSION_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_desc(self, desc_format): + description = "N/A" + status, raw_ssd_data = self.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + description = desc_format.format(ret.group(1)) + except (IndexError): + pass + return description + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][NAME_INDEX] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.__get_ssd_desc(COMPONENT_LIST[self.index][1]) + + return COMPONENT_LIST[self.index][DESCRIPTION_INDEX] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version_info = { + "ONIE": self.__get_onie_ver(), + "SSD": self.__get_ssd_ver(), + "BIOS": self.__get_bios_ver(), + "FPGA": self.__get_fpga_version(), + "ASIC PCIe": self.__get_asic_pcie_ver(), + } + fw_version_info.update(self.__get_cpld_ver()) + if self.__get_bmc_presence(): + fw_version_info.update(self.__get_bmc_ver()) + return fw_version_info.get(self.name, UNKNOWN_VER) + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py new file mode 100644 index 000000000000..b828dbf65887 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py @@ -0,0 +1,228 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +try: + import ctypes + import fcntl + import os + import subprocess + import time + import array + import syslog + from .helper import APIHelper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/sys_cpld/getreg" +LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/sys_cpld/setreg" +LPC_WDT_SET_TIMER_L_REG = '0xa183' +LPC_WDT_SET_TIMER_M_REG = '0xa182' +LPC_WDT_SET_TIMER_H_REG = '0xa181' +LPC_WDT_TIMER_L_REG = '0xa186' +LPC_WDT_TIMER_M_REG = '0xa185' +LPC_WDT_TIMER_H_REG = '0xa184' +LPC_WDT_CTRL_REG = '0xa187' +LPC_WDT_ARM_REG = '0xa188' + +WDT_ENABLE = 0x1 +WDT_DISABLE = 0x0 +WDT_COMMON_ERROR = -1 +DEFAULT_TIMEOUT = 180 + +class CpldWatchdog(WatchdogBase): + + def __init__(self): + WatchdogBase.__init__(self) + # Set default value + self._api_helper = APIHelper() + self._ka_count = int(1) + self.armed = True if self._active() else False + self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT + #self._disable() + + def _lpc_get(self, reg): + return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg) + + def _lpc_set(self, reg, val): + if type(val) is int: + val = hex(val) + return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val) + + def _active(self): + """ + WDT is active or not + """ + data = self._lpc_get(LPC_WDT_CTRL_REG) + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE) + if not status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE) + if not status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self._ka_count % 2): + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE) + else: + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self._ka_count = self._ka_count + 1 + if (self._ka_count >= 11): + self._ka_count = 1 + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte) + self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte) + self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte) + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + return seconds + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.armed: + self._keepalive() + if self.timeout != seconds: + self._disable() + time.sleep(1) + self.timeout = self._settimeout(seconds) + self._enable() + else: + self.timeout = self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + + ret = self.timeout + except IOError as e: + pass + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + +class Watchdog(CpldWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + CpldWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..7550fed99950 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py @@ -0,0 +1,78 @@ +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom + import os +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as e: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + (eeprom[tlv_index + 1])] + code = "0x%02X" % ((tlv[0])) + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index+1]) + 2 + + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..1edef7f9f458 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py @@ -0,0 +1,192 @@ +import os + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" +BMC_EXIST = APIHelper().is_bmc_present() + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self.helper = APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + if self.is_psu_fan: + from sonic_platform.platform import Platform + return Platform().get_chassis().get_psu(self.fans_psu_index-1).get_presence() + + return super().get_presence() + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + Or N/A if fan removed or abnormal + """ + if not self.get_status(): + return 'N/A' + + return super().get_direction() + + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + target_speed = 0 + if self.is_psu_fan: + # Target speed not usually supported for PSU fans + raise NotImplementedError + else: + fan_name = self.get_name() + f_r_fan = "Front" if fan_name.endswith("1") else "Rear" + speed_rpm = self.get_speed_rpm() + if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan]) + else: + return target_speed + speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm)) + target_speed = speed_percentage + + return target_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + fan_name = self.get_name() + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + speed_percentage = round((speed*100)/max_speed) + if speed_percentage >= 100: + speed_percentage = 100 + return speed_percentage + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr = "fan" + str(idx) + "_input" + output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr) + + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + f_r_fan = "Front" if fan_name.endswith("1") else "Rear" + if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()): + max_speed = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan]) + else: + return 0; + speed_percentage = round((speed*100)/max_speed) + if speed_percentage >= 100: + speed_percentage = 100 + + return speed_percentage + + def get_status_led(self): + if not self.get_presence(): + return self.STATUS_LED_COLOR_OFF + if self.is_psu_fan: + # Usually no led for psu_fan hence raise a NotImplementedError + raise NotImplementedError + else: + fan_led_device = "FANTRAY{}".format(self.fantray_index) + "_LED" + if (not fan_led_device in self.pddf_obj.data.keys()): + # Implement a generic status_led color scheme + if self.get_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + result, color = self.pddf_obj.get_system_led_color(fan_led_device) + return (color) + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..58451d4011bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py @@ -0,0 +1,143 @@ +import fcntl +import os +import struct +import subprocess +from mmap import * + +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH) + +class APIHelper(): + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def get_cmd_output(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + + return status, data + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except: + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status + + @staticmethod + def ipmi_raw(cmd): + status = True + result = "" + cmd = "ipmitool raw {}".format(str(cmd)) + ret, raw_data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = raw_data + + return status, result + + def is_bmc_present(self): + """ + Get the BMC card present status + + Returns: + A boolean, True if present, False if absent + """ + status, presence = self.get_cmd_output(BMC_PRESENCE) + if status == 0 and presence == "0x00": + return True + else: + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..2bfee698b244 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py @@ -0,0 +1,33 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_capacity(self): + return 550 + + def get_type(self): + return 'AC' + + def get_voltage_low_threshold(self): + return 4 + + def get_voltage_high_threshold(self): + return 13 + + def get_status_led(self): + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_AMBER + else: + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..418222cea7cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python + +try: + import ast + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def reset(self): + if self.port_index > 0 and self.port_index < 49: + return False + return super().reset() + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..0ead57d0bb30 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py @@ -0,0 +1,13 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..1bfd5faaea75 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py @@ -0,0 +1,15 @@ +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Watchdog(PddfWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + PddfWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh new file mode 100644 index 000000000000..f0f6e3523c11 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh @@ -0,0 +1,42 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# Get BMC mode +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +echo "BMC card ${BMC_PRESENCE}" + +if [ ${BMC_PRESENCE} == "0x00" ]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..fa09e6e686a4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# Set SYS_LED to Green, assuming everything came up fine. +#ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 0xdc + +# Enable thermal shutdown by default +#i2cset -y -f 103 0x0d 0x75 0x1 + +# Load fpga extend driver after fpga device created +modprobe pddf_custom_fpga_extend + +SETREG_PATH="/sys/devices/platform/sys_cpld/setreg" +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +#Set off Alarm LED +if [ ${BMC_PRESENCE} == "0x00" ]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi + +# enable FPGA control port status +echo '0xA130 0x01' > ${SETREG_PATH} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..9a8cb8a46e39 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,14 @@ +#!/bin/bash +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +fan_driver=pddf_fan_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +#if [ -e ${driver_path}${fan_driver} ]; then +# mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk +#fi +echo 'pddf psu,fan driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py new file mode 100644 index 000000000000..1a2c682234c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py @@ -0,0 +1,178 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Left Temp'),\ + ('Base_Temp_U56', 'Baseboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_Temp_U30', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U31', 'ASIC External Front Temp'),\ + ('VDD_ANLG_Temp', 'VDD ANLG Temp'),\ + ('VDD_CORE_Temp', 'VDD CORE Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh new file mode 100755 index 000000000000..e32b0c9cbfc1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh @@ -0,0 +1,31 @@ +#!/bin/bash + +# Probe Baseboard CPLD driver +modprobe lpc_basecpld +sleep 1 + +# Get BMC mode +PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf` +GETREG_PATH="/sys/devices/platform/sys_cpld/getreg" +BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH` +echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}" + +# Copy pddf-device.json according to bmc mode +PDDF_JSON="pddf-device.json" +PDDF_JSON_BMC="pddf-device-bmc.json" +PDDF_JSON_NONBMC="pddf-device-nonbmc.json" +PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf" + +COMPONENTS_JSON="platform_components.json" +COMPONENTS_JSON_BMC="platform_components-bmc.json" +COMPONENTS_JSON_NONBMC="platform_components-nonbmc.json" +COMPONENTS_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/" + +if [ ${BMC_PRESENCE} == "0x00" ]; then + cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_BMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON} +else + # BMC Card absent + cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_NONBMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON} +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors new file mode 100644 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service new file mode 100644 index 000000000000..5043d3d02755 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service @@ -0,0 +1,17 @@ +[Unit] +Description=DS2000 Platform background monitor service +After=pmon.service +DefaultDependencies=no + +[Service] +ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py +Restart=always +RestartSec=30s +KillSignal=SIGKILL +SuccessExitStatus=SIGKILL + +# Resource Limitations +LimitCORE=infinity + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..c62769508895 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service ztp.service +After=platform-init.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py new file mode 100755 index 000000000000..f38bb7c9fe80 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py @@ -0,0 +1,152 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +CPU_TEMP_MAX = 90 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone1/temp" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 3 +Ki = 0.5 +Kd = 0.2 +SET_POINT = 78 +PWM_MIN = 35 +PWM_MAX = 100 + + +class CPUPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_cpu_temperature(self): + """ + Get CPU temperature + """ + try: + temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000 + return temp + except Exception as E: + self.syslog.warning("Can't Get CPU temperature! Cause:%s" % str(E)) + logging.warning("Can't Get CPU temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of CPU, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~130; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + cpu_temp = self.get_cpu_temperature() + if cpu_temp >= CPU_TEMP_MAX: + logging.critical("The current temperature(%d) of CPU is higher than the high crirical 90 degrees" % cpu_temp) + + if cpu_temp is False: + re_try = True + elif cpu_temp not in range(CPU_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + for _ in range(5): + cpu_temp = self.get_cpu_temperature() + if (type(cpu_temp) is int) and \ + (cpu_temp in range(CPU_TEMP_MAX+1)) and \ + (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF): + return cpu_temp + else: + error_temp_list.append(cpu_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return cpu_temp + + def pid_control(self): + """ + PID adjustment according to CPU Internal Temperature + :return: fans pwm + """ + cpu_temp = self.exception_data_handling() + if not cpu_temp: + return DUTY_MAX + if len(T_LIST) < 2: + T_LIST.append(float(cpu_temp)) + logging.info("Init CPU PID Control T_LIST:%s" % T_LIST) + return PWM_LIST[0] + else: + T_LIST.append(float(cpu_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + #logging.info("CPU PID PWM calculation value:%d < %d, %d will be used"% (pwm_k, PWM_MIN, PWM_MIN)) + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + logging.info("CPU PID PWM calculation value > %d, %d will be used" + % (PWM_MAX, PWM_MAX)) + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + #logging.info("CPU PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST)) + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py new file mode 100755 index 000000000000..c89daae72114 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py @@ -0,0 +1,253 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:44 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan control strategy main program + +try: + import re + import os + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform + from . import CPUPIDRegulation + from . import FanLinearAdjustment + from . import SwitchInternalPIDRegulation +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +FUNCTION_NAME = "FanControl" +ERROR_COLOR = "amber" +NORMAL_COLOR = "green" +DUTY_MAX = 100 +FAN_NUMBER = 4 +PSU_NUMBER = 2 +SENSOR_NUMBER = 6 +Fan_Front_MAX = 29125 +Fan_Front_MIN = 1370 +Fan_Rear_MAX = 25375 +Fan_Rear_MIN = 1370 +FAN_STATUS_LIST = [True, True, True, True] + + +class FanControl(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level): + self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(log_file, log_level, DUTY_MAX, FAN_NUMBER, + PSU_NUMBER, SENSOR_NUMBER) + self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation(log_file, log_level) + self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation(log_file, log_level) + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_psu_status(self, fan_duty_list): + """ + Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100 + :param fan_duty_list: A list.TO app the fans target pwm + """ + psu_status_list = [True, True] + for psu_index in range(PSU_NUMBER): + psu_presence = self.platform_chassis_obj.get_psu(psu_index).get_presence() + psu_status = self.platform_chassis_obj.get_psu(psu_index).get_status() + if not psu_presence: + psu_status_list[psu_index] = False + logging.critical( + "psu%s was error,presence:%s, status:%s" % (psu_index + 1, str(psu_presence), str(psu_status))) + + if False in psu_status_list: + fan_duty_list.append(DUTY_MAX) + + def get_fan_presence(self): + """ + Get all of fans status(fan drawer) + :return: A list indicating the status of all groups fans + """ + fan_presence_list = [True, True, True, True] # Default state: fans are OK + for fan_drawer_index in range(FAN_NUMBER): + fan_drawer = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index) + fan0_presence = fan_drawer.get_fan(0).get_presence() + if not fan0_presence: + logging.warning("%s not presence"% (fan_drawer.get_fan(0).get_name())) + fan1_presence = fan_drawer.get_fan(1).get_presence() + if not fan1_presence: + logging.warning("%s not presence"% (fan_drawer.get_fan(1).get_name())) + if not fan0_presence and not fan1_presence: + fan_presence_list[fan_drawer_index] = False + logging.critical("Fan Drawer-%s not presence"% (str(fan_drawer_index + 1))) + return fan_presence_list + + def check_fans_presence(self, fan_duty_list): + """ + check all fans presence or not + """ + fans_presence_list = self.get_fan_presence() + fans_not_presence_num = fans_presence_list.count(False) + if fans_not_presence_num != 0: # all fans broken, power off + logging.critical("Some fan not presence, change others fan speed to max!") + fan_duty_list.append(DUTY_MAX) + + def set_fans_pwm_by_rpm(self, fan_duty_list): + """ + Set fans pwm by fans rpm. If all fans normal or 1 fan broken, + manage the fans follow thermal policy. + More than 1 fans broken, Will increase the fan speed to 100% + :param fan_duty_list: A list.TO app the fans target pwm + """ + fan_rpm_error_list = list() + for fan in self.platform_chassis_obj.get_all_fans(): + fan_name = fan.get_name() + fan_speed_rpm = fan.get_speed_rpm() + if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if not fan_rpm_error_list: + for fan_drawer_index in range(FAN_NUMBER): + if FAN_STATUS_LIST[fan_drawer_index] == False: + FAN_STATUS_LIST[fan_drawer_index] = True + self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR) + return None + if len(fan_rpm_error_list) >= 2: + logging.critical("%s rpm less than the set minimum speed. " + "Will increase the fan speed to 100%%" % fan_rpm_error_list) + fan_duty_list.append(DUTY_MAX) + else: + logging.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list) + + fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list)) + for error_fan_drawer in fan_modules_index_list: + if FAN_STATUS_LIST[error_fan_drawer-1] == True: + FAN_STATUS_LIST[error_fan_drawer-1] = False + logging.warning("Fantray%d will be set to %s " % (error_fan_drawer, ERROR_COLOR)) + self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR) + + logging.warning("The STA front panel light will be set to %s " % ERROR_COLOR) + self.platform_chassis_obj.set_status_led(ERROR_COLOR) + + def get_linear_pid_pwm(self, fan_duty_list): + """ + Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment + :param fan_duty_list: A list.TO app the fans target pwm + """ + linear_regulation = self.FanLinearAdjustment.linear_control() + cpu_pid_adjustment = self.CPUPIDRegulation.pid_control() + sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control() + #logging.info("linear regulation PWM:%d, cpu pid PWM:%d, sw pid PWM:%d" % (linear_regulation, cpu_pid_adjustment, sw_pid_adjustment)) + fan_duty_list.append(linear_regulation) + fan_duty_list.append(cpu_pid_adjustment) + fan_duty_list.append(sw_pid_adjustment) + + def manage_fans(self): + """ + Set the fan speed according to the Fan Control Strategy + """ + fan_duty_speed_list = list() + + # Fan speed setting judgment-PSU + self.get_psu_status(fan_duty_speed_list) + + # Fan speed setting judgment-FAN presence + self.check_fans_presence(fan_duty_speed_list) + + # Fan speed setting judgment-FAN SPEED + self.set_fans_pwm_by_rpm(fan_duty_speed_list) + + # Fan speed setting judgment-linear and cpu pid and sw pid + self.get_linear_pid_pwm(fan_duty_speed_list) + + self._new_perc = max(fan_duty_speed_list) + if self._new_perc < 35: + self._new_perc = 35 + if self._new_perc > 100: + self._new_perc = 100 + fan_index = 0 + for fan in self.platform_chassis_obj.get_all_fans(): + fan_index += 1 + fan_rpm = fan.get_speed() + #logging.info("Get before setting fan speed: %s" % fan_rpm) + set_stat = fan.set_speed(self._new_perc) + if set_stat is False: + #logging.info('PASS. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc)) + #else: + logging.error('FAIL. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc)) + + +def handler(signum, frame): + logging.warning('Cause signal %d, will set all fan speed to max.' % signum) + platform_chassis = platform.Platform().get_chassis() + set_error = list() + fan_index = 1 + for fan in platform_chassis.get_all_fans(): + set_stat = fan.set_speed(DUTY_MAX) + fan_drawer = fan_index//2 + if not set_stat: + set_error.append(fan_drawer) + fan_index += 1 + if set_error: + logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX)) + sys.exit(0) + + +def main(argv): + log_file = '/var/log/%s.log' % FUNCTION_NAME + log_level = logging.INFO + if len(sys.argv) != 1: + try: + opts, args = getopt.getopt(argv, 'hdlt:', ['lfile=']) + except getopt.GetoptError: + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + return 0 + for opt, arg in opts: + if opt == '-h': + print('Usage: %s [-d] [-l ]' % sys.argv[0]) + return 0 + elif opt in ('-d', '--debug'): + log_level = logging.DEBUG + elif opt in ('-l', '--lfile'): + log_file = arg + + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = FanControl(log_file, log_level) + # Loop forever, doing something useful hopefully: + time.sleep(30) + while True: + monitor.manage_fans() + time.sleep(4) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py new file mode 100755 index 000000000000..1e3d7d761886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py @@ -0,0 +1,195 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/16 17:00 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy + +try: + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = "FanControl" + + +class FanLinearAdjustment(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + # u5 u56 u28 u29 + init_fan_temperature = [0, 0] + + def __init__(self, log_file, log_level, duty_max, fan_num, psu_num, sensor_num): + self.duty_max = duty_max + self.fan_num = fan_num + self.psu_num = psu_num + self.sensor_num = sensor_num + self.last_pwm = 0 + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.info: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.info('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_all_temperature(self): + """ + Get u5 u56 u28 u29 temperature + return: [u5, u56, u28, u29 ] + """ + all_temperature_list = list() + for sensor_index in range(self.sensor_num): + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + if temp is None or str(temp).strip() == "": + return False + all_temperature_list.append(temp) + u5 = all_temperature_list[0] + u56 = all_temperature_list[1] + b2f = max(u5,u56) + if u5 <= -5: + logging.critical("The current temperature(%f) of u5 is lower than the low crirical -5 degrees." % u5) + elif u5 >= 58: + logging.critical("The current temperature(%f) of u5 is higher than the high critical 58 degrees." % u5) + elif u5 >= 55: + logging.critical("The current temperature(%f) of u5 is higher than the high warning 55 degrees." % u5) + if u56 <= -5: + logging.critical("The current temperature(%f) of u56 is lower than the low crirical -5 degrees." % u56) + elif u56 >= 58: + logging.critical("The current temperature(%f) of u56 is higher than the high critical 58 degrees." % u56) + elif u56 >= 55: + logging.critical("The current temperature(%f) of u56 is higher than the high warning 55 degrees." % u56) + u28 = all_temperature_list[4] + u29 = all_temperature_list[5] + f2b = max(u28, u29) + if u28 <= -5: + logging.critical("The current temperature(%f) of u28 is lower than the low crirical -5 degrees." % u28) + elif u28 >= 63: + logging.critical("The current temperature(%f) of u28 is higher than the high critical 63 degrees." % u28) + elif u28 >= 58: + logging.critical("The current temperature(%f) of u28 is higher than the high warning 58 degrees." % u28) + if u29 <= -5: + logging.critical("The current temperature(%f) of u29 is lower than the low crirical -5 degrees." % u29) + elif u29 >= 63: + logging.critical("The current temperature(%f) of u29 is higher than the high critical 63 degrees." % u29) + elif u29 >= 58: + logging.critical("The current temperature(%f) of u29 is higher than the high warning 58 degrees." % u29) + #logging.info("[u5:%s, u56:%s, u28:%s, u29:%s]" % (u5, u56, u28, u29)) + return [b2f, f2b] + + def get_fan_pwm_by_temperature(self, temp_list): + """ + According to the sensor temperature, the temperature rise and fall are judged, + and the fan speed with the highest speed is selected + :param temp_list: Sensor temperature list + :return: According to the sensor temperature, select the maximum expected fan value at each point(int) + """ + fan_direction = "NA" + for fan in self.platform_chassis_obj.get_all_fans(): + fan_status = fan.get_status() + if fan_status: + fan_direction = fan.get_direction() + #logging.info("fan direction: %s. INTAKE=B2F, EXHAUST=F2B" % str(fan_direction)) + break + all_temp = self.get_all_temperature() + if all_temp is False: + # According to Thermal suggestion, when the temperature can't be + # obtained, set the fan to full speed + logging.error("Can't get u5/u56/u28/u29 temperature, Will increase the fan speed to 100%%") + return self.duty_max + + # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature + #logging.info("[B2F:%s, F2B:%s]" % (all_temp[0], all_temp[1])) + sensor_index = 0 if fan_direction == "INTAKE" else 1 + sensor_temp = float(all_temp[sensor_index]) + #logging.info("Use to adjustment sensor=%s, index=%s, last tem=%s" % (sensor_temp, sensor_index, temp_list[sensor_index] )) + temp_ascend = True + diff_temp = temp_list[sensor_index] - sensor_temp + if diff_temp > 0: + temp_ascend = False + + if sensor_index == 0: + if not temp_ascend: # B2F: U5,U56 temperature down + if sensor_temp <= 25: + sensor_temp_pwm = 35 + elif sensor_temp >= 45: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((65 / 20) * (sensor_temp - 25) + 35) + else: # U5,U56 temperature up + if sensor_temp <= 28: + sensor_temp_pwm = 35 + elif sensor_temp >= 48: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((65 / 20) * (sensor_temp - 28) + 35) + + return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm) + else: + if not temp_ascend: # F2B: U28,U29 temperature down + if sensor_temp <= 41: + sensor_temp_pwm = 35 + elif sensor_temp >= 51: + sensor_temp_pwm = 90 + else: + sensor_temp_pwm = int((55 / 10) * (sensor_temp - 41) + 35) + else: # U17 temperature up + if sensor_temp <= 44: + sensor_temp_pwm = 35 + elif sensor_temp >= 54: + sensor_temp_pwm = 90 + else: + sensor_temp_pwm = int((55 / 10) * (sensor_temp - 44) + 35) + return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm) + + @staticmethod + def choose_pwm(status, last_pwm, now_pwm): + """ + choose the pwm with Thermal rules + :param status: Temperature rises (True) or falls(False) + :param last_pwm:last pwm value + :param now_pwm:Calculated pwm from current temperature + :return:int.The pwm value + """ + if status: + return last_pwm if last_pwm >= now_pwm else now_pwm + else: + return now_pwm if last_pwm >= now_pwm else last_pwm + + def linear_control(self): + """ + According to linear adjustment return the fans pwm + :return: fans pwm + """ + new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature) + self.init_fan_temperature = self.get_all_temperature() + self.last_pwm = new_perc + return new_perc diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py new file mode 100755 index 000000000000..17992e830e86 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py @@ -0,0 +1,162 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 16:26 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +SW_TEMP_MAX = 125 +SW_MAJOR_ALARM = 105 +SW_SHUTDOWN = 120 +SW_CRITICAL = 110 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +SWITCH_INTERNAL_PEAK_TEMP = "bcmcmd 'show temp' | grep maximum | cut -d ' ' -f 5" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 2.5 +Ki = 0.5 +Kd = 0.3 +SET_POINT = 86 +PWM_MIN = 35 +PWM_MAX = 100 + + +class SwitchInternalPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + + def __init__(self, log_file, log_level): + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + # set up logging to file + logging.basicConfig( + filename=log_file, + filemode='a', + level=log_level, + format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s', + datefmt='%H:%M:%S' + ) + + # set up logging to console + if log_level == logging.DEBUG: + console = logging.StreamHandler() + console.setLevel(log_level) + formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s') + console.setFormatter(formatter) + logging.getLogger('').addHandler(console) + logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level)) + + def get_switch_internal_temperature(self): + """ + Get Switch internal temperature + """ + try: + value = subprocess.check_output(SWITCH_INTERNAL_PEAK_TEMP, shell=True,universal_newlines=True, stderr=subprocess.STDOUT)[:-1] + return int(float(value)) + except Exception as E: + self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + logging.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~150; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + sw_temp = self.get_switch_internal_temperature() + if sw_temp is False: + re_try = True + elif sw_temp not in range(SW_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + while len(error_temp_list) < 5: + sw_temp = self.get_switch_internal_temperature() + if (type(sw_temp) is int) and \ + (sw_temp in range(SW_TEMP_MAX+1)) and \ + (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF): + return sw_temp + else: + error_temp_list.append(sw_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return sw_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + sw_temp = self.exception_data_handling() + if not sw_temp: + return 50 + + if sw_temp >= SW_SHUTDOWN: + logging.critical("The Switch Internal temperature exceeds %sC, DUT will reboot after 30 seconds" % SW_SHUTDOWN) + time.sleep(30) + os.popen("reboot") + elif sw_temp >= SW_CRITICAL: + logging.critical("High temperature critical warning: switch internal temperature %sC, High critical %sC" + % (sw_temp, SW_CRITICAL)) + elif sw_temp >= SW_MAJOR_ALARM: + logging.critical("High temperature warning: switch internal temperature %sC, High warning %sC" + % (sw_temp, SW_MAJOR_ALARM)) + + if len(T_LIST) < 2: + T_LIST.append(float(sw_temp)) + self.syslog.debug("Init Switch Internal PID Control T_LIST:%s" % T_LIST) + logging.info("Init Switch Internal PID Control T_LIST:%s" % T_LIST) + return PWM_LIST[0] + else: + T_LIST.append(float(sw_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + #logging.info("Switch Internal PID PWM calculation value < %d, %d will be used"% (PWM_MIN, PWM_MIN)) + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + logging.critical("Switch Internal PID PWM calculation value > %d, %d will be used" + % (PWM_MAX, PWM_MAX)) + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + #logging.info("Switch Internal PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST)) + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py new file mode 100755 index 000000000000..fd2df8085779 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py @@ -0,0 +1,5 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/6/20 16:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py new file mode 100755 index 000000000000..f47aadb53c1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py @@ -0,0 +1,20 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/7/31 13:15 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import sys +import os +import json +sys.path.append(r"/usr/local/bin") +from FanControl import FanControl + + +pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' +with open(pddf_device_path) as f: + json_data = json.load(f) +bmc_present = json_data["PLATFORM"]["bmc_present"] +if bmc_present == "False": + FanControl.main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile new file mode 100644 index 000000000000..183bf0a20059 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile @@ -0,0 +1,8 @@ +LED_TARGET:= pddf_custom_led_module +$(LED_TARGET)-objs := ./led_driver/pddf_custom_led_module.o + +PSU_TARGET:= pddf_custom_psu_driver_module +$(PSU_TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := mc24lc64t.o baseboard_cpld.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o +obj-m += $(LED_TARGET).o $(PSU_TARGET).o diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c new file mode 100644 index 000000000000..54d4c1514815 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c @@ -0,0 +1,414 @@ +/* + * baseboard_cpld.c - driver for DS3000 Base Board CPLD + * This driver implement sysfs for CPLD register access using LPC bus. + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "baseboard" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define CARD_PRES_ADDR 0xA108 +#define COME_CPLD_VER_ADDR 0xA1E0 + +#define CPLD_REGISTER_SIZE 0x77 + +struct baseboard_cpld_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct baseboard_cpld_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Show system led status - on/off/1hz/4hz + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4hz" : data ==0x01 ? "1hz": "on"); +} + +/** + * Set the status of system led - on/off/1hz/4hz + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4hz")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1hz")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +/** + * Show BMC card presence + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return string absent or present of BMC card. + */ +static ssize_t bmc_presence_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(CARD_PRES_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x1; + return sprintf(buf, "%s\n", + data == 0x01 ? "absent" : "present"); +} +static DEVICE_ATTR_RO(bmc_presence); + +/* COME CPLD version attributes */ +static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = -EIO; + // COME CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(come_cpld_version); + +static struct attribute *baseboard_cpld_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + &dev_attr_bmc_presence.attr, + &dev_attr_come_cpld_version.attr, + NULL, +}; + +static struct attribute_group baseboard_cpld_attrs_grp = { + .attrs = baseboard_cpld_attrs, +}; + +static struct resource baseboard_cpld_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void baseboard_cpld_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device baseboard_cpld_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(baseboard_cpld_resources), + .resource = baseboard_cpld_resources, + .dev = { + .release = baseboard_cpld_dev_release, + } +}; + +static int baseboard_cpld_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + } + return 0; +} + +static int baseboard_cpld_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + return 0; +} + +static struct platform_driver baseboard_cpld_drv = { + .probe = baseboard_cpld_drv_probe, + .remove = __exit_p(baseboard_cpld_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int baseboard_cpld_init(void) +{ + // Register platform device and platform driver + platform_device_register(&baseboard_cpld_dev); + platform_driver_register(&baseboard_cpld_drv); + return 0; +} + +void baseboard_cpld_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&baseboard_cpld_drv); + platform_device_unregister(&baseboard_cpld_dev); +} + +module_init(baseboard_cpld_init); +module_exit(baseboard_cpld_exit); + +MODULE_AUTHOR("Pradchaya Phucharoen "); +MODULE_DESCRIPTION("Celestica DS3000 Baseboard CPLD Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h new file mode 100644 index 000000000000..e786e567d433 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h @@ -0,0 +1,149 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * Platform LED related defines and structures + */ + + +/***************************************** + * kobj list + *****************************************/ + +struct kobject *platform_kobj=NULL; +struct kobject *led_kobj=NULL; + +struct kobject *state_attr_kobj=NULL; +struct kobject *cur_state_kobj=NULL; + +/***************************************** + * Static Data provided from user + * space JSON data file + *****************************************/ +#define NAME_SIZE 32 +#define VALUE_SIZE 5 +typedef enum { + STATUS_LED_COLOR_OFF=0, + STATUS_LED_COLOR_GREEN=1, + STATUS_LED_COLOR_YELLOW=2, + STATUS_LED_COLOR_RED=3, + STATUS_LED_COLOR_BLUE=4, + STATUS_LED_COLOR_GREEN_BLINK=5, + STATUS_LED_COLOR_YELLOW_BLINK=6, + STATUS_LED_COLOR_RED_BLINK=7, + STATUS_LED_COLOR_BLUE_BLINK=8, + STATUS_LED_COLOR_AMBER, + STATUS_LED_COLOR_AMBER_BLINK, + MAX_LED_STATUS +}LED_STATUS; + +char* LED_STATUS_STR[] = { + "off", + "green", + "yellow", + "red", + "blue", + "green_blink", + "yellow_blink", + "red_blink", + "blue_blink", + "amber", + "amber_blink" +}; + + +typedef struct +{ + char bits[NAME_SIZE]; + int pos; + int mask_bits; +}MASK_BITS; + +typedef struct +{ + int swpld_addr; + int swpld_addr_offset; + MASK_BITS bits; + u8 reg_values[VALUE_SIZE]; + char value[NAME_SIZE]; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_DATA; + +typedef struct +{ + int state; + char color[NAME_SIZE]; +/* S3IP System LED RW sysfs */ + int sys_led; + int bmc_led; + int fan_led; + int psu_led; + int loc_led; +/* S3IP Power LED RO sysfs */ + int psu1_led; + int psu2_led; +/* S3IP Fantray LED RO sysfs */ + int fantray1_led; + int fantray2_led; + int fantray3_led; + int fantray4_led; + int fantray5_led; + int fantray6_led; + int fantray7_led; +} CUR_STATE_DATA; + +typedef struct +{ + CUR_STATE_DATA cur_state; + char device_name[NAME_SIZE]; + int index; + LED_DATA data[MAX_LED_STATUS]; + int swpld_addr; + int swpld_addr_offset; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_OPS_DATA; + +typedef enum{ + LED_SYS, + LED_PSU, + LED_FAN, + LED_FANTRAY, + LED_DIAG, + LED_LOC, + LED_BMC, + LED_TYPE_MAX +} LED_TYPE; +char* LED_TYPE_STR[LED_TYPE_MAX] = +{ + "LED_SYS", + "LED_PSU", + "LED_FAN", + "LED_FANTRAY", + "LED_DIAG", + "LED_LOC", + "LED_BMC" +}; + +/***************************************** + * Data exported from kernel for + * user space plugin to get/set + *****************************************/ +#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr) \ + struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c new file mode 100644 index 000000000000..8f0da48b4d98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c @@ -0,0 +1,873 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include "pddf_custom_led_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include +#include +#include + +#define DEBUG 0 +#define MAX_PSU_NUM 2 +#define MAX_FANTRAY_NUM 7 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0}; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA bmc_led_ops_data[1]= {0}; +LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0}; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + psu_led_ops_data, + fan_led_ops_data, + fantray_led_ops_data, + diag_led_ops_data, + loc_led_ops_data, + bmc_led_ops_data, + NULL +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value); +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED") == 0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED") == 0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED") == 0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED") == 0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], type, index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= MAX_PSU_NUM) return (-1); + break; + case LED_FANTRAY: + if(index >= MAX_FANTRAY_NUM) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL); + + if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return (NULL); + } + if(dev_index_check(led_type, ptr->index) == -1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type); + return (NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;" + "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr, + ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value, + ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits, + ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname); + } + } +} + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + int cpld_type=0; + int j; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + + if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + + strscpy(temp_data.cur_state.color, "None", NAME_SIZE); + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) { + strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color); +#endif + return(ret); +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0, read_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + int cpld_type = 0; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if (ops_ptr->data[cur_state].swpld_addr != 0x0) { + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + + if (sys_val < 0){ + return sys_val; + } + + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf); + return (-1); + } + + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val, + cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + if (_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + uint32_t color_val=0, sys_val=0; + int state=0, j; + int cpld_type=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + ops_ptr->device_name, ops_ptr->index); + return (-1); + } + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) { + ret = sprintf(buf, "%d\n", state); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, + ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state); +#endif + return ret; +} + +ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0; + int cur_state = 0; + uint32_t sys_val=0, new_val=0, read_val=0; + int cpld_type=0; + + pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + ret = kstrtoint(buf,10,&cur_state); + if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + + if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + return count; +} + + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr = NULL; + int i = 0; + char *token = NULL, *value_ptr = NULL; + + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype)); + memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname)); + memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype)); + memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname)); +#ifdef __STDC_LIB_EXT1__ + memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values)); +#else + memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values)); +#endif + value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL); + if (value_ptr) { + memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value)); + while((token = strsep((char**)&value_ptr,";")) != NULL && i < VALUE_SIZE) { + if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) { + pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token); + } + i++; + } + kfree(value_ptr); + } + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr = find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strncmp(buf, "show", strlen("show")) == 0) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify")) == 0) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status")) == 0) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status")) == 0) { + set_status_led(da); + } + else { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf); + } + } + return (count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) { + ret = kstrtoint(buf, 10, &num); + if (ret == 0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return (count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len = pptr-buf; + sprintf(bits, buf); + bits[len] = '\0'; + rc1 = kstrtoint(bits, 16, &num1); + if (rc1 == 0) + { + sprintf(bits, ++pptr); + rc2 = kstrtoint(bits, 16, &num2); + if (rc2 == 0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1 = kstrtoint(buf, 16, &num1); + if (rc1 == 0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype); +PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[] = { + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_attr_devtype.dev_attr.attr, + &pddf_dev_dev_attr_attr_devname.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_dev = { + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + +/************************************************************************** + * cur_state/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); +PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL); +PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]); +PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]); +PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]); +PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]); +PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]); + + +struct attribute* attrs_cur_state[] = { + &pddf_dev_cur_state_attr_color.dev_attr.attr, + &pddf_dev_cur_state_attr_sys_led.dev_attr.attr, + &pddf_dev_cur_state_attr_loc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fan_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c new file mode 100644 index 000000000000..638d59d653ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c @@ -0,0 +1,172 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8 | ( off &0xff)); + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..45fdcb4c9665 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,626 @@ +/* + * pddf_custom_fpga_algo.c - driver algorithm for FPGAPCIE AXI IIC. + * + * Copyright (C) 2023 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG_KERN 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; + +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: AXI IIC device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: AXI IIC device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int xiic_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + if (err) + printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n", + __func__, status); + return err; +} + +static void xiic_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + +static int fpga_axi_iic_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = xiic_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + xiic_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpga_axi_iic_access(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if(((1 == msgs->len && (msgs->flags & I2C_M_RD)) + || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + + while((-EIO == err) && (retry < max_retry)) + { + err = fpga_axi_iic_poll(i2c, msgs, num); + retry++; + } + + return err; +} + +/** + * A callback function show available smbus functions. + */ +static u32 fpga_axi_iic_func(struct i2c_adapter *adap) +{ + /* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm axi_iic_algorithm = { + .master_xfer = fpga_axi_iic_access, + .functionality = fpga_axi_iic_func, +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +}; + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#ifdef DEBUG_KERN + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch + || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS){ + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &axi_iic_algorithm; + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +static int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +static int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_custom_fpga_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = &pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} +static void __exit pddf_custom_fpga_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + +module_init(pddf_custom_fpga_algo_init); +module_exit(pddf_custom_fpga_algo_exit); + +MODULE_DESCRIPTION("Module driver algorithm for 7021 FPGAPCIe AXI IIC"); +MODULE_VERSION("1.0.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..4ea09f09404f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,372 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define FPGA_VERSION_ADDR 0x0000 +#define FPGA_SCRATCH_ADDR 0x0004 +#define FPGA_BCM_TEMP_ADDR 0x001c +#define FPGA_BCM_TEMP_LOW_ADDR 0x0078 +#define FPGA_BCM_TEMP_HIGH_ADDR 0x0080 +#define FPGA_REG_SPACE_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > FPGA_REG_SPACE_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + +/** + * Show value of fpga bcm switch internal temp sensor register calculated by FPGA + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff; + + return sprintf(buf, "0x%08x\n", reg_val); +} + +/** + * Show value of fpga bcm switch internal temp sensor register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff; + u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff; + + return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL); +static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL); +static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_bcm_temp_fpga.attr, + &dev_attr_bcm_temp.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga access/control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c similarity index 67% rename from platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c rename to platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c index e41b64badefc..305253403625 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c @@ -1,9 +1,9 @@ /* - * switchboard.c - driver for Silverstone Switch board FPGA/CPLD. + * switchboard_fpga.c - driver for ds3000 Switch board FPGA/CPLD. * * Author: Pradchaya Phucharoen * - * Copyright (C) 2018 Celestica Corp. + * Copyright (C) 2019 Celestica Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,18 +14,18 @@ * \--sys * \--devices * \--platform - * \--silverstone + * \--switchboard * |--FPGA * |--CPLD1 * |--CPLD2 * \--SFF * |--QSFP[1..32] - * \--SFP[1..2] + * \--SFP1 * */ #ifndef TEST_MODE -#define MOD_VERSION "1.2.0" +#define MOD_VERSION "2.2.0" #else #define MOD_VERSION "TEST" #endif @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include @@ -43,7 +42,6 @@ #include #include #include -#include #include #include #include @@ -55,9 +53,9 @@ static int majorNumber; -#define CLASS_NAME "silverstone_fpga" +#define CLASS_NAME "ds3000_fpga" #define DRIVER_NAME "switchboard" -#define FPGA_PCI_NAME "Silverstone_fpga_pci" +#define FPGA_PCI_NAME "ds3000_fpga_pci" #define DEVICE_NAME "fwupgrade" @@ -72,7 +70,6 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, static int fpgafw_init(void); static void fpgafw_exit(void); - /* ======================================== FPGA PCIe BAR 0 Registers @@ -88,11 +85,7 @@ I2C_CH7 0x00000700 - 0x00000710. I2C_CH8 0x00000800 - 0x00000810. I2C_CH9 0x00000900 - 0x00000910. I2C_CH10 0x00000A00 - 0x00000A10. -I2C_CH11 0x00000B00 - 0x00000B10. -I2C_CH12 0x00000C00 - 0x00000C10. -I2C_CH13 0x00000D00 - 0x00000D10. SPI Master 0x00001200 - 0x00001300. -DPLL SPI Master 0x00001320 - 0x0000132F. PORT XCVR 0x00004000 - 0x00004FFF. */ @@ -115,6 +108,7 @@ PORT XCVR 0x00004000 - 0x00004FFF. #define FPGA_MISC_CTRL 0x0050 #define FPGA_MISC_STATUS 0x0054 #define FPGA_AVS_VID_STATUS 0x0068 +#define FPGA_FEATURE_CARD_GPIO 0x0070 #define FPGA_PORT_XCVR_READY 0x000c /* I2C_MASTER BASE ADDR */ @@ -133,11 +127,7 @@ PORT XCVR 0x00004000 - 0x00004FFF. #define I2C_MASTER_CH_8 8 #define I2C_MASTER_CH_9 9 #define I2C_MASTER_CH_10 10 -#define I2C_MASTER_CH_11 11 -#define I2C_MASTER_CH_12 12 -#define I2C_MASTER_CH_13 13 - -#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_5 +#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10 /* SPI_MASTER */ #define SPI_MASTER_WR_EN 0x1200 /* one bit */ @@ -193,7 +183,6 @@ PORT XCVR 0x00004000 - 0x00004FFF. */ #define INTR_INT_N 5 #define INTR_PRESENT 4 -#define INTR_TXFAULT 2 #define INTR_RXLOS 1 #define INTR_MODABS 0 @@ -208,7 +197,6 @@ PORT XCVR 0x00004000 - 0x00004FFF. */ #define MASK_INT_N 5 #define MASK_PRESENT 4 -#define MASK_TXFAULT 2 #define MASK_RXLOS 1 #define MASK_MODABS 0 @@ -249,17 +237,19 @@ enum { * */ + #define VIRTUAL_I2C_QSFP_PORT 32 -#define VIRTUAL_I2C_SFP_PORT 2 +#define VIRTUAL_I2C_SFP_PORT 1 #define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT + VIRTUAL_I2C_SFP_PORT -#define VIRTUAL_I2C_BUS_OFFSET 10 +#define VIRTUAL_I2C_BUS_OFFSET 2 #define CPLD1_SLAVE_ADDR 0x30 #define CPLD2_SLAVE_ADDR 0x31 -static struct class* fpgafwclass = NULL; // < The device-driver class struct pointer -static struct device* fpgafwdev = NULL; // < The device-driver device struct pointer +static struct class* fpgafwclass = NULL; ///< The device-driver class struct pointer +static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer +static struct platform_device *ds3000_dev; #define PCI_VENDOR_ID_TEST 0x1af4 @@ -308,38 +298,31 @@ struct i2c_dev_data { /* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ static struct i2c_switch fpga_i2c_bus_dev[] = { - /* BUS3 QSFP Exported as virtual bus */ - {I2C_MASTER_CH_3, 0x71, 2, QSFP, "QSFP1"}, {I2C_MASTER_CH_3, 0x71, 3, QSFP, "QSFP2"}, - {I2C_MASTER_CH_3, 0x71, 0, QSFP, "QSFP3"}, {I2C_MASTER_CH_3, 0x71, 1, QSFP, "QSFP4"}, - {I2C_MASTER_CH_3, 0x71, 6, QSFP, "QSFP5"}, {I2C_MASTER_CH_3, 0x71, 5, QSFP, "QSFP6"}, - {I2C_MASTER_CH_3, 0x73, 7, QSFP, "QSFP7"}, {I2C_MASTER_CH_3, 0x71, 4, QSFP, "QSFP8"}, - - {I2C_MASTER_CH_3, 0x73, 4, QSFP, "QSFP9"}, {I2C_MASTER_CH_3, 0x73, 3, QSFP, "QSFP10"}, - {I2C_MASTER_CH_3, 0x73, 6, QSFP, "QSFP11"}, {I2C_MASTER_CH_3, 0x73, 2, QSFP, "QSFP12"}, - {I2C_MASTER_CH_3, 0x73, 1, QSFP, "QSFP13"}, {I2C_MASTER_CH_3, 0x73, 5, QSFP, "QSFP14"}, - {I2C_MASTER_CH_3, 0x71, 7, QSFP, "QSFP15"}, {I2C_MASTER_CH_3, 0x73, 0, QSFP, "QSFP16"}, - - {I2C_MASTER_CH_3, 0x72, 1, QSFP, "QSFP17"}, {I2C_MASTER_CH_3, 0x72, 7, QSFP, "QSFP18"}, - {I2C_MASTER_CH_3, 0x72, 4, QSFP, "QSFP19"}, {I2C_MASTER_CH_3, 0x72, 0, QSFP, "QSFP20"}, - {I2C_MASTER_CH_3, 0x72, 5, QSFP, "QSFP21"}, {I2C_MASTER_CH_3, 0x72, 2, QSFP, "QSFP22"}, - {I2C_MASTER_CH_3, 0x70, 5, QSFP, "QSFP23"}, {I2C_MASTER_CH_3, 0x72, 6, QSFP, "QSFP24"}, - - {I2C_MASTER_CH_3, 0x72, 3, QSFP, "QSFP25"}, {I2C_MASTER_CH_3, 0x70, 6, QSFP, "QSFP26"}, - {I2C_MASTER_CH_3, 0x70, 0, QSFP, "QSFP27"}, {I2C_MASTER_CH_3, 0x70, 7, QSFP, "QSFP28"}, - {I2C_MASTER_CH_3, 0x70, 2, QSFP, "QSFP29"}, {I2C_MASTER_CH_3, 0x70, 4, QSFP, "QSFP30"}, - {I2C_MASTER_CH_3, 0x70, 3, QSFP, "QSFP31"}, {I2C_MASTER_CH_3, 0x70, 1, QSFP, "QSFP32"}, + /* BUS2 QSFP Exported as virtual bus */ + {I2C_MASTER_CH_2, 0x72, 0, QSFP, "QSFP1"}, {I2C_MASTER_CH_2, 0x72, 1, QSFP, "QSFP2"}, + {I2C_MASTER_CH_2, 0x72, 2, QSFP, "QSFP3"}, {I2C_MASTER_CH_2, 0x72, 3, QSFP, "QSFP4"}, + {I2C_MASTER_CH_2, 0x72, 4, QSFP, "QSFP5"}, {I2C_MASTER_CH_2, 0x72, 5, QSFP, "QSFP6"}, + {I2C_MASTER_CH_2, 0x72, 6, QSFP, "QSFP7"}, {I2C_MASTER_CH_2, 0x72, 7, QSFP, "QSFP8"}, + {I2C_MASTER_CH_2, 0x73, 0, QSFP, "QSFP9"}, {I2C_MASTER_CH_2, 0x73, 1, QSFP, "QSFP10"}, + {I2C_MASTER_CH_2, 0x73, 2, QSFP, "QSFP11"}, {I2C_MASTER_CH_2, 0x73, 3, QSFP, "QSFP12"}, + {I2C_MASTER_CH_2, 0x73, 4, QSFP, "QSFP13"}, {I2C_MASTER_CH_2, 0x73, 5, QSFP, "QSFP14"}, + {I2C_MASTER_CH_2, 0x73, 6, QSFP, "QSFP15"}, {I2C_MASTER_CH_2, 0x73, 7, QSFP, "QSFP16"}, + {I2C_MASTER_CH_2, 0x74, 0, QSFP, "QSFP17"}, {I2C_MASTER_CH_2, 0x74, 1, QSFP, "QSFP18"}, + {I2C_MASTER_CH_2, 0x74, 2, QSFP, "QSFP19"}, {I2C_MASTER_CH_2, 0x74, 3, QSFP, "QSFP20"}, + {I2C_MASTER_CH_2, 0x74, 4, QSFP, "QSFP21"}, {I2C_MASTER_CH_2, 0x74, 5, QSFP, "QSFP22"}, + {I2C_MASTER_CH_2, 0x74, 6, QSFP, "QSFP23"}, {I2C_MASTER_CH_2, 0x74, 7, QSFP, "QSFP24"}, + {I2C_MASTER_CH_2, 0x75, 0, QSFP, "QSFP25"}, {I2C_MASTER_CH_2, 0x75, 1, QSFP, "QSFP26"}, + {I2C_MASTER_CH_2, 0x75, 2, QSFP, "QSFP27"}, {I2C_MASTER_CH_2, 0x75, 3, QSFP, "QSFP28"}, + {I2C_MASTER_CH_2, 0x75, 4, QSFP, "QSFP29"}, {I2C_MASTER_CH_2, 0x75, 5, QSFP, "QSFP30"}, + {I2C_MASTER_CH_2, 0x75, 6, QSFP, "QSFP31"}, {I2C_MASTER_CH_2, 0x75, 7, QSFP, "QSFP32"}, /* BUS1 SFP+ Exported as virtual bus */ - {I2C_MASTER_CH_1, 0xFF, 0, SFP, "SFP1"}, - /* BUS2 SFP+ Exported as virtual bus */ - {I2C_MASTER_CH_2, 0xFF, 0, SFP, "SFP2"}, - /* BUS4 CPLD Access via I2C */ - {I2C_MASTER_CH_4, 0xFF, 0, NONE, "CPLD_S"}, - /* BUS5 CPLD_B */ - {I2C_MASTER_CH_5, 0xFF, 0, NONE, "CPLD_B"}, + {I2C_MASTER_CH_1, 0x72, 0, SFP, "SFP1"}, + /* BUS3 Switchboard CPLD */ + {I2C_MASTER_CH_3, 0xFF, 0, NONE, "I2C_3"}, }; #define VIRTUAL_I2C_PORT_LENGTH ARRAY_SIZE(fpga_i2c_bus_dev) -#define SW_I2C_CPLD_INDEX SFF_PORT_TOTAL +#define VIRTUAL_I2C_CPLD_INDEX SFF_PORT_TOTAL struct fpga_device { /* data mmio region */ @@ -354,7 +337,7 @@ static struct fpga_device fpga_dev = { .data_mmio_len = 0, }; -struct silverstone_fpga_data { +struct ds3000_fpga_data { struct device *sff_devices[SFF_PORT_TOTAL]; struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH]; @@ -369,7 +352,7 @@ struct sff_device_data { enum PORT_TYPE port_type; }; -struct silverstone_fpga_data *fpga_data; +struct ds3000_fpga_data *fpga_data; /* * Kernel object for other module drivers. @@ -385,18 +368,6 @@ static struct kobject *cpld2 = NULL; */ static struct device *sff_dev = NULL; - -static ssize_t version_show(struct device *dev, struct device_attribute *devattr, - char *buf) -{ - u32 version; - - mutex_lock(&fpga_data->fpga_lock); - version = ioread32(fpga_dev.data_base_addr + FPGA_VERSION); - mutex_unlock(&fpga_data->fpga_lock); - return sprintf(buf, "%d.%d\n", version >> 16, version & 0xFFFF); -} - /** * Show the value of the register set by 'set_fpga_reg_address' * If the address is not set by 'set_fpga_reg_address' first, @@ -404,75 +375,86 @@ static ssize_t version_show(struct device *dev, struct device_attribute *devattr * @param buf register value in hextring * @return number of bytes read, or an error code */ -static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, - char *buf) +static ssize_t get_fpga_reg_value(struct device *dev, + struct device_attribute *attr, char *buf) { // read data from the address uint32_t data; data = ioread32(fpga_data->fpga_read_addr); return sprintf(buf, "0x%8.8x\n", data); } + /** * Store the register address * @param buf address wanted to be read value of * @return number of bytes stored, or an error code */ -static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_reg_address(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { + ssize_t status; uint32_t addr; - char *last; - addr = (uint32_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + status = kstrtou32(buf, 0, &addr); + if (status == 0) { + fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr; + status = count; } - fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr; - return count; + return status; } + /** * Show value of fpga scratch register * @param buf register value in hexstring * @return number of bytes read, or an error code */ -static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, - char *buf) +static ssize_t get_fpga_scratch(struct device *dev, + struct device_attribute *attr, char *buf) { - return sprintf(buf, "0x%8.8x\n", ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH) & 0xffffffff); + uint32_t data; + data = ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH); + data &= 0xffffffff; + return sprintf(buf, "0x%8.8x\n", data); } + /** * Store value of fpga scratch register * @param buf scratch register value passing from user space * @return number of bytes stored, or an error code */ -static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_scratch(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { + ssize_t status; uint32_t data; - char *last; - data = (uint32_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { - return -EINVAL; + + status = kstrtou32(buf, 0, &data); + if (status == 0) { + iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH); + status = count; } - iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH); - return count; + return status; } + /** * Store a value in a specific register address * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' * @return number of bytes sent by user space, or an error code */ -static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, +static ssize_t set_fpga_reg_value(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) { - // register are 4 bytes + //register is 4 bytes uint32_t addr; uint32_t value; uint32_t mode = 8; char *tok; char clone[count]; char *pclone = clone; - char *last; + ssize_t status; strcpy(clone, buf); @@ -482,8 +464,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } - addr = (uint32_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou32(tok, 0, &addr); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -492,8 +474,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } - value = (uint32_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou32(tok, 0, &value); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -501,8 +483,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d if (tok == NULL) { mode = 32; } else { - mode = (uint32_t)strtoul(tok, &last, 10); - if (mode == 0 && tok == last) { + status = kstrtou32(tok, 0, &mode); + if (status != 0) { mutex_unlock(&fpga_data->fpga_lock); return -EINVAL; } @@ -521,8 +503,6 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d /** * Show FPGA port XCVR ready status - * @param buf 1 if the functin is ready, 0 if not. - * @return number of bytes read, or an error code */ static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -540,14 +520,12 @@ static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); static DEVICE_ATTR_RO(ready); -static DEVICE_ATTR_RO(version); static struct attribute *fpga_attrs[] = { &dev_attr_getreg.attr, &dev_attr_scratch.attr, &dev_attr_setreg.attr, &dev_attr_ready.attr, - &dev_attr_version.attr, NULL, }; @@ -555,78 +533,90 @@ static struct attribute_group fpga_attr_grp = { .attrs = fpga_attrs, }; -static ssize_t cpld1_version_show(struct device *dev, - struct device_attribute *attr, char *buf) +/* SW CPLDs attributes */ +static ssize_t cpld1_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) { - u8 version; + // CPLD register is one byte + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], - CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, - I2C_SMBUS_BYTE_DATA, - (union i2c_smbus_data *)&version); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, fpga_data->cpld1_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) return err; - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); -} -struct device_attribute dev_attr_cpld1_version = __ATTR(version, 0444, cpld1_version_show , NULL); -/* SW CPLDs attributes */ -static ssize_t cpld1_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - // CPLD register is one byte - uint8_t data; - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld1_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld1_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) + +static ssize_t cpld1_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { + ssize_t status; uint8_t addr; - char *last; - addr = (uint8_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld1_read_addr = addr; + status = count; } - fpga_data->cpld1_read_addr = addr; - return size; + return status; } -struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); -static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t cpld1_scratch_show(struct device *dev, + struct device_attribute *attr, char *buf) { // CPLD register is one byte - __u8 data; + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; + return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) + +static ssize_t cpld1_scratch_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - __u8 data; - char *last; + uint8_t data; + ssize_t status; int err; - data = (uint8_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { - return -EINVAL; + + status = kstrtou8(buf, 0, &data); + if (status != 0) { + return status; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return size; + + return count; } -struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store); -static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld1_setreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { uint8_t addr, value; char *tok; - char clone[size]; + char clone[count]; char *pclone = clone; + ssize_t status; int err; - char *last; strcpy(clone, buf); @@ -634,29 +624,33 @@ static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *a if (tok == NULL) { return -EINVAL; } - addr = (uint8_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou8(tok, 0, &addr); + if (status != 0) { return -EINVAL; } tok = strsep((char**)&pclone, " "); if (tok == NULL) { return -EINVAL; } - value = (uint8_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou8(tok, 0, &value); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); if (err < 0) return err; - return size; + return count; } + +struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); +struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store); struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg, 0200, NULL, cpld1_setreg_store); static struct attribute *cpld1_attrs[] = { - &dev_attr_cpld1_version.attr, &dev_attr_cpld1_getreg.attr, &dev_attr_cpld1_scratch.attr, &dev_attr_cpld1_setreg.attr, @@ -667,80 +661,86 @@ static struct attribute_group cpld1_attr_grp = { .attrs = cpld1_attrs, }; -static ssize_t cpld2_version_show(struct device *dev, - struct device_attribute *attr, char *buf) +static ssize_t cpld2_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) { - u8 version; + // CPLD register is one byte + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], - CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, - I2C_SMBUS_BYTE_DATA, - (union i2c_smbus_data *)&version); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); -} -struct device_attribute dev_attr_cpld2_version = __ATTR(version, 0444, cpld2_version_show , NULL); -static ssize_t cpld2_getreg_show(struct device *dev, struct device_attribute *attr, char *buf) -{ - // CPLD register is one byte - uint8_t data; - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld2_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - uint32_t addr; - char *last; - addr = (uint8_t)strtoul(buf, &last, 16); - if (addr == 0 && buf == last) { - return -EINVAL; + uint8_t addr; + ssize_t status; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld2_read_addr = addr; + status = count; } - fpga_data->cpld2_read_addr = addr; - return size; + return status; } -struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); -static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t cpld2_scratch_show(struct device *dev, + struct device_attribute *attr, char *buf) { // CPLD register is one byte - __u8 data; + uint8_t data; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; + return sprintf(buf, "0x%2.2x\n", data); } -static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_scratch_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { // CPLD register is one byte - __u8 data; - char *last; + uint8_t data; int err; + ssize_t status; - data = (uint8_t)strtoul(buf, &last, 16); - if (data == 0 && buf == last) { + status = kstrtou8(buf, 0, &data); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); if (err < 0) return err; - return size; + + return count; } -struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store); -static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t cpld2_setreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { uint8_t addr, value; char *tok; - char clone[size]; + char clone[count]; char *pclone = clone; + ssize_t status; int err; - char *last; strcpy(clone, buf); @@ -748,29 +748,33 @@ static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *a if (tok == NULL) { return -EINVAL; } - addr = (uint8_t)strtoul(tok, &last, 16); - if (addr == 0 && tok == last) { + status = kstrtou8(tok, 0, &addr); + if (status != 0) { return -EINVAL; } tok = strsep((char**)&pclone, " "); if (tok == NULL) { return -EINVAL; } - value = (uint8_t)strtoul(tok, &last, 16); - if (value == 0 && tok == last) { + status = kstrtou8(tok, 0, &value); + if (status != 0) { return -EINVAL; } - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value); if (err < 0) return err; - return size; + return count; } + +struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); +struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store); struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg, 0200, NULL, cpld2_setreg_store); static struct attribute *cpld2_attrs[] = { - &dev_attr_cpld2_version.attr, &dev_attr_cpld2_getreg.attr, &dev_attr_cpld2_scratch.attr, &dev_attr_cpld2_setreg.attr, @@ -782,7 +786,8 @@ static struct attribute_group cpld2_attr_grp = { }; /* QSFP/SFP+ attributes */ -static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_modirq_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -796,7 +801,8 @@ static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(qsfp_modirq); -static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_modprs_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -810,7 +816,8 @@ static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(qsfp_modprs); -static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_txfault_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -824,7 +831,8 @@ static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *att } DEVICE_ATTR_RO(sfp_txfault); -static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_rxlos_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -838,7 +846,8 @@ static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, } DEVICE_ATTR_RO(sfp_rxlos); -static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t sfp_modabs_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -852,7 +861,8 @@ static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr } DEVICE_ATTR_RO(sfp_modabs); -static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_lpmode_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -864,33 +874,36 @@ static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *att mutex_unlock(&fpga_data->fpga_lock); return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U); } -static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t qsfp_lpmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; - long value; + uint32_t value; u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); unsigned int portid = dev_data->portid; unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; mutex_lock(&fpga_data->fpga_lock); - status = kstrtol(buf, 0, &value); + status = kstrtou32(buf, 0, &value); if (status == 0) { - // if value is 0, disable the lpmode + // check if value is 0 clear data = ioread32(fpga_dev.data_base_addr + REGISTER); if (!value) data = data & ~( (u32)0x1 << CTRL_LPMOD); else data = data | ((u32)0x1 << CTRL_LPMOD); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(qsfp_lpmode); -static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_reset_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -903,33 +916,136 @@ static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U); } -static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t qsfp_reset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; - long value; + uint32_t value; u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); unsigned int portid = dev_data->portid; unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10; mutex_lock(&fpga_data->fpga_lock); - status = kstrtol(buf, 0, &value); + status = kstrtou32(buf, 0, &value); if (status == 0) { - // if value is 0, reset signal is low + // check if value is 0 clear data = ioread32(fpga_dev.data_base_addr + REGISTER); if (!value) data = data & ~( (u32)0x1 << CTRL_RST); else data = data | ((u32)0x1 << CTRL_RST); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(qsfp_reset); -static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t qsfp_isr_flags_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + /* + * Unify the return pattern to 2-bit + * [1] : module interrupt + * [0] : presence + */ + data = data & valid_bits; + data = data >> 4; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t qsfp_isr_flags_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value << 4; + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_isr_flags); + +static ssize_t qsfp_isr_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u32 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + /* + * Unify the return pattern to 2-bit + * [1] : module interrupt + * [0] : presence + */ + data = data & valid_bits; + data = data >> 4; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t qsfp_isr_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value << 4; + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_isr_mask); + +static ssize_t sfp_txdisable_show(struct device *dev, + struct device_attribute *attr, char *buf) { u32 data; struct sff_device_data *dev_data = dev_get_drvdata(dev); @@ -941,7 +1057,9 @@ static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *a mutex_unlock(&fpga_data->fpga_lock); return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U); } -static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t sfp_txdisable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { ssize_t status; long value; @@ -960,22 +1078,112 @@ static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute * else data = data | ((u32)0x1 << CTRL_TXDIS); iowrite32(data, fpga_dev.data_base_addr + REGISTER); - status = size; + status = count; } mutex_unlock(&fpga_data->fpga_lock); return status; } DEVICE_ATTR_RW(sfp_txdisable); +static ssize_t sfp_isr_flags_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + data = data & valid_bits; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t sfp_isr_flags_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_isr_flags); + +static ssize_t sfp_isr_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u32 data; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr + REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + + data = data & valid_bits; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t sfp_isr_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + u32 value; + u8 valid_bits; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10; + valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS); + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtou32(buf, 0, &value); + if (status == 0) { + value = value & valid_bits; + iowrite32(value, fpga_dev.data_base_addr + REGISTER); + status = count; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_isr_mask); + static struct attribute *sff_attrs[] = { &dev_attr_qsfp_modirq.attr, &dev_attr_qsfp_modprs.attr, &dev_attr_qsfp_lpmode.attr, &dev_attr_qsfp_reset.attr, + &dev_attr_qsfp_isr_flags.attr, + &dev_attr_qsfp_isr_mask.attr, &dev_attr_sfp_txfault.attr, &dev_attr_sfp_rxlos.attr, &dev_attr_sfp_modabs.attr, &dev_attr_sfp_txdisable.attr, + &dev_attr_sfp_isr_flags.attr, + &dev_attr_sfp_isr_mask.attr, NULL, }; @@ -989,22 +1197,30 @@ static const struct attribute_group *sff_attr_grps[] = { }; -static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t port_led_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) { // value can be "nomal", "test" __u8 led_mode_1, led_mode_2; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); if (err < 0) return err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2); if (err < 0) return err; + return sprintf(buf, "%s %s\n", led_mode_1 ? "test" : "normal", led_mode_2 ? "test" : "normal"); } -static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t port_led_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { int status; __u8 led_mode_1; @@ -1015,62 +1231,65 @@ static ssize_t port_led_mode_store(struct device *dev, struct device_attribute * } else { return -EINVAL; } - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); - return size; + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1); + return count; } DEVICE_ATTR_RW(port_led_mode); // Only work when port_led_mode set to 1 -static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t port_led_color_show(struct device *dev, + struct device_attribute *attr, char *buf) { - // value can be R/G/B/C/M/Y/W/OFF + // value can be "off", "green", "amber", "both" __u8 led_color1, led_color2; int err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1); if (err < 0) return err; - err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2); + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2); if (err < 0) return err; return sprintf(buf, "%s %s\n", - led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? - "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white", - led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? "red" : led_color1 == 0x04 ? - "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : led_color1 == 0x01 ? "magenta" : "white"); + led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 == 0x01 ? "amber" : "both", + led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 == 0x01 ? "amber" : "both"); } -static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +static ssize_t port_led_color_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) { int status; __u8 led_color; if (sysfs_streq(buf, "off")) { - led_color = 0x07; - } else if (sysfs_streq(buf, "green")) { - led_color = 0x06; - } else if (sysfs_streq(buf, "red")) { - led_color = 0x05; - } else if (sysfs_streq(buf, "yellow")) { - led_color = 0x04; - } else if (sysfs_streq(buf, "blue")) { led_color = 0x03; - } else if (sysfs_streq(buf, "cyan")) { + } else if (sysfs_streq(buf, "green")) { led_color = 0x02; - } else if (sysfs_streq(buf, "magenta")) { + } else if (sysfs_streq(buf, "amber")) { led_color = 0x01; - } else if (sysfs_streq(buf, "white")) { + } else if (sysfs_streq(buf, "both")) { led_color = 0x00; } else { status = -EINVAL; return status; } - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); - status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, - I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color); - return size; + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data*)&led_color); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, + I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, + (union i2c_smbus_data*)&led_color); + return count; } DEVICE_ATTR_RW(port_led_color); @@ -1084,7 +1303,7 @@ static struct attribute_group sff_led_test_grp = { .attrs = sff_led_test, }; -static struct device * silverstone_sff_init(int portid) { +static struct device * ds3000_sff_init(int portid) { struct sff_device_data *new_data; struct device *new_device; @@ -1096,7 +1315,9 @@ static struct device * silverstone_sff_init(int portid) { /* The QSFP port ID start from 1 */ new_data->portid = portid + 1; new_data->port_type = fpga_i2c_bus_dev[portid].port_type; - new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0, 0), new_data, sff_attr_grps, "%s", fpga_i2c_bus_dev[portid].calling_name); + new_device = device_create_with_groups(fpgafwclass, sff_dev, + MKDEV(0, 0), new_data, sff_attr_grps, "%s", + fpga_i2c_bus_dev[portid].calling_name); if (IS_ERR(new_device)) { printk(KERN_ALERT "Cannot create sff device @port%d", portid); kfree(new_data); @@ -1195,37 +1416,34 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, struct i2c_dev_data *dev_data; void __iomem *pci_bar; unsigned int portid, master_bus; + unsigned int REG_FDR0; unsigned int REG_CR0; unsigned int REG_SR0; unsigned int REG_DR0; unsigned int REG_ID0; + REG_FDR0 = 0; + REG_CR0 = 0; + REG_SR0 = 0; + REG_DR0 = 0; + REG_ID0 = 0; + /* Write the command register */ dev_data = i2c_get_adapdata(adapter); portid = dev_data->portid; pci_bar = fpga_dev.data_base_addr; - master_bus = dev_data->pca9548.master_bus; - REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; - REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; - REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; - REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; - REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; - - if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { - error = -EINVAL; - goto Done; - } #ifdef DEBUG_KERN - printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X " , portid, addr, flags, rw, rw == 1 ? "READ " : "WRITE" , size, size == 0 ? "QUICK" : size == 1 ? "BYTE" : size == 2 ? "BYTE_DATA" : size == 3 ? "WORD_DATA" : size == 4 ? "PROC_CALL" : - size == 5 ? "BLOCK_DATA" : "ERROR" + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" , cmd); #endif /* Map the size to what the chip understands */ @@ -1235,6 +1453,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_BYTE_DATA: case I2C_SMBUS_WORD_DATA: case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: break; default: printk(KERN_INFO "Unsupported transaction %d\n", size); @@ -1242,12 +1461,27 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, goto Done; } + master_bus = dev_data->pca9548.master_bus; + + if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) { + error = -ENXIO; + goto Done; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus - 1) * 0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus - 1) * 0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus - 1) * 0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus - 1) * 0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100; + iowrite8(portid, pci_bar + REG_ID0); ////[S][ADDR/R] - //Clear status register + // Clear status register iowrite8(0, pci_bar + REG_SR0); - iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); + iowrite8(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0); SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_MEN); if (rw == I2C_SMBUS_READ && @@ -1274,9 +1508,10 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, if (size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA || (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)) { - //sent command code to data register + // sent command code to data register iowrite8(cmd, pci_bar + REG_DR0); info( "MS Send CMD 0x%2.2X", cmd); @@ -1294,14 +1529,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_WORD_DATA: cnt = 2; break; case I2C_SMBUS_BLOCK_DATA: - // in block data mode keep number of byte in block[0] + case I2C_SMBUS_I2C_BLOCK_DATA: + /* In block data modes keep number of byte in block[0] */ cnt = data->block[0]; break; default: cnt = 0; break; } - // [CNT] used only bloack data write + // [CNT] used only block data write if (size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE) { iowrite8(cnt, pci_bar + REG_DR0); @@ -1320,11 +1556,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { - int bid = 0; + bid = 0; info( "MS prepare to sent [%d bytes]", cnt); - if (size == I2C_SMBUS_BLOCK_DATA ) { + if (size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA) { bid = 1; // block[0] is cnt; cnt += 1; // offset from block[0] } @@ -1338,13 +1575,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, goto Done; } } + } - //REPEATE START + // REPEATE START if ( rw == I2C_SMBUS_READ && ( size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { info( "MS Repeated Start"); @@ -1370,7 +1609,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA || size == I2C_SMBUS_WORD_DATA || - size == I2C_SMBUS_BLOCK_DATA + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA )) { switch (size) { @@ -1380,12 +1620,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, case I2C_SMBUS_WORD_DATA: cnt = 2; break; case I2C_SMBUS_BLOCK_DATA: - //will be changed after recived first data + // will be changed after recived first data cnt = 3; break; + case I2C_SMBUS_I2C_BLOCK_DATA: + cnt = data->block[0]; break; default: cnt = 0; break; } + bid = 0; info( "MS Receive"); //set to Receive mode @@ -1395,7 +1638,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, for (bid = -1; bid < cnt; bid++) { - // Wait {A} + // Wait for byte transfer error = i2c_wait_ack(adapter, 12, 0); if (error < 0) { goto Done; @@ -1415,8 +1658,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, info ( "SET STOP in read loop"); SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); } - data->block[bid] = ioread8(pci_bar + REG_DR0); - + if (size == I2C_SMBUS_I2C_BLOCK_DATA) { + // block[0] is read length + data->block[bid + 1] = ioread8(pci_bar + REG_DR0); + } else { + data->block[bid] = ioread8(pci_bar + REG_DR0); + } info( "DATA IN [%d] %2.2X", bid, data->block[bid]); if (size == I2C_SMBUS_BLOCK_DATA && bid == 0) { @@ -1426,9 +1673,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr, } } - //[P] + // [P] SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA); - i2c_wait_ack(adapter, 12, 0); info( "MS STOP"); Done: @@ -1481,28 +1727,38 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, if ( prev_switch != switch_addr && prev_switch != 0 ) { // reset prev_port PCA9548 chip retry = 3; - while(retry--){ - error = smbus_access(adapter, (u16)(prev_switch), flags, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, (u16)(prev_switch), flags, + I2C_SMBUS_WRITE, 0x00, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to deselect ch %d of 0x%x, CODE %d\n", prev_ch, prev_switch, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // set PCA9548 to current channel retry = 3; - while(retry--){ - error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, switch_addr, flags, + I2C_SMBUS_WRITE, 1 << channel, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // update lasted port fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; @@ -1511,16 +1767,21 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, if ( prev_ch != channel || prev_switch == 0 ) { // set new PCA9548 at switch_addr to current retry = 3; - while(retry--){ - error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL); - if(error >= 0){ + while (retry--) { + error = smbus_access(adapter, switch_addr, flags, + I2C_SMBUS_WRITE, 1 << channel, + I2C_SMBUS_BYTE, NULL); + if (error >= 0) { break; - }else{ - dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error); + } else { + dev_dbg(&adapter->dev, + "Failed to deselect ch %d of 0x%x, CODE %d\n", + prev_ch, prev_switch, error); } } - if(retry == 0) + if (retry < 0) { goto release_unlock; + } // update lasted port fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel; } @@ -1529,22 +1790,24 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, // Do SMBus communication error = smbus_access(adapter, addr, flags, rw, cmd, size, data); - if(error < 0){ - dev_dbg( &adapter->dev,"smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " - , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE" - , size, size == 0 ? "QUICK" : - size == 1 ? "BYTE" : - size == 2 ? "BYTE_DATA" : - size == 3 ? "WORD_DATA" : - size == 4 ? "PROC_CALL" : - size == 5 ? "BLOCK_DATA" : - size == 8 ? "I2C_BLOCK_DATA" : "ERROR" - , cmd); + if (error < 0) { + dev_dbg( &adapter->dev, + "smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X " + , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE" + , size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" + , cmd); } release_unlock: mutex_unlock(&fpga_i2c_master_locks[master_bus - 1]); - dev_dbg(&adapter->dev,"switch ch %d of 0x%x -> ch %d of 0x%x\n", prev_ch, prev_switch, channel, switch_addr); + dev_dbg(&adapter->dev, "switch ch %d of 0x%x -> ch %d of 0x%x\n", + prev_ch, prev_switch, channel, switch_addr); return error; } @@ -1559,10 +1822,11 @@ static u32 fpga_i2c_func(struct i2c_adapter *a) I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_BLOCK_DATA; + I2C_FUNC_SMBUS_BLOCK_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK; } -static const struct i2c_algorithm silverstone_i2c_algorithm = { +static const struct i2c_algorithm ds3000_i2c_algorithm = { .smbus_xfer = fpga_i2c_access, .functionality = fpga_i2c_func, }; @@ -1577,23 +1841,24 @@ static const struct i2c_algorithm silverstone_i2c_algorithm = { * When bus_number_offset is -1, created adapter with dynamic bus number. * Otherwise create adapter at i2c bus = bus_number_offset + portid. */ -static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset) +static struct i2c_adapter * ds3000_i2c_init(struct platform_device *pdev, + int portid, int bus_number_offset) { int error; - struct i2c_adapter *new_adapter; struct i2c_dev_data *new_data; void __iomem *i2c_freq_base_reg; new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); if (!new_adapter) { - printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name); + printk(KERN_ALERT "Cannot alloc i2c adapter for %s", + fpga_i2c_bus_dev[portid].calling_name); return NULL; } new_adapter->owner = THIS_MODULE; new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; - new_adapter->algo = &silverstone_i2c_algorithm; + new_adapter->algo = &ds3000_i2c_algorithm; /* If the bus offset is -1, use dynamic bus number */ if (bus_number_offset == -1) { new_adapter->nr = -1; @@ -1603,7 +1868,8 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); if (!new_data) { - printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name); + printk(KERN_ALERT "Cannot alloc i2c data for %s", + fpga_i2c_bus_dev[portid].calling_name); kfree_sensitive(new_adapter); return NULL; } @@ -1631,32 +1897,16 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i return new_adapter; }; -static void silverstone_dev_release( struct device * dev) -{ - return; -} - -static struct platform_device silverstone_dev = { - .name = DRIVER_NAME, - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .release = silverstone_dev_release, - } -}; - /** * Board info for QSFP/SFP+ eeprom. - * Note: Using OOM optoe as I2C eeprom driver. - * https://www.opencompute.org/wiki/Networking/SpecsAndDesigns#Open_Optical_Monitoring + * Note: Using sff8436 as I2C eeprom driver. */ static struct i2c_board_info sff8436_eeprom_info[] = { - { I2C_BOARD_INFO("optoe1", 0x50) }, //For QSFP w/ sff8436 - { I2C_BOARD_INFO("optoe2", 0x50) }, //For SFP+ w/ sff8472 + { I2C_BOARD_INFO("optoe1", 0x50) }, + { I2C_BOARD_INFO("optoe2", 0x50) }, }; -static int silverstone_drv_probe(struct platform_device *pdev) +static int ds3000_drv_probe(struct platform_device *pdev) { int ret = 0; int portid_count; @@ -1667,7 +1917,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) /* The device class need to be instantiated before this function called */ BUG_ON(fpgafwclass == NULL); - fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct silverstone_fpga_data), + fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct ds3000_fpga_data), GFP_KERNEL); if (!fpga_data) @@ -1679,6 +1929,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) fpga_data->cpld2_read_addr = 0x00; mutex_init(&fpga_data->fpga_lock); + for (ret = I2C_MASTER_CH_1 ; ret <= I2C_MASTER_CH_TOTAL; ret++) { mutex_init(&fpga_i2c_master_locks[ret - 1]); } @@ -1777,14 +2028,15 @@ static int silverstone_drv_probe(struct platform_device *pdev) } for (portid_count = 0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++) { - fpga_data->i2c_adapter[portid_count] = silverstone_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); + fpga_data->i2c_adapter[portid_count] = ds3000_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); } + /* Init SFF devices */ for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) { struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count]; if (i2c_adap) { - fpga_data->sff_devices[portid_count] = silverstone_sff_init(portid_count); + fpga_data->sff_devices[portid_count] = ds3000_sff_init(portid_count); sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); BUG_ON(sff_data == NULL); if ( sff_data->port_type == QSFP ) { @@ -1797,19 +2049,21 @@ static int silverstone_drv_probe(struct platform_device *pdev) &fpga_data->sff_i2c_clients[portid_count]->dev.kobj, "i2c"); } + } + printk(KERN_INFO "Virtual I2C buses created\n"); + #ifdef TEST_MODE return 0; #endif - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld1_version); - fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld2_version); - printk(KERN_INFO "Switch CPLD1 VERSION: %2.2x\n", cpld1_version); - printk(KERN_INFO "Switch CPLD2 VERSION: %2.2x\n", cpld2_version); - + printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version); + printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version); /* Init I2C buses that has PCA9548 switch device. */ for (portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++) { @@ -1826,7 +2080,8 @@ static int silverstone_drv_probe(struct platform_device *pdev) if (prev_i2c_switch != ( (master_bus << 8) | switch_addr) ) { // Found the bus with PCA9548, trying to clear all switch in it. - smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); + smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, + I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL); prev_i2c_switch = ( master_bus << 8 ) | switch_addr; } } @@ -1834,7 +2089,7 @@ static int silverstone_drv_probe(struct platform_device *pdev) return 0; } -static int silverstone_drv_remove(struct platform_device *pdev) +static int ds3000_drv_remove(struct platform_device *pdev) { int portid_count; struct sff_device_data *rem_data; @@ -1872,20 +2127,20 @@ static int silverstone_drv_remove(struct platform_device *pdev) return 0; } +static struct platform_driver ds3000_drv = { + .probe = ds3000_drv_probe, + .remove = __exit_p(ds3000_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + #ifdef TEST_MODE #define FPGA_PCI_BAR_NUM 2 #else #define FPGA_PCI_BAR_NUM 0 #endif -static struct platform_driver silverstone_drv = { - .probe = silverstone_drv_probe, - .remove = __exit_p(silverstone_drv_remove), - .driver = { - .name = DRIVER_NAME, - }, -}; - static const struct pci_device_id fpga_id_table[] = { { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, { PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) }, @@ -1934,11 +2189,15 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) printk(KERN_INFO ""); fpga_version = ioread32(fpga_dev.data_base_addr); printk(KERN_INFO "FPGA VERSION : %8.8x\n", fpga_version); - fpgafw_init(); - platform_device_register(&silverstone_dev); - platform_driver_register(&silverstone_drv); + if ((err = fpgafw_init()) < 0) { + goto pci_unmap; + } + ds3000_dev = platform_device_register_simple(DRIVER_NAME, -1, NULL, 0); + platform_driver_register(&ds3000_drv); return 0; +pci_unmap: + pci_iounmap(pdev, fpga_dev.data_base_addr); pci_release: pci_release_regions(pdev); pci_disable: @@ -1948,8 +2207,8 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) static void fpga_pci_remove(struct pci_dev *pdev) { - platform_driver_unregister(&silverstone_drv); - platform_device_unregister(&silverstone_dev); + platform_driver_unregister(&ds3000_drv); + platform_device_unregister(ds3000_dev); fpgafw_exit(); pci_iounmap(pdev, fpga_dev.data_base_addr); pci_release_regions(pdev); @@ -1974,7 +2233,8 @@ struct fpga_reg_data { uint32_t value; }; -static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { +static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) { int ret = 0; struct fpga_reg_data data; mutex_lock(&fpga_data->fpga_lock); @@ -2065,25 +2325,24 @@ static int fpgafw_init(void) { // Register the device driver fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME); - if (IS_ERR(fpgafwdev)) { // Clean up if there is an error + if (IS_ERR(fpgafwdev)) { // Clean up if there is an error class_destroy(fpgafwclass); // Repeated code but the alternative is goto statements unregister_chrdev(majorNumber, DEVICE_NAME); printk(KERN_ALERT "Failed to create the FW upgrade device node\n"); return PTR_ERR(fpgafwdev); } - printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); + printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized return 0; } static void fpgafw_exit(void) { device_destroy(fpgafwclass, MKDEV(majorNumber, 0)); // remove the device - class_unregister(fpgafwclass); // unregister the device class class_destroy(fpgafwclass); // remove the device class unregister_chrdev(majorNumber, DEVICE_NAME); // unregister the major number printk(KERN_INFO "Goodbye!\n"); } -int silverstone_init(void) +int ds3000_init(void) { int rc; rc = pci_register_driver(&pci_dev_ops); @@ -2092,15 +2351,15 @@ int silverstone_init(void) return 0; } -void silverstone_exit(void) +void ds3000_exit(void) { pci_unregister_driver(&pci_dev_ops); } -module_init(silverstone_init); -module_exit(silverstone_exit); +module_init(ds3000_init); +module_exit(ds3000_exit); -MODULE_AUTHOR("Celestica Inc."); -MODULE_DESCRIPTION("Celestica Silverstone platform driver"); +MODULE_AUTHOR("Pradchaya P. "); +MODULE_DESCRIPTION("Celestica ds3000 switchboard driver"); MODULE_VERSION(MOD_VERSION); MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py new file mode 100644 index 000000000000..02fcfff6aea1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py @@ -0,0 +1,28 @@ +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..21d9cd445e31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal"] +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..00fe4a2457a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py @@ -0,0 +1,295 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import os + import re + import shutil + import subprocess + from . import component + from .event import XcvrEvent + from .helper import APIHelper + from .thermal import ThermalMon, THERMAL_MONITOR_SENSORS + from sonic_py_common import logger + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +RESET_SOURCE_OS_REG = '0xa106' +LPC_SYSLED_REG = '0xa162' +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" +LED_CTRL_MODE_GET_CMD = "ipmitool raw 0x3a 0x42 0x01" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +SYSLOG_IDENTIFIER = "Chassis" +helper_logger = logger.Logger(SYSLOG_IDENTIFIER) + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + SYSLED_COLOR_VAL_MAP = { + 'off': '0xff', + 'green': '0xdc', + 'amber': '0xec', + 'amber_blink': '0xee', + 'amber_blink_4hz': '0xee', + 'amber_blink_1hz': '0xed', + 'green_blink': '0xde', + 'green_blink_4hz': '0xde', + 'green_blink_1hz': '0xdd' + } + + SYSLED_VAL_COLOR_MAP = { + '0xff': 'off', + '0xdc': 'green', + '0xec': 'amber', + '0xee': 'amber_blink_4hz', + '0xed': 'amber_blink_1hz', + '0xde': 'green_blink_4hz', + '0xdd': 'green_blink_1hz' + } + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._api_helper = APIHelper() + + for index in range(self.platform_inventory['num_components']): + component_obj = component.Component(index) + self._component_list.append(component_obj) + + if not self._api_helper.is_bmc_present(): + thermal_count = len(self._thermal_list) + for idx, name in enumerate(THERMAL_MONITOR_SENSORS): + thermal = ThermalMon(thermal_count + idx, name) + self._thermal_list.append(thermal) + + def initizalize_system_led(self): + """ + This function is not defined in chassis base class, + system-health command would invoke chassis.initizalize_system_led(), + add this stub function just to let the command sucessfully execute + """ + pass + + def get_status_led(self): + """ + Gets the state of the system LED + Args: + None + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + led_status = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_SYSLED_REG) + color = self.SYSLED_VAL_COLOR_MAP.get(led_status, 'unknown') + return color + + def set_status_led(self, color): + """ + Sets the state of the system LED + Args: + color: A string representing the color with which to set the + system LED + Returns: + bool: True if system LED state is set successfully, False if not + """ + if self._api_helper.is_bmc_present(): + led_mode_cmd = LED_CTRL_MODE_GET_CMD + if os.getuid() != 0: + cmd = "sudo " + cmd + led_mode_cmd = "sudo " + led_mode_cmd + status, mode = self._api_helper.get_cmd_output(led_mode_cmd) + # led take automatic control mode, led not settable + if status != 0 or mode.strip() == "01": + helper_logger.log_info("SYS LED takes automatic ctrl mode!") + return False + + # Set SYS_LED through baseboard cpld + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val == None: + helper_logger.log_error("SYS LED color {} not support!".format(color)) + return False + + status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_SYSLED_REG, color_val) + + return status + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if (index == 0): + raise IndexError + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + # Provide the functions/variables below for which implementation is to be overwritten + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.lpc_getreg(LPC_GETREG_PATH, RESET_SOURCE_OS_REG) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + description = 'CPU cold reset' + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + elif hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x66": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Off Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + if self._watchdog is None: + from sonic_platform.cpld_watchdog import Watchdog + # Create the watchdog Instance from cpld watchdog + self._watchdog = Watchdog() + + except Exception as e: + helper_logger.log_error("Fail to load watchdog due to {}".format(e)) + return self._watchdog + + ############################################################## + ###################### Event methods ######################### + ############################################################## + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # SFP event + if self.get_num_sfps() == 0: + for index in range(self.platform_inventory['num_ports']): + sfp = Sfp(index, self.pddf_obj, self.plugin_data) + self._sfp_list.append(sfp) + + succeed, sfp_event = XcvrEvent(self._sfp_list).get_xcvr_event(timeout) + if succeed: + return True, {'sfp': sfp_event} + + return False, {'sfp': {}} + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.revision_str() + + def get_system_airflow(self): + """ + Retrieve system airflow + Returns: + string: INTAKE or EXHAUST + """ + airflow = self.get_serial()[5:8] + if airflow == "B2F": + return "INTAKE" + elif airflow == "F2B": + return "EXHAUST" + return "Unknown" + + def get_thermal_manager(self): + """ + Retrieves thermal manager class on this chasssis + + Returns: + A class derived from ThermalManagerBase representing the + specified thermal manager + """ + if not self._api_helper.is_bmc_present(): + from .thermal_manager import ThermalManager + return ThermalManager + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..d6abdeb8c968 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py @@ -0,0 +1,321 @@ +try: + import re + import subprocess + from .helper import APIHelper + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST =APIHelper().is_bmc_present() +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +Bios_Version_Cmd = "dmidecode -t bios | grep Version" + +BIOS_VERSION_CMD = "dmidecode -s bios-version" +ONIE_VERSION_CMD = "cat /host/machine.conf" +SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0 | tr a-z A-Z | cut -d 'X' -f 2" +SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0 | tr a-z A-Z | cut -d 'X' -f 2" +BASECPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/version | tr a-z A-Z | cut -d 'X' -f 2" +COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/come_cpld_version | tr a-z A-Z | cut -d 'X' -f 2" +SSD_VERSION_CMD = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + + +COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "ASIC PCIe", "SSD"] +COMPONENT_DES_LIST = ["Basic input/output System", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions, fan control and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32), SFP(33)", + "ASIC PCIe Firmware", + "Solid State Drive - {}"] + +UNKNOWN_VER = "Unknown" + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.helper = APIHelper() + self.name = self.get_name() + + def get_firmware_version(self): + """ + Retrieves the available firmware version of the component + + Note: the firmware version will be read from image + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the available firmware version of the component + """ + fw_version_info = { + "ONIE": self.__get_onie_ver(), + "SSD": self.__get_ssd_ver(), + "BIOS": self.__get_bios_ver(), + "FPGA": self.__get_fpga_version(), + "ASIC PCIe": self.__get_asic_pcie_ver(), + } + fw_version_info.update(self.__get_cpld_ver()) + if self.__get_bmc_presence(): + fw_version_info.update(self.__get_bmc_ver()) + return fw_version_info.get(self.name, UNKNOWN_VER) + + def get_firmware_update_notification(self, image_path): + """ + Retrieves a notification on what should be done in order to complete + the component firmware update + + Args: + image_path: A string, path to firmware image + + Returns: + A string containing the component firmware update notification if required. + By default 'None' value will be used, which indicates that no actions are required + """ + type = self.get_type() + if type == 'bios': + return "BIOS will be updated, please wait for completion and reboot the device to take effect!" + elif type == 'cpld' or type == 'fpga': + return "{} will be updated, please wait for completion and power reboot device to take effect!".format(type.upper()) + elif type == 'bmc': + return "BMC image will be updated, please wait for completion!" + return None + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + This API performs firmware installation only: this may/may not be the same as firmware update. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user + + Note: in case immediate actions are required to complete the component firmware update + (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + #if self.component_data == None: + self.component_data = self._get_component_data() + pre_cmd = self.component_data['pre-update'] + update_cmd = self.component_data['update'] + post_cmd = self.component_data['post-update'] + if pre_cmd != None: + status, _ = self._api_helper.get_cmd_output(pre_cmd) + if status != 0: + return False + if update_cmd != None: + update_cmd = update_cmd.format(image_path) + status, _ = self._api_helper.get_cmd_output(update_cmd) + if status != 0: + return False + if post_cmd != None: + status, _ = self._api_helper.get_cmd_output(post_cmd) + if status != 0: + return False + + return True + + def update_firmware(self, image_path): + """ + Updates firmware of the component + + This API performs firmware update: it assumes firmware installation and loading in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API + + Args: + image_path: A string, path to firmware image + + Returns: + Boolean False if image_path doesn't exist instead of throwing an exception error + Nothing when the update is successful + + Raises: + RuntimeError: update failed + """ + status = self.install_firmware(image_path) + if not status: + return status + + type = self.get_type() + if type == 'fpga' or type == 'cpld': + # TODO:: power cycle FPGA or CPLD + pass + + return True + + def auto_update_firmware(self, image_path, boot_type): + """ + Updates firmware of the component + + This API performs firmware update automatically based on boot_type: it assumes firmware installation + and/or creating a loading task during the reboot, if needed, in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot. + The loading task will be created by API. + + Args: + image_path: A string, path to firmware image + boot_type: A string, reboot type following the upgrade + - none/fast/warm/cold + + Returns: + Output: A return code + return_code: An integer number, status of component firmware auto-update + - return code of a positive number indicates successful auto-update + - status_installed = 1 + - status_updated = 2 + - status_scheduled = 3 + - return_code of a negative number indicates failed auto-update + - status_err_boot_type = -1 + - status_err_image = -2 + - status_err_unknown = -3 + + Raises: + RuntimeError: auto-update failure cause + """ + raise NotImplementedError + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return "Solid State Drive - {}".format(self.__get_ssd_model()) + + return COMPONENT_DES_LIST[self.index] + + def __get_cpld_ver(self): + cpld_version_dict = dict() + cpld_ver_info = { + 'CPLD BASE': self.__get_basecpld_ver(), + 'CPLD SW1': self.__get_swcpld1_ver(), + 'CPLD SW2': self.__get_swcpld2_ver(), + 'CPLD COMe': self.__get_comecpld_ver(), + } + + for cpld_name, cpld_ver in cpld_ver_info.items(): + ver1 = int(cpld_ver.strip()) / 10 + ver2 = int(cpld_ver.strip()) % 10 + version = "%d.%d" % (ver1,ver2) + cpld_version_dict[cpld_name] = version + return cpld_version_dict + + def __get_asic_pcie_ver(self): + status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bios_ver(self): + status, raw_ver=self.helper.run_command(BIOS_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_basecpld_ver(self): + status, raw_ver=self.helper.run_command(BASECPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_comecpld_ver(self): + status, raw_ver=self.helper.run_command(COME_CPLD_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld1_ver(self): + status, raw_ver=self.helper.run_command(SWCPLD1_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_swcpld2_ver(self): + status, raw_ver=self.helper.run_command(SWCPLD2_VERSION_CMD) + if status: + return raw_ver + else: + return UNKNOWN_VER + + def __get_bmc_presence(self): + if BMC_EXIST: + return True + else: + return False + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self.helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return {"BMC":bmc_ver} + else: + return {"BMC":"N/A"} + + def __get_fpga_version(self): + status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return UNKNOWN_VER + return fpga_version.replace("0x", "") + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self.helper.run_command(ONIE_VERSION_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py new file mode 100644 index 000000000000..7889ce15f83f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py @@ -0,0 +1,228 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +try: + import ctypes + import fcntl + import os + import subprocess + import time + import array + import syslog + from .helper import APIHelper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" +LPC_WDT_SET_TIMER_L_REG = '0xa183' +LPC_WDT_SET_TIMER_M_REG = '0xa182' +LPC_WDT_SET_TIMER_H_REG = '0xa181' +LPC_WDT_TIMER_L_REG = '0xa186' +LPC_WDT_TIMER_M_REG = '0xa185' +LPC_WDT_TIMER_H_REG = '0xa184' +LPC_WDT_CTRL_REG = '0xa187' +LPC_WDT_ARM_REG = '0xa188' + +WDT_ENABLE = 0x1 +WDT_DISABLE = 0x0 +WDT_COMMON_ERROR = -1 +DEFAULT_TIMEOUT = 180 + +class CpldWatchdog(WatchdogBase): + + def __init__(self): + WatchdogBase.__init__(self) + # Set default value + self._api_helper = APIHelper() + self._ka_count = int(1) + self.armed = True if self._active() else False + self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT + #self._disable() + + def _lpc_get(self, reg): + return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg) + + def _lpc_set(self, reg, val): + if type(val) is int: + val = hex(val) + return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val) + + def _active(self): + """ + WDT is active or not + """ + data = self._lpc_get(LPC_WDT_CTRL_REG) + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE) + if not status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE) + if not status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self._ka_count % 2): + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE) + else: + status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self._ka_count = self._ka_count + 1 + if (self._ka_count >= 11): + self._ka_count = 1 + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte) + self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte) + self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte) + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + return seconds + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG) + data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG) + data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG) + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.armed: + self._keepalive() + if self.timeout != seconds: + self._disable() + time.sleep(1) + self.timeout = self._settimeout(seconds) + self._enable() + else: + self.timeout = self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft + +class Watchdog(CpldWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + CpldWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..cb3c825516e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py @@ -0,0 +1,84 @@ +try: + import os + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as e: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + (eeprom[tlv_index + 1])] + code = "0x%02X" % ((tlv[0])) + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index+1]) + 2 + + + # Provide the functions/variables below for which implementation is to be overwritten + def revision_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + "N/A" + if type(results[2]) is bytearray: + return str(int.from_bytes(results[2], byteorder='little')) + + return results[2].decode('ascii') diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py new file mode 100644 index 000000000000..86a1390cd6b7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py @@ -0,0 +1,52 @@ +try: + import time + from sonic_py_common.logger import Logger +except ImportError as e: + raise ImportError(repr(e) + " - required module not found") + +class XcvrEvent: + ''' Listen to insert/remove QSFP/SFP+ events ''' + + def __init__(self, sfp_list): + self._sfp_list = sfp_list + self._logger = Logger() + + xcvr_change_event_data = {'valid': 0, 'last': 0, 'present': 0} + + def get_xcvr_event(self, timeout): + port_dict = {} + + # Using polling mode + now = time.time() + + if timeout < 1000: + timeout = 1000 + timeout = timeout / float(1000) # Convert to secs + + if now < (self.xcvr_change_event_data['last'] + timeout) \ + and self.xcvr_change_event_data['valid']: + return True, port_dict + + bitmap = 0 + for sfp in self._sfp_list: + modpres = sfp.get_presence() + index = sfp.port_index - 1 + if modpres: + bitmap = bitmap | (1 << index) + + changed_ports = self.xcvr_change_event_data['present'] ^ bitmap + if changed_ports: + for sfp in self._sfp_list: + index = sfp.port_index - 1 + if changed_ports & (1 << index): + if (bitmap & (1 << index)) == 0: + port_dict[str(index + 1)] = '0' + else: + port_dict[str(index + 1)] = '1' + + # Update the cache dict + self.xcvr_change_event_data['present'] = bitmap + self.xcvr_change_event_data['last'] = now + self.xcvr_change_event_data['valid'] = 1 + + return True, port_dict diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..e50a7d70e2e6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py @@ -0,0 +1,246 @@ +import os + +try: + from .helper import APIHelper + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" +BMC_EXIST = APIHelper().is_bmc_present() + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + BMC_FAN_FSC_STATUS_CMD = "ipmitool raw 0x3a 0x26 0x00" + LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg" + FAN_PWM_CTRL_REG_MAP = { + 1: '0xa1b2', + 2: '0xa1b8', + 3: '0xa1c4', + 4: '0xa1ca' + } + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self._api_helper = APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + if self.is_psu_fan: + return super().get_presence() + return super().get_presence() + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + Or N/A if fan removed or abnormal + """ + if not self.get_status(): + return "N/A" + + if self.is_psu_fan: + from sonic_platform.psu import Psu + psu = Psu(self.fans_psu_index - 1, self.pddf_obj, self.plugin_data) + model = psu.get_model() + if model in ["FSP550-20FM", "G1251-0550WNA"]: + return "EXHAUST" + elif model in ["FSP550-29FM", "G1251-0550WRA"]: + return "INTAKE" + return "Unknown" + + return super().get_direction() + + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + target_speed = 0 + if self.is_psu_fan: + # PSU fan not controllable, return current speed + return self.get_speed() + else: + speed_rpm = self.get_speed_rpm() + if self.fan_index == 1: + if(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED'].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED']) + else: + return target_speed + else: + if(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED'].isnumeric()): + max_fan_rpm = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED']) + else: + return target_speed + speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm)) + target_speed = speed_percentage + + return target_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + speed_percentage = round((speed*100)/max_speed) + return speed_percentage if speed_percentage <= 100 else 100 + else: + # Get fan rpm instead of fan pwm + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr = "fan" + str(idx) + "_input" + output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr) + + if not output: + return 0 + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return 0 + else: + speed = int(float(output['status'])) + + if self.fan_index == 1: + max_speed = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED']) + else: + max_speed = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED']) + speed_percentage = round((speed*100)/max_speed) + + return speed_percentage if speed_percentage <= 100 else 100 + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + if self.is_psu_fan: + print("Setting PSU fan speed is not allowed") + return False + + if speed < 0 or speed > 100: + print("Error: Invalid speed %d. Please provide a valid speed percentage" % speed) + return False + + if 'duty_cycle_to_pwm' not in self.plugin_data['FAN']: + print("Setting fan speed is not allowed !") + return False + + if(self.plugin_data['FAN']['duty_cycle_to_pwm'].isnumeric()) + duty_cycle_to_pwm = int(self.plugin_data['FAN']['duty_cycle_to_pwm']) + else: + return False + pwm = int(round(duty_cycle_to_pwm(speed))) + + if self._api_helper.is_bmc_present(): + status, data = self._api_helper.get_cmd_output(self.BMC_FAN_FSC_STATUS_CMD) + if status != 0: + print("Error: failed to get BMC FSC status") + return False + if data == '01': + # Enable BMC FSC mode + return False + + # FAN 1 & 2 in same fantray share the same register, skip Fan2 setting + if self.fan_index == 2: + return True + # Set FAN PWM through baseboard CPLD + reg = self.FAN_PWM_CTRL_REG_MAP.get(self.fantray_index) + status = self._api_helper.lpc_setreg(self.LPC_CPLD_SETREG_PATH, reg, hex(pwm)) + + return status + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 15 if "PSU" in self.get_name() else 25 + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self._api_helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b582835accd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,28 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_presence(self): + status = False + # Usually if a tray is removed, all the fans inside it are absent + if self._fan_list and len(self._fan_list) == 2: + status = self._fan_list[0].get_presence() or self._fan_list[1].get_presence() + else: + status = self._fan_list[0].get_presence() + return status + + def get_name(self): + return "Fantray {0}".format(self.fantray_index) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..7ec1f23e950c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py @@ -0,0 +1,139 @@ +import fcntl +import os +import struct +import subprocess +from mmap import * + +BMC_PRES_SYS_PATH = '/sys/bus/platform/devices/baseboard/bmc_presence' + +class APIHelper(): + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def get_cmd_output(self, cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + + return status, data + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + try: + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except: + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status + + def is_bmc_present(self): + """ + Get the BMC card present status + + Returns: + A boolean, True if present, False if absent + """ + presence = self.read_txt_file(BMC_PRES_SYS_PATH) + if presence == None: + print("Failed to get BMC card presence status") + return True if presence == "present" else False + + def run_command(self,cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py new file mode 100644 index 000000000000..6c01e694fdb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py @@ -0,0 +1,10 @@ +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Pcie(PcieUtil): + """Celestica Platform-specific PCIe class""" + + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..27ea301e307a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py @@ -0,0 +1,49 @@ +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + from .helper import APIHelper +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg" +LPC_PSU_STATUS_REG = '0xa160' +LPC_PSU_POWER_STATUS_OFFSET = 0 +LPC_PSU_PRES_STATUS_OFFSET = 2 + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self._api_helper = APIHelper() + + # Provide the functions/variables below for which implementation is to be overwritten + def get_capacity(self): + return 550 + + def get_type(self): + return 'AC' + + def get_revision(self): + """ + Retrieves the revision of the device + Returns: + string: revision of device + """ + if not self.get_presence(): + return 'N/A' + + if self._api_helper.is_bmc_present(): + cmd = "ipmitool fru list {} | grep 'Product Version'".format(5 - self.psu_index) + status, output = self._api_helper.get_cmd_output(cmd) + if status == 0: + rev = output.split()[-1] + return rev + else: + # Get the revision information from FRU + cmd = "i2cget -y -f {} {} 0x2d w".format(42 + self.psu_index - 1, hex(0x52 + self.psu_index - 1)) + status, output = self._api_helper.get_cmd_output(cmd) + if status == 0: + rev = bytes.fromhex(output.strip('0x')).decode('utf-8') + # swap to change the endian difference + return rev[::-1] + return 'N/A' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..5f88fb99704b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py @@ -0,0 +1,183 @@ +#!/usr/bin/env python + +try: + import ast + import syslog + import time + from multiprocessing import Lock + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.eeprom_lock = Lock() + + # Provide the functions/variables below for which implementation is to be overwritten + # Add reties to work around FPGAPCI 0050/eeprom: offset 0x0: sometimes read failed + def __read_eeprom(self, offset, num_bytes): + """ + read eeprom specfic bytes beginning from a random offset with size as num_bytes + + Args: + offset : + Integer, the offset from which the read transaction will start + num_bytes: + Integer, the number of bytes to be read + + Returns: + bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes + None, if the read_eeprom fails + """ + buf = None + eeprom_raw = [] + sysfs_sfp_i2c_client_eeprom_path = self.eeprom_path + + if not self.get_presence(): + return None + + sysfsfile_eeprom = None + attempts = 0 + max_retries = 5 + success = False + while attempts < max_retries and not success: + try: + if attempts > 0: + time.sleep(0.2) + sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, "rb", 0) + sysfsfile_eeprom.seek(offset) + buf = sysfsfile_eeprom.read(num_bytes) + success = True + except Exception as ex: + attempts += 1 + # Eliminate the redundant errors by showing errors only for lower page and page 0 + if attempts == max_retries: + if offset < 256: + syslog.syslog(syslog.LOG_INFO, "port {0}: {1}: offset {2}: read reach retry limit, refer to last eeprom cache".format(self.port_index, sysfs_sfp_i2c_client_eeprom_path, hex(offset))) + return None + finally: + if sysfsfile_eeprom is not None: + sysfsfile_eeprom.close() + + if buf is None: + return None + + for x in buf: + eeprom_raw.append(x) + + while len(eeprom_raw) < num_bytes: + eeprom_raw.append(0) + return bytes(eeprom_raw) + + # Read out any bytes from any offset + def read_eeprom(self, offset, num_bytes): + """ + read eeprom specfic bytes beginning from a random offset with size as num_bytes + + Args: + offset : + Integer, the offset from which the read transaction will start + num_bytes: + Integer, the number of bytes to be read + + Returns: + bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes + None, if the read_eeprom fails + """ + self.eeprom_lock.acquire() + bytes = self.__read_eeprom(offset, num_bytes) + self.eeprom_lock.release() + return bytes + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..ac73015d1ea3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py @@ -0,0 +1,56 @@ +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +SENSORS_LOW_THRESHOLD_MAP = {"Base_Temp_U5": -5, "Base_Temp_U56": -5, + "Switch_Temp_U28": -5, "Switch_Temp_U29": -5} + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_high_threshold(self): + if self.is_psu_thermal: + device = "PSU{}".format(self.thermals_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_temp1_high_threshold") + if not output: + return None + + temp1 = output['status'] + # temperature returned is in milli celcius + return float(temp1)/1000 + else: + return super().get_high_threshold() + + def get_low_threshold(self): + low_threshold = SENSORS_LOW_THRESHOLD_MAP.get(self.get_name(), None) + if low_threshold != None: + return low_threshold + return super().get_low_threshold() + + +BCM_TEMP_GET_CMD = "cat /sys/devices/platform/fpga_sysfs/bcm_temp" +THERMAL_MONITOR_SENSORS = ["CPU_Temp", "BCM_SW_Temp", "VDD_CORE_Temp", "VDD_ANLG_Temp"] +THERMAL_THRESHOLDS = { "CPU_Temp": { "high_threshold": 89, "low_threshold": 'N/A', "high_crit_threshold": 93, + "temp_cmd": "r=$(cat /sys/class/thermal/thermal_zone1/temp) && printf '%.1f' $(($r / 1000))" }, + "BCM_SW_Temp": { "high_threshold": 110, "low_threshold": 'N/A', "high_crit_threshold": 120, + "temp_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/bcm_temp) && printf '%.1f' $(((434100 - ((12500000 / $r - 1) * 535) + 5000) / 1000))"}, + "VDD_CORE_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A', + "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon45/temp1_input) && printf '%.1f' $(($r / 1000))" }, + "VDD_ANLG_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A', + "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon44/temp1_input) && printf '%.1f' $(($r / 1000))" }} + +class ThermalMon(ThermalBase): + def __init__(self, index, name): + self.thermal_index = index + 1 + self.thermal_name = name + self._helper = APIHelper() + diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py new file mode 100644 index 000000000000..8be043d94310 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py @@ -0,0 +1,341 @@ +from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from .helper import APIHelper + +from sonic_py_common import logger + +sonic_logger = logger.Logger('thermal_actions') + + +class SetFanSpeedAction(ThermalPolicyActionBase): + """ + Base thermal action class to set speed for fans + """ + # JSON field definition + JSON_FIELD_SPEED = 'speed' + + def __init__(self): + """ + Constructor of SetFanSpeedAction + """ + self.default_speed = 50 + self.hightemp_speed = 100 + self.speed = self.default_speed + + def load_from_json(self, json_obj): + """ + Construct SetFanSpeedAction via JSON. JSON example: + { + "type": "fan.all.set_speed" + "speed": "100" + } + :param json_obj: A JSON object representing a SetFanSpeedAction action. + :return: + """ + if SetFanSpeedAction.JSON_FIELD_SPEED in json_obj: + speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + if speed < 0 or speed > 100: + raise ValueError('SetFanSpeedAction invalid speed value {} in JSON policy file, valid value should be [0, 100]'. + format(speed)) + self.speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_SPEED)) + + @classmethod + def set_all_fan_speed(cls, thermal_info_dict, speed): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + fan_info_obj = thermal_info_dict[FanInfo.INFO_NAME] + for fan in fan_info_obj.get_all_fans(): + fan.set_speed(int(speed)) + + +@thermal_json_object('fan.all.set_speed') +class SetAllFanSpeedAction(SetFanSpeedAction): + """ + Action to set speed for all fans + """ + def execute(self, thermal_info_dict): + """ + Set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, self.speed) + + +class LinearFanController(): + """ + Common Linear FAN Controller for B2F and F2B + """ + def __init__(self, low_temp, high_temp, hyst_temp, low_pwm, high_pwm): + self._low_temp = low_temp + self._high_temp = high_temp + self._hyst_temp = hyst_temp + self._low_pwm = low_pwm + self._high_pwm = high_pwm + self._linear_slope = (high_pwm - low_pwm) / (high_temp - low_temp) + self._last_pwm = None + + def calc_fan_speed(self, thermal_data): + temp = thermal_data.curr_temp + descend = thermal_data.temp_descend + + low_temp = self._low_temp - self._hyst_temp if descend else self._low_temp + high_temp = self._high_temp - self._hyst_temp if descend else self._high_temp + if temp <= low_temp: + sonic_logger.log_debug("[LinearController] temp: {} equal or lower than low temp: {}, set to lowest pwm: {}".format(temp, low_temp, self._low_pwm)) + self._last_pwm = self._low_pwm + return self._low_pwm + elif temp >= high_temp: + sonic_logger.log_debug("[LinearController] temp: {} equal or higher than high temp: {}, set to highest pwm: {}".format(temp, high_temp, self._high_pwm)) + self._last_pwm = self._high_pwm + return self._high_pwm + else: + pwm = float(self._linear_slope * (temp - low_temp) + self._low_pwm) + if descend: + if self._last_pwm != None and pwm > self._last_pwm: + pwm = self._last_pwm + else: + if self._last_pwm != None and pwm < self._last_pwm: + pwm = self._last_pwm + self._last_pwm = pwm + sonic_logger.log_debug("[LinearController] temp: {}, slope: {}, low_temp: {}, low_pwm: {}, set to pwm: {}".format(temp, self._linear_slope, low_temp, self._low_pwm, pwm)) + return pwm + +class PIDFanController(): + """ + Common FAN PID controller for CPU and BCM Temp + """ + MAX_SPEED = 255 + MIN_SPEED = 89 + def __init__(self, setpoint, p_val, i_val, d_val): + self._setpoint = setpoint + self._p = p_val + self._i = i_val + self._d = d_val + self._curr_speed = self.MIN_SPEED + + def calc_fan_speed(self, thermal_data): + hist2_temp = thermal_data.hist2_temp + hist1_temp = thermal_data.hist1_temp + temp = thermal_data.curr_temp + + if hist2_temp == None or hist1_temp == None: + return round(self._curr_speed / 2.55) + speed = self._curr_speed + self._p * (temp - hist1_temp) \ + + self._i * (temp - self._setpoint) + self._d * (temp - 2 * hist1_temp + hist2_temp) + if speed > self.MAX_SPEED: + speed = self.MAX_SPEED + elif speed < self.MIN_SPEED: + speed = self.MIN_SPEED + self._curr_speed = speed + speed_percent = float(speed / 2.55) + sonic_logger.log_debug("[PIDController] setpoint: {} p: {} i: {} d: {}, temp: {} hist_temp1: {} hist_temp2: {}, pwm: {}, percent: {}".format(self._setpoint, self._p, self._i, self._d, temp, hist1_temp, hist2_temp, speed, speed_percent)) + return speed_percent + + +@thermal_json_object('thermal.temp_check_and_fsc_algo_control') +class ThermalAlgorithmAction(SetFanSpeedAction): + """ + Action to check thermal sensor temperature change status and set speed for all fans + """ + THERMAL_LOG_LEVEL = "thermal_log_level" + CPU_PID_PARAMS = "cpu_pid_params" + BCM_PID_PARAMS = "bcm_pid_params" + F2B_LINEAR_PARAMS = "f2b_linear_params" + B2F_LINEAR_PARAMS = "b2f_linear_params" + + def __init__(self): + SetFanSpeedAction.__init__(self) + self.sys_airflow = None + self.cpu_pid_params = None + self.bcm_pid_params = None + self.f2b_linear_params = None + self.b2f_linear_params = None + self.cpu_fan_controller = None + self.bcm_fan_controller = None + self.linear_fan_controller = None + + def load_from_json(self, json_obj): + """ + Construct ThermalAlgorithmAction via JSON. JSON example: + { + "type": "thermal.temp_check_and_fsc_algo_control", + "cpu_pid_params": [82, 3, 0.5, 0.2], + "bcm_pid_params": [88, 4, 0.3, 0.4], + "f2b_linear_params": [34, 54, 3, 35, 100], + "b2f_linear_params": [28, 48, 3, 35, 100] + } + :param json_obj: A JSON object representing a ThermalAlgorithmAction action. + :return: + """ + if self.THERMAL_LOG_LEVEL in json_obj: + thermal_log_level = json_obj[self.THERMAL_LOG_LEVEL] + if not isinstance(thermal_log_level, int) or thermal_log_level not in range(0,8): + raise ValueError('ThermalAlgorithmAction invalid thermal log level, a interger in range 0-7 is required') + sonic_logger.set_min_log_priority(thermal_log_level) + if self.CPU_PID_PARAMS in json_obj: + cpu_pid_params = json_obj[self.CPU_PID_PARAMS] + if not isinstance(cpu_pid_params, list) or len(cpu_pid_params) != 4: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(cpu_pid_params)) + self.cpu_pid_params = cpu_pid_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file') + + if self.BCM_PID_PARAMS in json_obj: + bcm_pid_params = json_obj[self.BCM_PID_PARAMS] + if not isinstance(bcm_pid_params, list) or len(bcm_pid_params) != 4: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(bcm_pid_params)) + self.bcm_pid_params = bcm_pid_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file') + + if self.F2B_LINEAR_PARAMS in json_obj: + f2b_linear_params = json_obj[self.F2B_LINEAR_PARAMS] + if not isinstance(f2b_linear_params, list) or len(f2b_linear_params) != 5: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(f2b_linear_params)) + self.f2b_linear_params = f2b_linear_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file') + + if self.B2F_LINEAR_PARAMS in json_obj: + b2f_linear_params = json_obj[self.B2F_LINEAR_PARAMS] + if not isinstance(b2f_linear_params, list) or len(b2f_linear_params) != 5: + raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'. + format(b2f_linear_params)) + self.b2f_linear_params = b2f_linear_params + else: + raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file') + + sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid: {}, bcm_pid: {}, f2b_linear: {}, b2f_linear: {}".format(self.cpu_pid_params, self.bcm_pid_params, self.f2b_linear_params, self.b2f_linear_params)) + + def execute(self, thermal_info_dict): + """ + Check check thermal sensor temperature change status and set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + if self.sys_airflow == None: + from .thermal_infos import ChassisInfo + if ChassisInfo.INFO_NAME in thermal_info_dict: + chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME] + chassis = chassis_info_obj.get_chassis() + self.sys_airflow = chassis.get_system_airflow() + + if self.cpu_fan_controller == None: + self.cpu_fan_controller = PIDFanController(self.cpu_pid_params[0], self.cpu_pid_params[1], + self.cpu_pid_params[2], self.cpu_pid_params[3]) + if self.bcm_fan_controller == None: + self.bcm_fan_controller = PIDFanController(self.bcm_pid_params[0], self.bcm_pid_params[1], + self.bcm_pid_params[2], self.bcm_pid_params[3]) + if self.linear_fan_controller == None: + if self.sys_airflow == 'INTAKE': + linear_params = self.b2f_linear_params + else: + linear_params = self.f2b_linear_params + self.linear_fan_controller = LinearFanController(linear_params[0], linear_params[1], linear_params[2], \ + linear_params[3], linear_params[4]) + + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and \ + isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + + thermal_info_obj = thermal_info_dict[ThermalInfo.INFO_NAME] + thermals_data = thermal_info_obj.get_thermals_data() + cpu_thermal_data = thermals_data["CPU_Temp"] + cpu_fan_pwm = self.cpu_fan_controller.calc_fan_speed(cpu_thermal_data) + bcm_thermal_data = thermals_data["BCM_SW_Temp"] + bcm_fan_pwm = self.bcm_fan_controller.calc_fan_speed(bcm_thermal_data) + if self.sys_airflow == 'INTAKE': + thermal_data = thermals_data["Base_Temp_U5"] + linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data) + thermal_data = thermals_data["Base_Temp_U56"] + linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data) + else: + thermal_data = thermals_data["Switch_Temp_U28"] + linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data) + thermal_data = thermals_data["Switch_Temp_U29"] + linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data) + target_fan_pwm = max(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2) + sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid_pwm: {}, bcm_pid_pwm: {}, linear_fan_pwm: {}, linear_fan_pwm2: {}, target_pwm: {}".format(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2, target_fan_pwm)) + SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, round(target_fan_pwm)) + + +@thermal_json_object('switch.shutdown') +class SwitchPolicyAction(ThermalPolicyActionBase): + """ + Base class for thermal action. Once all thermal conditions in a thermal policy are matched, + all predefined thermal action will be executed. + """ + def execute(self, thermal_info_dict): + """ + Take action when thermal condition matches. For example, adjust speed of fan or shut + down the switch. + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + sonic_logger.log_warning("Alarm for temperature critical is detected, shutdown Device") + # Wait for 30s then shutdown + import time + time.sleep(30) + # Power off COMe through CPLD + CPLD_POWRE_OFF_CMD = "echo 0xa120 0xfc > /sys/bus/platform/devices/baseboard/setreg" + api_helper = APIHelper() + api_helper.get_cmd_output(CPLD_POWER_OFF_CMD) + + +@thermal_json_object('thermal_control.control') +class ControlThermalAlgoAction(ThermalPolicyActionBase): + """ + Action to control the thermal control algorithm + """ + # JSON field definition + JSON_FIELD_STATUS = 'status' + + def __init__(self): + self.status = True + + def load_from_json(self, json_obj): + """ + Construct ControlThermalAlgoAction via JSON. JSON example: + { + "type": "thermal_control.control" + "status": "true" + } + :param json_obj: A JSON object representing a ControlThermalAlgoAction action. + :return: + """ + if ControlThermalAlgoAction.JSON_FIELD_STATUS in json_obj: + status_str = json_obj[ControlThermalAlgoAction.JSON_FIELD_STATUS].lower() + if status_str == 'true': + self.status = True + elif status_str == 'false': + self.status = False + else: + raise ValueError('Invalid {} field value, please specify true of false'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + else: + raise ValueError('ControlThermalAlgoAction ' + 'missing mandatory field {} in JSON policy file'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + + def execute(self, thermal_info_dict): + """ + Disable thermal control algorithm + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + from .thermal_infos import ChassisInfo + if ChassisInfo.INFO_NAME in thermal_info_dict: + chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME] + chassis = chassis_info_obj.get_chassis() + thermal_manager = chassis.get_thermal_manager() + if self.status: + thermal_manager.start_thermal_control_algorithm() + else: + thermal_manager.stop_thermal_control_algorithm() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py new file mode 100644 index 000000000000..c8bb51ef966c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py @@ -0,0 +1,121 @@ +from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + + +class FanCondition(ThermalPolicyConditionBase): + def get_fan_info(self, thermal_info_dict): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + return thermal_info_dict[FanInfo.INFO_NAME] + else: + return None + +@thermal_json_object('fantray.any.absence') +class AnyFantrayAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fantrays()) > 0 if fan_info_obj else False + +@thermal_json_object('fantray.all.absence') +class AllFantrayAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_presence_fantrays()) == 0 if fan_info_obj else False + +@thermal_json_object('fantray.all.presence') +class AllFantrayPresenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fantrays()) == 0 if fan_info_obj else True + +@thermal_json_object('fan.rotor.more_than_one.failed') +class FanRotorMoreThanOneFailedCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) > 1 if fan_info_obj else False + +@thermal_json_object('fan.rotor.less_than_two.failed') +class FanRotorLessThanTwoFailedCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) < 2 if fan_info_obj else True + +class PsuCondition(ThermalPolicyConditionBase): + def get_psu_info(self, thermal_info_dict): + from .thermal_infos import PsuInfo + if PsuInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[PsuInfo.INFO_NAME], PsuInfo): + return thermal_info_dict[PsuInfo.INFO_NAME] + else: + return None + +@thermal_json_object('psu.any.absence') +class AnyPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) > 0 if psu_info_obj else False + +@thermal_json_object('psu.all.absence') +class AllPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_presence_psus()) == 0 if psu_info_obj else False + +@thermal_json_object('psu.all.presence') +class AllPsuPresenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) == 0 if psu_info_obj else True + + +class ThermalCondition(ThermalPolicyConditionBase): + def get_thermal_info(self, thermal_info_dict): + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + return thermal_info_dict[ThermalInfo.INFO_NAME] + else: + return None + +@thermal_json_object('thermal.over.high_critical_threshold') +class ThermalOverHighCriticalCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_over_high_critical_threshold() + else: + return False + +@thermal_json_object('thermal.any.over.high_threshold') +class AnyThermalOverHighThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_warm_up_and_over_high_threshold() + else: + return False + +@thermal_json_object('thermal.any.below.low_threshold') +class AnyThermalBelowLowThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_any_cool_down_and_below_low_threshold() + else: + return False + +@thermal_json_object('thermal.all.below.high_threshold') +class AnyThermalOverHighThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return not thermal_info_obj.is_any_warm_up_and_over_high_threshold() + else: + return True + +@thermal_json_object('thermal.all.over.low_threshold') +class AnyThermalBelowLowThresholdCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return not thermal_info_obj.is_any_cool_down_and_below_low_threshold() + else: + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py new file mode 100644 index 000000000000..4925637f8cb3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py @@ -0,0 +1,362 @@ +from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from sonic_py_common import logger + +sonic_logger = logger.Logger('thermal_infos') + +@thermal_json_object('fan_info') +class FanInfo(ThermalPolicyInfoBase): + """ + Fan information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'fan_info' + FAN_LOW_WARNING_SPEED = 1370 + FAN_FRONT_HIGH_WARNING_SPEED = 29125 + FAN_REAR_HIGH_WARNING_SPEED = 25375 + + def __init__(self): + self._all_fans = set() + self._absence_fans = set() + self._presence_fans = set() + self._absence_fantrays = set() + self._presence_fantrays = set() + self._low_warning_fans = set() + self._high_warning_fans = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence fans. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + try: + for fantray in chassis.get_all_fan_drawers(): + if fantray.get_presence() and fantray not in self._presence_fantrays: + self._presence_fantrays.add(fantray) + self._status_changed = True + if fantray in self._absence_fantrays: + self._absence_fantrays.remove(fantray) + elif not fantray.get_presence() and fantray not in self._absence_fantrays: + self._absence_fantrays.add(fantray) + self._status_changed = True + if fantray in self._presence_fantrays: + self._presence_fantrays.remove(fantray) + + for fan in fantray.get_all_fans(): + if fan.get_presence() and fantray not in self._presence_fans: + self._presence_fans.add(fan) + self._status_changed = True + if fan in self._absence_fans: + self._absence_fans.remove(fan) + elif not fan.get_presence() and fan not in self._absence_fans: + self._absence_fans.add(fan) + self._status_changed = True + if fan in self._presence_fans: + self._presence_fans.remove(fan) + + fan_name = fan.get_name() + fan_rpm = fan.get_speed_rpm() + if fan not in self._all_fans: + self._all_fans.add(fan) + # FAN Low speed warning + if fan_rpm < self.FAN_LOW_WARNING_SPEED and fan not in self._low_warning_fans: + self._low_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, low speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_LOW_WARNING_SPEED and fan in self._low_warning_fans: + sonic_logger.log_notice("FAN {}, restore from low speed warning".format(fan_name)) + self._low_warning_fans.remove(fan) + # FAN high speed warning + if fan.fan_index == 1: + if fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan not in self._high_warning_fans: + self._high_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan in self._high_warning_fans: + self._high_warning_fans.remove(fan) + sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name)) + else: + if fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan not in self._high_warning_fans: + self._high_warning_fans.add(fan) + sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm)) + elif fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan in self._high_warning_fans: + self._high_warning_fans.remove(fan) + sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def get_all_fans(self): + """ + Retrieves all fans + :return: A set of fans + """ + return self._all_fans + + def get_absence_fantrays(self): + """ + Retrieves absence fans + :return: A set of absence fantrays + """ + return self._absence_fantrays + + def get_presence_fantrays(self): + """ + Retrieves presence fans + :return: A set of presence fantrays + """ + return self._presence_fantrays + + def get_absence_fans(self): + """ + Retrieves absence fans + :return: A set of absence fans + """ + return self._absence_fans + + def get_presence_fans(self): + """ + Retrieves presence fans + :return: A set of presence fans + """ + return self._presence_fans + + def get_low_warning_fans(self): + """ + Retrieves low rpm warning fans + :return: A set of low rpm warning fans + """ + return self._low_warning_fans + + def get_high_warning_fans(self): + """ + Retrieves high rpm warning fans + :return: A set of high rpm warning fans + """ + return self._high_warning_fans + + def is_status_changed(self): + """ + Retrieves if the status of fan information changed + :return: True if status changed else False + """ + return self._status_changed + + +@thermal_json_object('psu_info') +class PsuInfo(ThermalPolicyInfoBase): + """ + PSU information needed by thermal policy + """ + INFO_NAME = 'psu_info' + PSU_TEMP_HIGH_WARNING_THRESHOLD = 65 + + def __init__(self): + self._absence_psus = set() + self._presence_psus = set() + self._high_warning_psus = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence PSUs. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + try: + for psu in chassis.get_all_psus(): + if psu.get_presence() and psu not in self._presence_psus: + self._presence_psus.add(psu) + self._status_changed = True + if psu in self._absence_psus: + self._absence_psus.remove(psu) + elif (not psu.get_presence()) and psu not in self._absence_psus: + self._absence_psus.add(psu) + self._status_changed = True + if psu in self._presence_psus: + self._presence_psus.remove(psu) + # PSU Temp high warning + psu_name = psu.get_name() + psu_temp = psu.get_temperature() + if psu_temp != None and psu_temp != 'N/A': + if psu_temp > self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu not in self._high_warning_psus: + self._high_warning_psus.add(psu) + sonic_logger.log_warning("PSU {} temp {}, high temperature warning".format(psu_name, psu_temp)) + elif psu_temp < self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu in self._high_warning_psus: + self._high_warning_psus.remove(psu) + sonic_logger.log_notice("PSU {} restore from high temperature warning".format(psu_name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def get_absence_psus(self): + """ + Retrieves presence PSUs + :return: A set of absence PSUs + """ + return self._absence_psus + + def get_presence_psus(self): + """ + Retrieves presence PSUs + :return: A set of presence fans + """ + return self._presence_psus + + def get_high_warning_psus(self): + """ + Retrieves high temperature warning PSUs + :return: A set of high temp fans + """ + return self._high_warning_psus + + def is_status_changed(self): + """ + Retrieves if the status of PSU information changed + :return: True if status changed else False + """ + return self._status_changed + + +class ThermalData(): + def __init__(self, name): + self.name = name + self.hist2_temp = None + self.hist1_temp = None + self.curr_temp = None + self.temp_descend = False + + def update_temp(self, temp): + self.hist2_temp = self.hist1_temp + self.hist1_temp = self.curr_temp + self.curr_temp = temp + return self + + def update_temp_trend(self): + if self.hist1_temp == None: + self.temp_descend = False + elif self.curr_temp < self.hist1_temp: + self.temp_descend = True + else: + self.temp_descend = False + return self + +@thermal_json_object('thermal_info') +class ThermalInfo(ThermalPolicyInfoBase): + """ + Thermal information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'thermal_info' + THERMAL_SHUTDOWN_TEMP_MAP = {"CPU_Temp": 93, "BCM_SW_Temp": 120} + + def __init__(self): + self.init = False + self._high_warning_thermals = set() + self._low_warning_thermals = set() + self._high_shutdown_thermals = set() + self._thermals_data = {} + + def collect(self, chassis): + """ + Collect thermal sensor temperature change status + :param chassis: The chassis object + :return: + """ + try: + for thermal in chassis.get_all_thermals(): + name = thermal.get_name() + temp = thermal.get_temperature() + if temp == None or temp == 'N/A': + continue + high_threshold = thermal.get_high_threshold() + low_threshold = thermal.get_low_threshold() + thermal_shutdown = self.THERMAL_SHUTDOWN_TEMP_MAP.get(name, None) + + # Collect thermal data + thermal_data = self._thermals_data.get(name, None) + if thermal_data == None: + thermal_data = ThermalData(name) + self._thermals_data[name] = thermal_data + thermal_data.update_temp(temp).update_temp_trend() + + # Handle high threshold condition + if high_threshold != None and high_threshold != 'N/A': + if temp > high_threshold and thermal not in self._high_warning_thermals: + self._high_warning_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, high threshold warning".format(name, temp)) + if thermal_shutdown != None and temp > thermal_shutdown: + self._high_shutdown_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, high temp shutdown warning".format(name, temp)) + elif temp < (high_threshold - 3) and thermal in self._high_warning_thermals: + self._high_warning_thermals.remove(thermal) + sonic_logger.log_notice("Thermal {}, restore from high threshold warning".format(name)) + if thermal in self._high_shutdown_thermals: + self._high_shutdown_thermals.remove(thermal) + + # Handle low threshold condition + if low_threshold != None and low_threshold != 'N/A': + if temp < low_threshold and thermal not in self._low_warning_thermals: + self._low_warning_thermals.add(thermal) + sonic_logger.log_warning("Thermal {} temp {}, low threshold warning".format(name, temp)) + elif temp > (low_threshold + 3) and thermal in self._low_warning_thermals: + self._low_warning_thermals.remove(thermal) + sonic_logger.log_notice("Thermal {}, restore from low threshold warning".format(name)) + except Exception as e: + sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno)) + + def is_any_warm_up_and_over_high_threshold(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return len(self._high_warning_thermals) > 0 + + def is_any_cool_down_and_below_low_threshold(self): + """ + Retrieves if the temperature is cold down and below low threshold + :return: True if the temperature is cold down and below low threshold else False + """ + return len(self._low_warning_thermals) > 0 + + def is_any_over_high_critical_threshold(self): + """ + Retrieves if the temperature is over high critical threshold + :return: True if the temperature is over high critical threshold else False + """ + return len(self._high_shutdown_thermals) > 0 + + def get_thermals_data(self): + """ + Retrieves all the thermal data + :return: thermal data dict using thermal name as key + """ + return self._thermals_data + + +@thermal_json_object('chassis_info') +class ChassisInfo(ThermalPolicyInfoBase): + """ + Chassis information needed by thermal policy + """ + INFO_NAME = 'chassis_info' + + def __init__(self): + self._chassis = None + + def collect(self, chassis): + """ + Collect platform chassis. + :param chassis: The chassis object + :return: + """ + self._chassis = chassis + + def get_chassis(self): + """ + Retrieves platform chassis object + :return: A platform chassis object. + """ + return self._chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py new file mode 100644 index 000000000000..fb9557270f05 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py @@ -0,0 +1,21 @@ +from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase +from .thermal_infos import * +from .thermal_conditions import * +from .thermal_actions import * + +class ThermalManager(ThermalManagerBase): + @classmethod + def initialize(cls): + """ + Initialize thermal manager, including register thermal condition types and thermal action types + and any other vendor specific initialization. + """ + return True + + @classmethod + def deinitialize(cls): + """ + Destroy thermal manager, including any vendor specific cleanup. + :return: + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..90b5ee352c08 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py @@ -0,0 +1,14 @@ +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Watchdog(PddfWatchdog): + """PDDF Platform-Specific Watchdog Class""" + + def __init__(self): + PddfWatchdog.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py new file mode 100644 index 000000000000..a1535165bb66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py @@ -0,0 +1,28 @@ +import os +import sys +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh new file mode 100755 index 000000000000..89c53b2ccb7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh @@ -0,0 +1,39 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +bmc_present=`cat /sys/bus/platform/devices/baseboard/bmc_presence` + +if [[ "$bmc_present" == "present" ]]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..95e4def3f903 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh @@ -0,0 +1,37 @@ +#!/bin/bash + +declare -r CPLD_SETREG="/sys/bus/platform/devices/baseboard/setreg" +declare -r CPLD_GETREG="/sys/bus/platform/devices/baseboard/getreg" + +# Load fpga extend driver after fpga device created +modprobe pddf_custom_fpga_extend + +# attach ucd90120 devices, bus 107, devices 0x34 and 0x35 +echo "ucd90120 0x34" > /sys/bus/i2c/devices/i2c-107/new_device +echo "ucd90120 0x35" > /sys/bus/i2c/devices/i2c-107/new_device + +# attach mp2975 devices, bus 108, devices 0x70 and 0x7a +echo "mp2975 0x70" > /sys/bus/i2c/devices/i2c-108/new_device +echo "mp2975 0x7a" > /sys/bus/i2c/devices/i2c-108/new_device + +# Set SYS_LED to Green, assuming everything came up fine. +echo "0xa162 0xdc" > ${CPLD_SETREG} + +# Disable CPLD thermal shutdown by default +echo "0xa175 0x0" > ${CPLD_SETREG} + +BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence" +BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}` + +#Set off Alarm LED +if [ ${BMC_PRESENCE} == "present" ]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null + + #Set CPLD Fan LED register to BMC control + ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..29bc603d447c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +echo 'pddf psu driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py new file mode 100644 index 000000000000..8cab9ee29554 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py @@ -0,0 +1,179 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Left Temp'),\ + ('Base_Temp_U56', 'Baseboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_Temp_U17', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', 'ASIC External Rear Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('VDD_ANLG_Temp', 'MP2975 VDD ANLG Temp'),\ + ('VDD_CORE_Temp', 'MP2975 VDD CORE Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh new file mode 100755 index 000000000000..2556858cdab9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh @@ -0,0 +1,30 @@ +#!/bin/bash + +# Probe Baseboard CPLD driver +modprobe baseboard_cpld +sleep 1 + +# Get BMC mode +PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf` +BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence" +BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}` +echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}" + +# Copy pddf-device.json according to bmc mode +PDDF_JSON="pddf-device.json" +PDDF_JSON_BMC="pddf-device-bmc.json" +PDDF_JSON_NONBMC="pddf-device-nonbmc.json" +PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf" +PLATFORM_COMPONENTS_FILE="/usr/share/sonic/device/${PLATFORM}/platform_components.json" +if [ ${BMC_PRESENCE} == "present" ]; then + cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + # Add BMC component if BMC exists + if ! grep -q "BMC" ${PLATFORM_COMPONENTS_FILE}; then + sed -i '6i \ "BMC": {},' ${PLATFORM_COMPONENTS_FILE} + fi +else + # BMC Card absent + cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON} + # Remove BMC component for NonBMC + sed -i '/"BMC"/d' ${PLATFORM_COMPONENTS_FILE} +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors new file mode 100644 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service new file mode 100644 index 000000000000..f4098b34b60e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service @@ -0,0 +1,16 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service watchdog-control.service +Before=opennsl-modules.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh 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a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py new file mode 100644 index 000000000000..319178d62a41 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py @@ -0,0 +1,83 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import os +import sys +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + status, output = commands.getstatusoutput("systemctl stop xxxx-platform-init.service") + if status: + print "Stop xxxx-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable xxxx-platform-init.service") + if status: + print "Disable xxxx-platform-init.service failed %d"%status + return False + + status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py clean") + if status: + print "xxxx_util.py clean command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py install") + if status: + print "xxxx_util.py install command failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl enable xxxx-platform-init.service") + if status: + print "Enable xxxx-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start xxxx-platform-init.service") + if status: + print "Start xxxx-platform-init.service failed %d"%status + return False + + return True + +def start_platform_pddf(): + # Enable PDDF 2.0 object class for xxxx + status, output = commands.getstatusoutput("mkdir /usr/share/sonic/platform/sonic_platform") + if status: + print "Unable to create 2.0 object class folder /usr/share/sonic/platform/sonic_platform" + return False + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + # Disable PDDF 2.0 object class for xxxx + status, output = commands.getstatusoutput("rm -r /usr/share/sonic/platform/sonic_platform") + if status: + print "Unable to delete 2.0 object class folder /usr/share/sonic/platform/sonic_platform" + return False + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + +def main(): + pass + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini new file mode 100644 index 000000000000..7227dd6273c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini @@ -0,0 +1,19 @@ +#[PID thermal control setting] +[PID enable] +PID_enable=0 + +[SWITCH_TEMP] +setpoint = 95 +P = 3 +I = 0.5 +D = 0.5 +min_output = 76 + +[CPU_TEMP] +setpoint = -15 +P = 3 +I = 0.5 +D = 0.5 +min_output = 76 + + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf new file mode 100644 index 000000000000..57a28ea72eac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf @@ -0,0 +1 @@ +options switchboard_fpga allow_unsafe_i2c_access=1 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf new file mode 100644 index 000000000000..574c48f7a66f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf @@ -0,0 +1,16 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-gpio +i2c-mux-pca954x +8021q + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile new file mode 100644 index 000000000000..c32df8e5e6e1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile @@ -0,0 +1 @@ +obj-m := mc24lc64t.o questone2_switchboard.o questone2_baseboard_cpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c new file mode 100644 index 000000000000..4603b3d41065 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c @@ -0,0 +1,171 @@ +/* + * mc24lc64t.c - driver for Microchip 24LC64T + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define EEPROM_SIZE 8192 //mc24lt64t eeprom size in bytes. + +struct mc24lc64t_data { + struct mutex update_lock; +}; + +static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, read_time, i = 0; + int status; + + mutex_lock(&drvdata->update_lock); + + if (i2c_smbus_write_byte_data(client, off>>8, off)) + { + status = -EIO; + goto exit; + } + + msleep(1); + +begin: + + if (i < count) + { + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + do { + read_time = jiffies; + + status = i2c_smbus_read_byte(client); + if (status >= 0) + { + buf[i++] = status; + goto begin; + } + } while (time_before(read_time, timeout)); + + status = -ETIMEDOUT; + goto exit; + } + + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + + return status; +} + +static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count){ + + struct i2c_client *client = kobj_to_i2c_client(kobj); + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + unsigned long timeout, write_time, i = 0; + int status; + u16 value; + + mutex_lock(&drvdata->update_lock); + +begin: + if (i < count){ + timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/ + value = (buf[i] << 8)| off; + do { + write_time = jiffies; + status = i2c_smbus_write_word_data(client, off>>8, value); + if (status >= 0) + { + // increase offset + off++; + // increase buffer index + i++; + goto begin; + } + } while (time_before(write_time, timeout)); + status = -ETIMEDOUT; + goto exit; + } + status = count; + +exit: + mutex_unlock(&drvdata->update_lock); + return status; +} + +static struct bin_attribute mc24lc64t_bit_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUGO, + }, + .size = EEPROM_SIZE, + .read = mc24lc64t_read, + .write = mc24lc64t_write, +}; + +static int mc24lc64t_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct mc24lc64t_data *drvdata; + int err; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA + | I2C_FUNC_SMBUS_READ_BYTE)) + return -EPFNOSUPPORT; + + if (!(drvdata = devm_kzalloc(&client->dev, + sizeof(struct mc24lc64t_data), GFP_KERNEL))) + return -ENOMEM; + + i2c_set_clientdata(client, drvdata); + mutex_init(&drvdata->update_lock); + + err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); + + return err; +} + +static void mc24lc64t_remove(struct i2c_client *client) +{ + struct mc24lc64t_data *drvdata = i2c_get_clientdata(client); + sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr); +} + +static const struct i2c_device_id mc24lc64t_id[] = { + { "24lc64t", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mc24lc64t_id); + +static struct i2c_driver mc24lc64t_driver = { + .driver = { + .name = "mc24lc64t", + .owner = THIS_MODULE, + }, + .probe = mc24lc64t_probe, + .remove = mc24lc64t_remove, + .id_table = mc24lc64t_id, +}; + +module_i2c_driver(mc24lc64t_driver); + +MODULE_AUTHOR("Abhisit Sangjan "); +MODULE_DESCRIPTION("Microchip 24LC64T Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c new file mode 100644 index 000000000000..20c353ee5d00 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c @@ -0,0 +1,408 @@ +/* + * seastone2_baseboard_cpld.c - driver for Seastone2 Base Board CPLD + * This driver implement sysfs for CPLD register access using LPC bus. + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define THERMAL_ADDR 0xA176 +#define CPLD_REGISTER_SIZE 0x77 + +struct baseboard_cpld_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct baseboard_cpld_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + int len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + int len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if(i < count){ + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; +exit: + mutex_unlock(&cpld_data->cpld_lock); + return status; +} +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); + +/** + * Show system led status - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on"); +} + +/** + * Set the status of system led - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4k")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1k")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +static struct attribute *baseboard_cpld_attrs[] = { + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + NULL, +}; + +static struct bin_attribute *baseboard_cpld_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group baseboard_cpld_attrs_grp = { + .attrs = baseboard_cpld_attrs, + .bin_attrs = baseboard_cpld_bin_attrs, +}; + +static struct resource baseboard_cpld_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void baseboard_cpld_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device baseboard_cpld_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(baseboard_cpld_resources), + .resource = baseboard_cpld_resources, + .dev = { + .release = baseboard_cpld_dev_release, + } +}; + +static int baseboard_cpld_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret =0; + int portid_count; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -1; + } + + ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + if (ret) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + } + return 0; +} + +static int baseboard_cpld_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp); + return 0; +} + +static struct platform_driver baseboard_cpld_drv = { + .probe = baseboard_cpld_drv_probe, + .remove = __exit_p(baseboard_cpld_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int baseboard_cpld_init(void) +{ + // Register platform device and platform driver + platform_device_register(&baseboard_cpld_dev); + platform_driver_register(&baseboard_cpld_drv); + return 0; +} + +void baseboard_cpld_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&baseboard_cpld_drv); + platform_device_unregister(&baseboard_cpld_dev); +} + +module_init(baseboard_cpld_init); +module_exit(baseboard_cpld_exit); + +MODULE_AUTHOR("Pradchaya Phucharoen "); +MODULE_DESCRIPTION("Celestica Seastone2/Questone2 Baseboard CPLD Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c new file mode 100644 index 000000000000..945d5f26c875 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c @@ -0,0 +1,2211 @@ +/* + * seastone_switchboard.c - driver for seastone2/questone2 Switch board FPGA/CPLD. + * + * Author: Pradchaya Phucharoen + * + * Copyright (C) 2017 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * / + * \--sys + * \--devices + * \--platform + * \--seastone2 + * |--FPGA + * |--CPLD1 + * |--CPLD2 + * \--SFF + * |--QSFP[1..32] + * \--SFP[1..2] + * + */ + +#ifndef TEST_MODE +#define MOD_VERSION "2.0.0" +#else +#define MOD_VERSION "TEST" +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +static int majorNumber; +#ifdef SEASTONE2 +#define CLASS_NAME "seastone2_fpga" +#define DRIVER_NAME "seastone2" +#define FPGA_PCI_NAME "Seastone2_fpga_pci" +#else +#define CLASS_NAME "questone2_fpga" +#define DRIVER_NAME "questone2" +#define FPGA_PCI_NAME "questone2_fpga_pci" +#endif +#define DEVICE_NAME "fwupgrade" + + +static int smbus_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char rw, u8 cmd, + int size, union i2c_smbus_data *data); + +static int fpgafw_init(void); +static void fpgafw_exit(void); + + +/* +======================================== +FPGA PCIe BAR 0 Registers +======================================== +Misc Control 0x00000000 – 0x000000FF. +I2C_CH1 0x00000100 - 0x00000110 +I2C_CH2 0x00000200 - 0x00000210. +I2C_CH3 0x00000300 - 0x00000310. +I2C_CH4 0x00000400 - 0x00000410. +I2C_CH5 0x00000500 - 0x00000510. +I2C_CH6 0x00000600 - 0x00000610. +I2C_CH7 0x00000700 - 0x00000710. +I2C_CH8 0x00000800 - 0x00000810. +I2C_CH9 0x00000900 - 0x00000910. +I2C_CH10 0x00000A00 - 0x00000A10. +SPI Master 0x00001200 - 0x00001300. +PORT XCVR 0x00004000 - 0x00004FFF. +*/ + +/* MISC */ +#define FPGA_VERSION 0x0000 +#define FPGA_VERSION_MJ_MSK 0xff00 +#define FPGA_VERSION_MN_MSK 0x00ff +#define FPGA_SCRATCH 0x0004 +#define FPGA_BROAD_TYPE 0x0008 +#define FPGA_BROAD_REV_MSK 0x0038 +#define FPGA_BROAD_ID_MSK 0x0007 +#define FPGA_PLL_STATUS 0x0014 +#define BMC_I2C_SCRATCH 0x0020 +#define FPGA_SLAVE_CPLD_REST 0x0030 +#define FPGA_PERIPH_RESET_CTRL 0x0034 +#define FPGA_INT_STATUS 0x0040 +#define FPGA_INT_SRC_STATUS 0x0044 +#define FPGA_INT_FLAG 0x0048 +#define FPGA_INT_MASK 0x004c +#define FPGA_MISC_CTRL 0x0050 +#define FPGA_MISC_STATUS 0x0054 +#define FPGA_AVS_VID_STATUS 0x0068 +#define FPGA_FEATURE_CARD_GPIO 0x0070 +#define FPGA_PORT_XCVR_READY 0x000c + +/* I2C_MASTER BASE ADDR */ +#define I2C_MASTER_FREQ_1 0x0100 +#define I2C_MASTER_CTRL_1 0x0104 +#define I2C_MASTER_STATUS_1 0x0108 +#define I2C_MASTER_DATA_1 0x010c +#define I2C_MASTER_PORT_ID_1 0x0110 +#define I2C_MASTER_CH_1 1 +#define I2C_MASTER_CH_2 2 +#define I2C_MASTER_CH_3 3 +#define I2C_MASTER_CH_4 4 +#define I2C_MASTER_CH_5 5 +#define I2C_MASTER_CH_6 6 +#define I2C_MASTER_CH_7 7 +#define I2C_MASTER_CH_8 8 +#define I2C_MASTER_CH_9 9 +#define I2C_MASTER_CH_10 10 +#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10 + +/* SPI_MASTER */ +#define SPI_MASTER_WR_EN 0x1200 /* one bit */ +#define SPI_MASTER_WR_DATA 0x1204 /* 32 bits */ +#define SPI_MASTER_CHK_ID 0x1208 /* one bit */ +#define SPI_MASTER_VERIFY 0x120c /* one bit */ +#define SPI_MASTER_STATUS 0x1210 /* 15 bits */ +#define SPI_MASTER_MODULE_RST 0x1214 /* one bit */ + +/* FPGA FRONT PANEL PORT MGMT */ +#define SFF_PORT_CTRL_BASE 0x4000 +#define SFF_PORT_STATUS_BASE 0x4004 +#define SFF_PORT_INT_STATUS_BASE 0x4008 +#define SFF_PORT_INT_MASK_BASE 0x400c + +#define PORT_XCVR_REGISTER_SIZE 0x1000 + +/* PORT CTRL REGISTER +[31:7] RSVD +[6] LPMOD 6 +[5] RSVD +[4] RST 4 +[3:1] RSVD +[0] TXDIS 0 +*/ +#define CTRL_LPMOD 6 +#define CTRL_RST 4 +#define CTRL_TXDIS 0 + +/* PORT STATUS REGISTER +[31:6] RSVD +[5] IRQ 5 +[4] PRESENT 4 +[3] RSVD +[2] TXFAULT 2 +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define STAT_IRQ 5 +#define STAT_PRESENT 4 +#define STAT_TXFAULT 2 +#define STAT_RXLOS 1 +#define STAT_MODABS 0 + +/* PORT INTRPT REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS 1 +[0] MODABS 0 +*/ +#define INTR_INT_N 5 +#define INTR_PRESENT 4 +#define INTR_TXFAULT 2 +#define INTR_RXLOS 1 +#define INTR_MODABS 0 + +/* PORT INT MASK REGISTER +[31:6] RSVD +[5] INT_N 5 +[4] PRESENT 4 +[3] RSVD +[2] RSVD +[1] RXLOS_INT 1 +[0] MODABS 0 +*/ +#define MASK_INT_N 5 +#define MASK_PRESENT 4 +#define MASK_TXFAULT 2 +#define MASK_RXLOS 1 +#define MASK_MODABS 0 + +enum { + I2C_SR_BIT_RXAK = 0, + I2C_SR_BIT_MIF, + I2C_SR_BIT_SRW, + I2C_SR_BIT_BCSTM, + I2C_SR_BIT_MAL, + I2C_SR_BIT_MBB, + I2C_SR_BIT_MAAS, + I2C_SR_BIT_MCF +}; + +enum { + I2C_CR_BIT_BCST = 0, + I2C_CR_BIT_RSTA = 2, + I2C_CR_BIT_TXAK, + I2C_CR_BIT_MTX, + I2C_CR_BIT_MSTA, + I2C_CR_BIT_MIEN, + I2C_CR_BIT_MEN, +}; + +/** + * + * The function is i2c algorithm implement to allow master access to + * correct endpoint devices trough the PCA9548 switch devices. + * + * FPGA I2C Master [mutex resource] + * | + * | + * --------------------------- + * | PCA9548(s) | + * ---1--2--3--4--5--6--7--8-- + * | | | | | | | | + * EEPROM ... EEPROM + * + */ + + +#ifdef SEASTONE2 +#define VIRTUAL_I2C_QSFP_PORT 32 +#define VIRTUAL_I2C_SFP_PORT 1 +#define VIRTUAL_I2C_CPLD_PORT 1 +#define VIRTUAL_I2C_POWER_CHIP_PORT 1 +#define VIRTUAL_I2C_CPLD_B_PORT 1 +#define VIRTUAL_I2C_PSU 1 +#define VIRTUAL_I2C_FAN_TRAY 4 +#define VIRTUAL_I2C_POWER_MON 1 +#define VIRTUAL_I2C_LM75 1 + +#define VIRTUAL_I2C_PORT_LENGTH \ + VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75 + +#define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT +#else +#define VIRTUAL_I2C_SFP_PORT 48 +#define VIRTUAL_I2C_QSFP_PORT 8 +#define VIRTUAL_I2C_CPLD_PORT 1 +#define VIRTUAL_I2C_POWER_CHIP_PORT 1 +#define VIRTUAL_I2C_CPLD_B_PORT 1 +#define VIRTUAL_I2C_PSU 1 +#define VIRTUAL_I2C_FAN_TRAY 4 +#define VIRTUAL_I2C_POWER_MON 1 +#define VIRTUAL_I2C_LM75 1 + +#define VIRTUAL_I2C_PORT_LENGTH \ + VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75 + +#define SFF_PORT_TOTAL VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT +#endif + +#define VIRTUAL_I2C_CPLD_INDEX SFF_PORT_TOTAL + +#define VIRTUAL_I2C_BUS_OFFSET 2 +#define CPLD1_SLAVE_ADDR 0x30 +#define CPLD2_SLAVE_ADDR 0x31 + +static struct class* fpgafwclass = NULL; ///< The device-driver class struct pointer +static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer + +#define PCI_VENDOR_ID_TEST 0x1af4 + +#ifndef PCI_VENDOR_ID_XILINX +#define PCI_VENDOR_ID_XILINX 0x10EE +#endif + +#define FPGA_PCIE_DEVICE_ID 0x7021 +#define TEST_PCIE_DEVICE_ID 0x1110 + + +#ifdef DEBUG_KERN +#define info(fmt,args...) printk(KERN_INFO "line %3d : "fmt,__LINE__,##args) +#define check(REG) printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,ioread8(REG)); +#else +#define info(fmt,args...) +#define check(REG) +#endif + +#define GET_REG_BIT(REG,BIT) ((ioread8(REG) >> BIT) & 0x01) +#define SET_REG_BIT_H(REG,BIT) iowrite8(ioread8(REG) | (0x01 << BIT),REG) +#define SET_REG_BIT_L(REG,BIT) iowrite8(ioread8(REG) & ~(0x01 << BIT),REG) + +static struct mutex fpga_i2c_master_locks[I2C_MASTER_CH_TOTAL]; +/* Store lasted switch address and channel */ +static uint16_t fpga_i2c_lasted_access_port[I2C_MASTER_CH_TOTAL]; + +enum PORT_TYPE { + NONE, + QSFP, + SFP +}; + +struct i2c_switch{ + unsigned char master_bus; // I2C bus number + unsigned char switch_addr; // PCA9548 device address, 0xFF if directly connect to a bus. + unsigned char channel; // PCA9548 channel number. If the switch_addr is 0xFF, this value is ignored. + enum PORT_TYPE port_type; // QSFP/SFP tranceiver port type. + char calling_name[20]; // Calling name. +}; + +struct i2c_dev_data { + int portid; + struct i2c_switch pca9548; +}; + +#ifdef SEASTONE2 +/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ +static struct i2c_switch fpga_i2c_bus_dev[] = { + /* BUS2 QSFP Exported as virtual bus */ + {I2C_MASTER_CH_2,0x72,0,QSFP,"QSFP1"}, {I2C_MASTER_CH_2,0x72,1,QSFP,"QSFP2"}, {I2C_MASTER_CH_2,0x72,2,QSFP,"QSFP3"}, {I2C_MASTER_CH_2,0x72,3,QSFP,"QSFP4"}, + {I2C_MASTER_CH_2,0x72,4,QSFP,"QSFP5"}, {I2C_MASTER_CH_2,0x72,5,QSFP,"QSFP6"}, {I2C_MASTER_CH_2,0x72,6,QSFP,"QSFP7"}, {I2C_MASTER_CH_2,0x72,7,QSFP,"QSFP8"}, + {I2C_MASTER_CH_2,0x73,0,QSFP,"QSFP9"}, {I2C_MASTER_CH_2,0x73,1,QSFP,"QSFP10"},{I2C_MASTER_CH_2,0x73,2,QSFP,"QSFP11"},{I2C_MASTER_CH_2,0x73,3,QSFP,"QSFP12"}, + {I2C_MASTER_CH_2,0x73,4,QSFP,"QSFP13"},{I2C_MASTER_CH_2,0x73,5,QSFP,"QSFP14"},{I2C_MASTER_CH_2,0x73,6,QSFP,"QSFP15"},{I2C_MASTER_CH_2,0x73,7,QSFP,"QSFP16"}, + {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP17"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP18"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP19"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP20"}, + {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP21"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP22"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP23"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP24"}, + {I2C_MASTER_CH_2,0x75,0,QSFP,"QSFP25"},{I2C_MASTER_CH_2,0x75,1,QSFP,"QSFP26"},{I2C_MASTER_CH_2,0x75,2,QSFP,"QSFP27"},{I2C_MASTER_CH_2,0x75,3,QSFP,"QSFP28"}, + {I2C_MASTER_CH_2,0x75,4,QSFP,"QSFP29"},{I2C_MASTER_CH_2,0x75,5,QSFP,"QSFP30"},{I2C_MASTER_CH_2,0x75,6,QSFP,"QSFP31"},{I2C_MASTER_CH_2,0x75,7,QSFP,"QSFP32"}, + /* BUS1 SFP+ Exported as virtual bus */ + {I2C_MASTER_CH_1,0x72,0,SFP,"SFP1"},{I2C_MASTER_CH_1,0x72,1,SFP,"SFP2"}, + /* BUS3 CPLD Access via SYSFS */ + {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"}, + /* BUS5 POWER CHIP Exported as virtual bus */ + {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"}, + /* BUS4 CPLD_B */ + {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"}, + /* BUS6 PSU */ + {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"}, + /* BUS7 FAN */ + /* Channel 2 is no hardware connected */ + {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"}, + /* BUS8 POWER MONITOR */ + {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"}, + /* BUS9 LM75 */ + {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"}, +}; +#else +/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */ +static struct i2c_switch fpga_i2c_bus_dev[] = { + /* BUS1 SFP Exported as virtual bus */ + {I2C_MASTER_CH_10,0x72,0,SFP,"SFP1"}, {I2C_MASTER_CH_10,0x72,1,SFP,"SFP2"}, {I2C_MASTER_CH_10,0x72,2,SFP,"SFP3"}, {I2C_MASTER_CH_10,0x72,3,SFP,"SFP4"}, + {I2C_MASTER_CH_10,0x72,4,SFP,"SFP5"}, {I2C_MASTER_CH_10,0x72,5,SFP,"SFP6"}, {I2C_MASTER_CH_10,0x72,6,SFP,"SFP7"}, {I2C_MASTER_CH_10,0x72,7,SFP,"SFP8"}, + {I2C_MASTER_CH_10,0x73,0,SFP,"SFP9"}, {I2C_MASTER_CH_10,0x73,1,SFP,"SFP10"},{I2C_MASTER_CH_10,0x73,2,SFP,"SFP11"},{I2C_MASTER_CH_10,0x73,3,SFP,"SFP12"}, + {I2C_MASTER_CH_10,0x73,4,SFP,"SFP13"},{I2C_MASTER_CH_10,0x73,5,SFP,"SFP14"},{I2C_MASTER_CH_10,0x73,6,SFP,"SFP15"},{I2C_MASTER_CH_10,0x73,7,SFP,"SFP16"}, + {I2C_MASTER_CH_10,0x74,0,SFP,"SFP17"},{I2C_MASTER_CH_10,0x74,1,SFP,"SFP18"},{I2C_MASTER_CH_10,0x74,2,SFP,"SFP19"},{I2C_MASTER_CH_10,0x74,3,SFP,"SFP20"}, + {I2C_MASTER_CH_10,0x74,4,SFP,"SFP21"},{I2C_MASTER_CH_10,0x74,5,SFP,"SFP22"},{I2C_MASTER_CH_10,0x74,6,SFP,"SFP23"},{I2C_MASTER_CH_10,0x74,7,SFP,"SFP24"}, + {I2C_MASTER_CH_10,0x75,0,SFP,"SFP25"},{I2C_MASTER_CH_10,0x75,1,SFP,"SFP26"},{I2C_MASTER_CH_10,0x75,2,SFP,"SFP27"},{I2C_MASTER_CH_10,0x75,3,SFP,"SFP28"}, + {I2C_MASTER_CH_10,0x75,4,SFP,"SFP29"},{I2C_MASTER_CH_10,0x75,5,SFP,"SFP30"},{I2C_MASTER_CH_10,0x75,6,SFP,"SFP31"},{I2C_MASTER_CH_10,0x75,7,SFP,"SFP32"}, + {I2C_MASTER_CH_10,0x76,0,SFP,"SFP33"},{I2C_MASTER_CH_10,0x76,1,SFP,"SFP34"},{I2C_MASTER_CH_10,0x76,2,SFP,"SFP35"},{I2C_MASTER_CH_10,0x76,3,SFP,"SFP36"}, + {I2C_MASTER_CH_10,0x76,4,SFP,"SFP37"},{I2C_MASTER_CH_10,0x76,5,SFP,"SFP38"},{I2C_MASTER_CH_10,0x76,6,SFP,"SFP39"},{I2C_MASTER_CH_10,0x76,7,SFP,"SFP40"}, + {I2C_MASTER_CH_10,0x77,0,SFP,"SFP41"},{I2C_MASTER_CH_10,0x77,1,SFP,"SFP42"},{I2C_MASTER_CH_10,0x77,2,SFP,"SFP43"},{I2C_MASTER_CH_10,0x77,3,SFP,"SFP44"}, + {I2C_MASTER_CH_10,0x77,4,SFP,"SFP45"},{I2C_MASTER_CH_10,0x77,5,SFP,"SFP46"},{I2C_MASTER_CH_10,0x77,6,SFP,"SFP47"},{I2C_MASTER_CH_10,0x77,7,SFP,"SFP48"}, + /* BUS2 QSFP28 Exported as virtual bus */ + {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP1"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP2"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP3"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP4"}, + {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP5"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP6"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP7"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP8"}, + /* BUS3 CPLD Access via SYSFS */ + {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"}, + /* BUS5 POWER CHIP Exported as virtual bus */ + {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"}, + /* BUS4 CPLD_B */ + {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"}, + /* BUS6 PSU */ + {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"}, + /* BUS7 FAN */ + /* Channel 2 is no hardware connected */ + {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"}, + /* BUS8 UCD90120 */ + {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"}, + /* BUS9 TEMP SENSOR LM75 */ + {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"} +}; +#endif +struct fpga_device{ + /* data mmio region */ + void __iomem *data_base_addr; + resource_size_t data_mmio_start; + resource_size_t data_mmio_len; +}; + +static struct fpga_device fpga_dev = { + .data_base_addr = NULL, + .data_mmio_start = NULL, + .data_mmio_len = NULL, +}; + +struct seastone2_fpga_data { + struct device *sff_devices[SFF_PORT_TOTAL]; + struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL]; + struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH]; + struct mutex fpga_lock; // For FPGA internal lock + unsigned long fpga_read_addr; + uint8_t cpld1_read_addr; + uint8_t cpld2_read_addr; +}; + +struct sff_device_data { + int portid; + enum PORT_TYPE port_type; +}; + +struct seastone2_fpga_data *fpga_data; + +/* + * Kernel object for other module drivers. + * Other module can use these kobject as a parent. + */ + +static struct kobject *fpga = NULL; +static struct kobject *cpld1 = NULL; +static struct kobject *cpld2 = NULL; + +/** + * Device node in sysfs tree. + */ +static struct device *sff_dev = NULL; + +/** + * [get_fpga_reg_value description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + data = ioread32(fpga_data->fpga_read_addr); + return sprintf(buf,"0x%8.8x\n",data); +} +/** + * [set_fpga_reg_address description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @param count [description] + * @return [description] + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + + addr = (uint32_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->fpga_read_addr = fpga_dev.data_base_addr+addr; + return count; +} +/** + * [get_fpga_scratch description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + return sprintf(buf,"0x%8.8x\n", ioread32(fpga_dev.data_base_addr+FPGA_SCRATCH) & 0xffffffff); +} +/** + * [set_fpga_scratch description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @param count [description] + * @return [description] + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + data = (uint32_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + iowrite32(data, fpga_dev.data_base_addr+FPGA_SCRATCH); + return count; +} +/** + * [set_fpga_reg_value description] + * @param dev [description] + * @param devattr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + //register is 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&fpga_data->fpga_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mode = 32; + }else{ + mode = (uint32_t)strtoul(tok,&last,10); + if(mode == 0 && tok == last){ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + } + if(mode == 32){ + iowrite32(value, fpga_dev.data_base_addr+addr); + }else if(mode == 8){ + iowrite8(value, fpga_dev.data_base_addr+addr); + }else{ + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return count; +} + +/** + * Read all FPGA XCVR register in binary mode. + * @param filp [description] + * @param kobj [description] + * @param attr [description] + * @param buf [description] + * @param off [description] + * @param count [description] + * @return [description] + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + u8 read_reg; + + if( off + count > PORT_XCVR_REGISTER_SIZE ){ + return -EINVAL; + } + mutex_lock(&fpga_data->fpga_lock); + while(i < count){ + read_reg = ioread8(fpga_dev.data_base_addr + SFF_PORT_CTRL_BASE + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga_data->fpga_lock); + return status; +} + +/** + * Show FPGA port XCVR ready status + * @param dev [description] + * @param attr [description] + * @param buf [description] + * @return [description] + */ +static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int REGISTER = FPGA_PORT_XCVR_READY; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> 0) & 1U); +} + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR_RO(ready); +static BIN_ATTR_RO( dump, PORT_XCVR_REGISTER_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_setreg.attr, + &dev_attr_ready.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + +/* SW CPLDs attributes */ +static ssize_t cpld1_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + int err; + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD1_SLAVE_ADDR, 0x00, + I2C_SMBUS_READ, fpga_data->cpld1_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + + if (err < 0) + return err; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld1_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + ssize_t status; + uint8_t addr; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld1_read_addr = addr; + status = count; + } + return status; +} +struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store); + +static ssize_t cpld1_dump_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld1_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + return sprintf(buf,"0x%2.2x\n",data); +} +static ssize_t cpld1_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr; + char *last; + addr = (uint8_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->cpld1_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld1_dump = __ATTR(dump,0600,cpld1_dump_show,cpld1_dump_store); + +static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return sprintf(buf, "0x%2.2x\n",data); +} +static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + data = (uint8_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch,0600,cpld1_scratch_show,cpld1_scratch_store); + +static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + + uint8_t addr,value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strscpy(clone, buf, size); + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return sprintf(buf,"ERROR line %d",__LINE__); + } + addr = (uint8_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return sprintf(buf,"ERROR line %d",__LINE__); + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value); + if(err < 0) + return sprintf(buf,"ERROR line %d",__LINE__); + + return size; +} +struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg,0200,NULL,cpld1_setreg_store); + +static struct attribute *cpld1_attrs[] = { + &dev_attr_cpld1_getreg.attr, + &dev_attr_cpld1_dump.attr, + &dev_attr_cpld1_scratch.attr, + &dev_attr_cpld1_setreg.attr, + NULL, +}; + +static struct attribute_group cpld1_attr_grp = { + .attrs = cpld1_attrs, +}; + +static ssize_t cpld2_getreg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + int err; + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], + CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, + I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data); + if (err < 0) + return err; + + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t cpld2_getreg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint8_t addr; + ssize_t status; + + status = kstrtou8(buf, 0, &addr); + if (status == 0) { + fpga_data->cpld2_read_addr = addr; + status = count; + } + return status; +} +struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store); + +static ssize_t cpld2_dump_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + uint8_t data; + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld2_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + return sprintf(buf,"0x%2.2x\n",data); +} +static ssize_t cpld2_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + uint32_t addr; + char *last; + addr = (uint8_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + fpga_data->cpld2_read_addr = addr; + return size; +} +struct device_attribute dev_attr_cpld2_dump = __ATTR(dump,0600,cpld2_dump_show,cpld2_dump_store); + +static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // CPLD register is one byte + __u8 data; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return sprintf(buf, "0x%2.2x\n",data); +} +static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + // CPLD register is one byte + __u8 data; + char *last; + int err; + + data = (uint8_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + return -EINVAL; + } + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data); + if(err < 0) + return err; + return size; +} +struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch,0600,cpld2_scratch_show,cpld2_scratch_store); + +static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + uint8_t addr,value; + char *tok; + char clone[size]; + char *pclone = clone; + int err; + char *last; + + strscpy(clone, buf, size); + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return -EINVAL; + } + addr = (uint8_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + return -EINVAL; + } + + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value); + if(err < 0) + return err; + + return size; +} +struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg,0200,NULL,cpld2_setreg_store); + +static struct attribute *cpld2_attrs[] = { + &dev_attr_cpld2_getreg.attr, + &dev_attr_cpld2_dump.attr, + &dev_attr_cpld2_scratch.attr, + &dev_attr_cpld2_setreg.attr, + NULL, +}; + +static struct attribute_group cpld2_attr_grp = { + .attrs = cpld2_attrs, +}; + +/* QSFP/SFP+ attributes */ +static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_IRQ) & 1U); +} +DEVICE_ATTR_RO(qsfp_modirq); + +static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_PRESENT) & 1U); +} +DEVICE_ATTR_RO(qsfp_modprs); + +static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_TXFAULT) & 1U); +} +DEVICE_ATTR_RO(sfp_txfault); + +static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_RXLOS) & 1U); +} +DEVICE_ATTR_RO(sfp_rxlos); + +static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> STAT_MODABS) & 1U); +} +DEVICE_ATTR_RO(sfp_modabs); + +static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U); +} +static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_LPMOD); + else + data = data | ((u32)0x1 << CTRL_LPMOD); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_lpmode); + +static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U); +} + +static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_RST); + else + data = data | ((u32)0x1 << CTRL_RST); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(qsfp_reset); + +static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + data = ioread32(fpga_dev.data_base_addr+REGISTER); + mutex_unlock(&fpga_data->fpga_lock); + return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U); +} +static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + ssize_t status; + long value; + u32 data; + struct sff_device_data *dev_data = dev_get_drvdata(dev); + unsigned int portid = dev_data->portid; + unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10; + + mutex_lock(&fpga_data->fpga_lock); + status = kstrtol(buf, 0, &value); + if (status == 0) { + // check if value is 0 clear + data = ioread32(fpga_dev.data_base_addr+REGISTER); + if(!value) + data = data & ~( (u32)0x1 << CTRL_TXDIS); + else + data = data | ((u32)0x1 << CTRL_TXDIS); + iowrite32(data,fpga_dev.data_base_addr+REGISTER); + status = size; + } + mutex_unlock(&fpga_data->fpga_lock); + return status; +} +DEVICE_ATTR_RW(sfp_txdisable); + +static struct attribute *sff_attrs[] = { + &dev_attr_qsfp_modirq.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_reset.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txdisable.attr, + NULL, +}; + +static struct attribute_group sff_attr_grp = { + .attrs = sff_attrs, +}; + +static const struct attribute_group *sff_attr_grps[] = { + &sff_attr_grp, + NULL +}; + + +static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be "nomal", "test" + __u8 led_mode_1,led_mode_2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + if(err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_2); + if(err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_mode_1 ? "test" : "normal", + led_mode_2 ? "test" : "normal"); +} +static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_mode_1; + if(sysfs_streq(buf, "test")){ + led_mode_1 = 0x01; + }else if(sysfs_streq(buf, "normal")){ + led_mode_1 = 0x00; + }else{ + return -EINVAL; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1); + return size; +} +DEVICE_ATTR_RW(port_led_mode); + +// Only work when port_led_mode set to 1 +static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + // value can be "off", "green", "amber", "both" + __u8 led_color1,led_color2; + int err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color1); + if(err < 0) + return err; + err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color2); + if(err < 0) + return err; + return sprintf(buf, "%s %s\n", + led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 ==0x01 ? "amber": "both", + led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 ==0x01 ? "amber": "both"); +} + +static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size) +{ + int status; + __u8 led_color; + if(sysfs_streq(buf, "off")){ + led_color = 0x03; + }else if(sysfs_streq(buf, "green")){ + led_color = 0x02; + }else if(sysfs_streq(buf, "amber")){ + led_color = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_color = 0x00; + }else{ + status = -EINVAL; + return status; + } + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color); + status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color); + return size; +} +DEVICE_ATTR_RW(port_led_color); + +static struct attribute *sff_led_test[] = { + &dev_attr_port_led_mode.attr, + &dev_attr_port_led_color.attr, + NULL, +}; + +static struct attribute_group sff_led_test_grp = { + .attrs = sff_led_test, +}; + +static struct device * seastone2_sff_init(int portid){ + struct sff_device_data *new_data; + struct device *new_device; + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data) { + printk(KERN_ALERT "Cannot alloc sff device data @port%d", portid); + return NULL; + } + /* The QSFP port ID start from 1 */ + new_data->portid = portid+1; + new_data->port_type = fpga_i2c_bus_dev[portid].port_type; + new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0,0), new_data, sff_attr_grps, "%s",fpga_i2c_bus_dev[portid].calling_name); + if (IS_ERR(new_device)) { + printk(KERN_ALERT "Cannot create sff device @port%d", portid); + kfree(new_data); + return NULL; + } + return new_device; +} + +static int i2c_wait_ack(struct i2c_adapter *a,unsigned long timeout,int writing){ + int error = 0; + int Status; + + struct i2c_dev_data *new_data = i2c_get_adapdata(a); + void __iomem *pci_bar = fpga_dev.data_base_addr; + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + unsigned int master_bus = new_data->pca9548.master_bus; + + if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){ + error = -ENXIO; + return error; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus-1)*0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus-1)*0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus-1)*0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus-1)*0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100; + + check(pci_bar+REG_SR0); + check(pci_bar+REG_CR0); + + timeout = jiffies + msecs_to_jiffies(timeout); + while(1){ + Status = ioread8(pci_bar+REG_SR0); + if(jiffies > timeout){ + info("Status %2.2X",Status); + info("Error Timeout"); + error = -ETIMEDOUT; + break; + } + + + if(Status & (1 << I2C_SR_BIT_MIF)){ + break; + } + + if(writing == 0 && (Status & (1<portid; + void __iomem *pci_bar = fpga_dev.data_base_addr; + +#ifdef DEBUG_KERN + printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X " + ,portid,addr,flags,rw,rw == 1 ? "READ ":"WRITE" + ,size, size == 0 ? "QUICK" : + size == 1 ? "BYTE" : + size == 2 ? "BYTE_DATA" : + size == 3 ? "WORD_DATA" : + size == 4 ? "PROC_CALL" : + size == 5 ? "BLOCK_DATA" : + size == 8 ? "I2C_BLOCK_DATA" : "ERROR" + ,cmd); +#endif + /* Map the size to what the chip understands */ + switch (size) { + case I2C_SMBUS_QUICK: + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + case I2C_SMBUS_WORD_DATA: + case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: + break; + default: + printk(KERN_INFO "Unsupported transaction %d\n", size); + error = -EOPNOTSUPP; + goto Done; + } + + unsigned int REG_FDR0; + unsigned int REG_CR0; + unsigned int REG_SR0; + unsigned int REG_DR0; + unsigned int REG_ID0; + + unsigned int master_bus = dev_data->pca9548.master_bus; + + if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){ + error = -ENXIO; + goto Done; + } + + REG_FDR0 = I2C_MASTER_FREQ_1 + (master_bus-1)*0x0100; + REG_CR0 = I2C_MASTER_CTRL_1 + (master_bus-1)*0x0100; + REG_SR0 = I2C_MASTER_STATUS_1 + (master_bus-1)*0x0100; + REG_DR0 = I2C_MASTER_DATA_1 + (master_bus-1)*0x0100; + REG_ID0 = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100; + + iowrite8(portid,pci_bar+REG_ID0); + + int cnt=0; + + ////[S][ADDR/R] + // Clear status register + iowrite8(0,pci_bar+REG_SR0); + iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA ,pci_bar+REG_CR0); + SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + + if(rw == I2C_SMBUS_READ && + (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)){ + // sent device address with Read mode + iowrite8(addr << 1 | 0x01,pci_bar+REG_DR0); + }else{ + // sent device address with Write mode + iowrite8(addr << 1 | 0x00,pci_bar+REG_DR0); + } + + + + info( "MS Start"); + + //// Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + + //// [CMD]{A} + if(size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA || + (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)){ + + // sent command code to data register + iowrite8(cmd,pci_bar+REG_DR0); + info( "MS Send CMD 0x%2.2X",cmd); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + switch(size){ + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + case I2C_SMBUS_I2C_BLOCK_DATA: + /* In block data modes keep number of byte in block[0] */ + cnt = data->block[0]; + break; + default: + cnt = 0; break; + } + + // [CNT] used only block data write + if(size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE){ + + iowrite8(cnt,pci_bar+REG_DR0); + info( "MS Send CNT 0x%2.2X",cnt); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + info( "get error %d",error); + goto Done; + } + } + + // [DATA]{A} + if( rw == I2C_SMBUS_WRITE && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + int bid=0; + info( "MS prepare to sent [%d bytes]",cnt); + if(size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA){ + bid=1; // block[0] is cnt; + cnt+=1; // offset from block[0] + } + for(;bidblock[bid],pci_bar+REG_DR0); + info( " Data > %2.2X",data->block[bid]); + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + goto Done; + } + } + + } + + // REPEATE START + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + info( "MS Repeated Start"); + + SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + iowrite8(1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MTX | + 1 << I2C_CR_BIT_MSTA | + 1 << I2C_CR_BIT_RSTA ,pci_bar+REG_CR0); + SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN); + + // sent Address with Read mode + iowrite8( addr<<1 | 0x1 ,pci_bar+REG_DR0); + + // Wait {A} + error = i2c_wait_ack(adapter,12,1); + if(error<0){ + goto Done; + } + + } + + if( rw == I2C_SMBUS_READ && ( + size == I2C_SMBUS_BYTE || + size == I2C_SMBUS_BYTE_DATA || + size == I2C_SMBUS_WORD_DATA || + size == I2C_SMBUS_BLOCK_DATA || + size == I2C_SMBUS_I2C_BLOCK_DATA + )){ + + switch(size){ + case I2C_SMBUS_BYTE: + case I2C_SMBUS_BYTE_DATA: + cnt = 1; break; + case I2C_SMBUS_WORD_DATA: + cnt = 2; break; + case I2C_SMBUS_BLOCK_DATA: + // will be changed after recived first data + cnt = 3; break; + case I2C_SMBUS_I2C_BLOCK_DATA: + cnt = data->block[0]; break; + default: + cnt = 0; break; + } + + int bid = 0; + info( "MS Receive"); + + //set to Receive mode + iowrite8(1 << I2C_CR_BIT_MEN | + 1 << I2C_CR_BIT_MIEN | + 1 << I2C_CR_BIT_MSTA , pci_bar+REG_CR0); + + for(bid=-1;bidblock[bid+1] = ioread8(pci_bar+REG_DR0); + }else { + data->block[bid] = ioread8(pci_bar+REG_DR0); + } + info( "DATA IN [%d] %2.2X",bid,data->block[bid]); + + if(size == I2C_SMBUS_BLOCK_DATA && bid == 0){ + cnt = data->block[0] + 1; + } + } + } + } + +Stop: + // [P] + SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MSTA); + info( "MS STOP"); + +Done: + iowrite8(1<pca9548.master_bus; + unsigned char switch_addr = dev_data->pca9548.switch_addr; + unsigned char channel = dev_data->pca9548.channel; + + // Acquire the master resource. + mutex_lock(&fpga_i2c_master_locks[master_bus-1]); + uint16_t prev_port = fpga_i2c_lasted_access_port[master_bus-1]; + + if(switch_addr != 0xFF){ + // Check lasted access switch address on a master + if((unsigned char)(prev_port >> 8) == switch_addr){ + // check if channel is the same + if((unsigned char)(prev_port & 0x00FF) != channel){ + // set new PCA9548 at switch_addr to current + error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL); + // update lasted port + fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel; + } + }else{ + // reset prev_port PCA9548 chip + error= smbus_access(adapter,(u16)(prev_port >> 8),flags,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL); + // set PCA9548 to current channel + error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL); + // update lasted port + fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel; + } + } + + // Do SMBus communication + error = smbus_access(adapter,addr,flags,rw,cmd,size,data); + // reset the channel + mutex_unlock(&fpga_i2c_master_locks[master_bus-1]); + return error; +} + + + +/** + * A callback function show available smbus functions. + */ +static u32 fpga_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA| + I2C_FUNC_SMBUS_I2C_BLOCK; +} + +static const struct i2c_algorithm seastone2_i2c_algorithm = { + .smbus_xfer = fpga_i2c_access, + .functionality = fpga_i2c_func, +}; + +/** + * Create virtual I2C bus adapter for switch devices + * @param pdev platform device pointer + * @param portid virtual i2c port id for switch device mapping + * @param bus_number_offset bus offset for virtual i2c adapter in system + * @return i2c adapter. + * + * When bus_number_offset is -1, created adapter with dynamic bus number. + * Otherwise create adapter at i2c bus = bus_number_offset + portid. + */ +static struct i2c_adapter * seastone2_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset) +{ + int error; + + struct i2c_adapter *new_adapter; + struct i2c_dev_data *new_data; + + new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL); + if (!new_adapter){ + printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name); + return NULL; + } + + new_adapter->owner = THIS_MODULE; + new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + new_adapter->algo = &seastone2_i2c_algorithm; + /* If the bus offset is -1, use dynamic bus number */ + if (bus_number_offset == -1){ + new_adapter->nr = -1; + }else{ + new_adapter->nr = bus_number_offset + portid; + } + + new_data = kzalloc(sizeof(*new_data), GFP_KERNEL); + if (!new_data){ + printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name); + kfree_sensitive(new_adapter); + return NULL; + } + + new_data->portid = portid; + new_data->pca9548.master_bus = fpga_i2c_bus_dev[portid].master_bus; + new_data->pca9548.switch_addr = fpga_i2c_bus_dev[portid].switch_addr; + new_data->pca9548.channel = fpga_i2c_bus_dev[portid].channel; + strscpy(new_data->pca9548.calling_name, fpga_i2c_bus_dev[portid].calling_name,sizeof(new_data->pca9548.calling_name)); + + snprintf(new_adapter->name, sizeof(new_adapter->name), + "SMBus I2C Adapter PortID: %s", new_data->pca9548.calling_name); + + void __iomem *i2c_freq_base_reg = fpga_dev.data_base_addr+I2C_MASTER_FREQ_1; + iowrite8(0x07,i2c_freq_base_reg+(new_data->pca9548.master_bus-1)*0x100); // 0x07 400kHz + i2c_set_adapdata(new_adapter,new_data); + error = i2c_add_numbered_adapter(new_adapter); + if(error < 0){ + printk(KERN_ALERT "Cannot add i2c adapter %s", new_data->pca9548.calling_name); + kfree_sensitive(new_adapter); + kfree_sensitive(new_data); + return NULL; + } + + return new_adapter; +}; + +// I/O resource need. +static struct resource seastone2_resources[] = { + { + .start = 0x10000000, + .end = 0x10001000, + .flags = IORESOURCE_MEM, + }, +}; + +static void seastone2_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device seastone2_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(seastone2_resources), + .resource = seastone2_resources, + .dev = { + .release = seastone2_dev_release, + } +}; + +/** + * Board info for QSFP/SFP+ eeprom. + * Note: Using sff8436 as I2C eeprom driver. + */ +static struct i2c_board_info sff8436_eeprom_info[] = { + { I2C_BOARD_INFO("optoe1", 0x50) }, + { I2C_BOARD_INFO("optoe2", 0x50) }, +}; + +static int seastone2_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int ret = 0; + int portid_count; + uint8_t cpld1_version, cpld2_version; + uint16_t prev_i2c_switch = 0; + + /* The device class need to be instantiated before this function called */ + BUG_ON(fpgafwclass == NULL); + + fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct seastone2_fpga_data), + GFP_KERNEL); + + if (!fpga_data) + return -ENOMEM; + + // Set default read address to VERSION + fpga_data->fpga_read_addr = fpga_dev.data_base_addr+FPGA_VERSION; + fpga_data->cpld1_read_addr = 0x00; + fpga_data->cpld2_read_addr = 0x00; + + mutex_init(&fpga_data->fpga_lock); + for(ret=I2C_MASTER_CH_1 ;ret <= I2C_MASTER_CH_TOTAL; ret++){ + mutex_init(&fpga_i2c_master_locks[ret-1]); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + kfree_sensitive(fpga_data); + return -1; + } + + fpga = kobject_create_and_add("FPGA", &pdev->dev.kobj); + if (!fpga){ + kfree_sensitive(fpga_data); + return -ENOMEM; + } + + ret = sysfs_create_group(fpga, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA sysfs attributes\n"); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + cpld1 = kobject_create_and_add("CPLD1", &pdev->dev.kobj); + if (!cpld1){ + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld1, &cpld1_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD1 sysfs attributes\n"); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + cpld2 = kobject_create_and_add("CPLD2", &pdev->dev.kobj); + if (!cpld2){ + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return -ENOMEM; + } + ret = sysfs_create_group(cpld2, &cpld2_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create CPLD2 sysfs attributes\n"); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + sff_dev = device_create(fpgafwclass, NULL, MKDEV(0,0), NULL, "sff_device"); + if (IS_ERR(sff_dev)){ + printk(KERN_ERR "Failed to create sff device\n"); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return PTR_ERR(sff_dev); + } + + ret = sysfs_create_group(&sff_dev->kobj, &sff_led_test_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create SFF attributes\n"); + device_destroy(fpgafwclass, MKDEV(0,0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + ret = sysfs_create_link(&pdev->dev.kobj,&sff_dev->kobj,"SFF"); + if (ret != 0){ + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + device_destroy(fpgafwclass, MKDEV(0,0)); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + kobject_put(cpld2); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + kobject_put(cpld1); + sysfs_remove_group(fpga, &fpga_attr_grp); + kobject_put(fpga); + kfree_sensitive(fpga_data); + return ret; + } + + for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){ + fpga_data->i2c_adapter[portid_count] = seastone2_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET); + } + + + /* Init SFF devices */ + for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count]; + if(i2c_adap){ + fpga_data->sff_devices[portid_count] = seastone2_sff_init(portid_count); + struct sff_device_data *sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + BUG_ON(sff_data == NULL); + if( sff_data->port_type == QSFP ){ + fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[0]); + }else{ + fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[1]); + } + sff_data = NULL; + sysfs_create_link(&fpga_data->sff_devices[portid_count]->kobj, + &fpga_data->sff_i2c_clients[portid_count]->dev.kobj, + "i2c"); + } + + } + + printk(KERN_INFO "Virtual I2C buses created\n"); + +#ifdef TEST_MODE + return 0; +#endif + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00, + I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld1_version); + fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00, + I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld2_version); + + printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version); + printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version); + + /* Init I2C buses that has PCA9548 switch device. */ + for(portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++){ + + struct i2c_dev_data *dev_data; + dev_data = i2c_get_adapdata(fpga_data->i2c_adapter[portid_count]); + unsigned char master_bus = dev_data->pca9548.master_bus; + unsigned char switch_addr = dev_data->pca9548.switch_addr; + unsigned char channel = dev_data->pca9548.channel; + + if(switch_addr != 0xFF){ + + if(prev_i2c_switch != ( (master_bus << 8) | switch_addr) ){ + // Found the bus with PCA9548, trying to clear all switch in it. + smbus_access(fpga_data->i2c_adapter[portid_count],switch_addr,0x00,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL); + prev_i2c_switch = ( master_bus << 8 ) | switch_addr; + } + } + } + return 0; +} + +static int seastone2_drv_remove(struct platform_device *pdev) +{ + int portid_count; + struct sff_device_data *rem_data; + + for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + sysfs_remove_link(&fpga_data->sff_devices[portid_count]->kobj,"i2c"); + i2c_unregister_device(fpga_data->sff_i2c_clients[portid_count]); + } + + for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){ + if(fpga_data->i2c_adapter[portid_count] != NULL){ + info(KERN_INFO "<%x>",fpga_data->i2c_adapter[portid_count]); + i2c_del_adapter(fpga_data->i2c_adapter[portid_count]); + } + } + + for (portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){ + if(fpga_data->sff_devices[portid_count] != NULL){ + rem_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]); + device_unregister(fpga_data->sff_devices[portid_count]); + put_device(fpga_data->sff_devices[portid_count]); + kfree(rem_data); + } + } + + sysfs_remove_group(fpga, &fpga_attr_grp); + sysfs_remove_group(cpld1, &cpld1_attr_grp); + sysfs_remove_group(cpld2, &cpld2_attr_grp); + sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp); + kobject_put(fpga); + kobject_put(cpld1); + kobject_put(cpld2); + device_destroy(fpgafwclass, MKDEV(0,0)); + devm_kfree(&pdev->dev, fpga_data); + return 0; +} + +#ifdef TEST_MODE + #define FPGA_PCI_BAR_NUM 2 +#else + #define FPGA_PCI_BAR_NUM 0 +#endif + + + +static const struct pci_device_id fpga_id_table[] = { + { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, + { PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) }, + {0, } +}; + +MODULE_DEVICE_TABLE(pci, fpga_id_table); + +static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + int err; + struct device *dev = &pdev->dev; + if ((err = pci_enable_device(pdev))) { + dev_err(dev, "pci_enable_device probe error %d for device %s\n", + err, pci_name(pdev)); + return err; + } + + if ((err = pci_request_regions(pdev, FPGA_PCI_NAME)) < 0) { + dev_err(dev, "pci_request_regions error %d\n", err); + goto pci_disable; + } + + /* bar0: data mmio region */ + fpga_dev.data_mmio_start = pci_resource_start(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_mmio_len = pci_resource_len(pdev, FPGA_PCI_BAR_NUM); + fpga_dev.data_base_addr = pci_iomap(pdev, FPGA_PCI_BAR_NUM, 0); + if (!fpga_dev.data_base_addr) { + dev_err(dev, "cannot iomap region of size %lu\n", + (unsigned long)fpga_dev.data_mmio_len); + goto pci_release; + } + dev_info(dev, "data_mmio iomap base = 0x%lx \n", + (unsigned long)fpga_dev.data_base_addr); + dev_info(dev, "data_mmio_start = 0x%lx data_mmio_len = %lu\n", + (unsigned long)fpga_dev.data_mmio_start, + (unsigned long)fpga_dev.data_mmio_len); + + printk(KERN_INFO "FPGA PCIe driver probe OK.\n"); + printk(KERN_INFO "FPGA ioremap registers of size %lu\n",(unsigned long)fpga_dev.data_mmio_len); + printk(KERN_INFO "FPGA Virtual BAR %d at %8.8lx - %8.8lx\n",FPGA_PCI_BAR_NUM,(unsigned long)fpga_dev.data_base_addr,(unsigned long)fpga_dev.data_base_addr+ (unsigned long)fpga_dev.data_mmio_len); + printk(KERN_INFO ""); + uint32_t buff = ioread32(fpga_dev.data_base_addr); + printk(KERN_INFO "FPGA VERSION : %8.8x\n", buff); + fpgafw_init(); + return 0; + +reg_release: + pci_iounmap(pdev, fpga_dev.data_base_addr); +pci_release: + pci_release_regions(pdev); +pci_disable: + pci_disable_device(pdev); + return -EBUSY; +} + +static void fpga_pci_remove(struct pci_dev *pdev) +{ + fpgafw_exit(); + pci_iounmap(pdev, fpga_dev.data_base_addr); + pci_release_regions(pdev); + pci_disable_device(pdev); + printk(KERN_INFO "FPGA PCIe driver remove OK.\n"); +}; + +static struct pci_driver pci_dev_ops = { + .name = FPGA_PCI_NAME, + .probe = fpga_pci_probe, + .remove = fpga_pci_remove, + .id_table = fpga_id_table, +}; + + +static struct platform_driver seastone2_drv = { + .probe = seastone2_drv_probe, + .remove = __exit_p(seastone2_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +enum{ + READREG, + WRITEREG +}; + +struct fpga_reg_data { + uint32_t addr; + uint32_t value; +}; + +static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg){ + int ret = 0; + struct fpga_reg_data data; + mutex_lock(&fpga_data->fpga_lock); + +#ifdef TEST_MODE + static uint32_t status_reg; +#endif + // Switch function to read and write. + switch (cmd){ + case READREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + data.value = ioread32(fpga_dev.data_base_addr+data.addr); + if (copy_to_user((void __user*)arg ,&data, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } +#ifdef TEST_MODE + if(data.addr == 0x1210){ + switch (status_reg){ + case 0x0000 : status_reg=0x8000; + break; + + case 0x8080 : status_reg=0x80C0; + break; + case 0x80C0 : status_reg=0x80F0; + break; + case 0x80F0 : status_reg=0x80F8; + break; + + } + iowrite32(status_reg,fpga_dev.data_base_addr+0x1210); + } +#endif + + + break; + case WRITEREG: + if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){ + mutex_unlock(&fpga_data->fpga_lock); + return -EFAULT; + } + iowrite32(data.value,fpga_dev.data_base_addr+data.addr); + +#ifdef TEST_MODE + if(data.addr == 0x1204){ + status_reg=0x8080; + iowrite32(status_reg,fpga_dev.data_base_addr+0x1210); + } +#endif + + break; + default: + mutex_unlock(&fpga_data->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga_data->fpga_lock); + return ret; +} + + +const struct file_operations fpgafw_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = fpgafw_unlocked_ioctl, +}; + + +static int fpgafw_init(void){ + printk(KERN_INFO "Initializing the switchboard driver\n"); + // Try to dynamically allocate a major number for the device -- more difficult but worth it + majorNumber = register_chrdev(0, DEVICE_NAME, &fpgafw_fops); + if (majorNumber<0){ + printk(KERN_ALERT "Failed to register a major number\n"); + return majorNumber; + } + printk(KERN_INFO "Device registered correctly with major number %d\n", majorNumber); + + // Register the device class + fpgafwclass = class_create(THIS_MODULE, CLASS_NAME); + if (IS_ERR(fpgafwclass)){ // Check for error and clean up if there is + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to register device class\n"); + return PTR_ERR(fpgafwclass); // Correct way to return an error on a pointer + } + printk(KERN_INFO "Device class registered correctly\n"); + + // Register the device driver + fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME); + if (IS_ERR(fpgafwdev)){ // Clean up if there is an error + class_destroy(fpgafwclass); // Repeated code but the alternative is goto statements + unregister_chrdev(majorNumber, DEVICE_NAME); + printk(KERN_ALERT "Failed to create the FW upgrade device node\n"); + return PTR_ERR(fpgafwdev); + } + printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized + return 0; +} + +static void fpgafw_exit(void){ + device_destroy(fpgafwclass, MKDEV(majorNumber, 0)); // remove the device + class_unregister(fpgafwclass); // unregister the device class + class_destroy(fpgafwclass); // remove the device class + unregister_chrdev(majorNumber, DEVICE_NAME); // unregister the major number + printk(KERN_INFO "Goodbye!\n"); +} + +int seastone2_init(void) +{ + int rc; + rc = pci_register_driver(&pci_dev_ops); + if (rc) + return rc; + if(fpga_dev.data_base_addr == NULL){ + printk(KERN_ALERT "FPGA PCIe device not found!\n"); + return -ENODEV; + } + platform_device_register(&seastone2_dev); + platform_driver_register(&seastone2_drv); + return 0; +} + +void seastone2_exit(void) +{ + platform_driver_unregister(&seastone2_drv); + platform_device_unregister(&seastone2_dev); + pci_unregister_driver(&pci_dev_ops); +} + +module_init(seastone2_init); +module_exit(seastone2_exit); + +MODULE_AUTHOR("Pradchaya P. pphuhcar@celestica.com"); +#ifdef SEASTONE2 +MODULE_DESCRIPTION("Celestica seastone2 platform driver"); +#else +MODULE_DESCRIPTION("Celestica questone2 platform driver"); +#endif +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py new file mode 100755 index 000000000000..b600d48e8fb0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py @@ -0,0 +1,161 @@ +#!/usr/bin/python +# +# Silverstone platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', 'Baseboard Left Temp'),\ + ('Switch_Temp_U31', 'ASIC External Front Temp'),\ + ('Switch_Temp_U30', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U29', 'Switchboard Right Temp'),\ + ('Switch_Temp_U28', 'Switchboard Left Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', 'IR3584 Chip Temp'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R') + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh new file mode 100755 index 000000000000..e04cac54fa98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py new file mode 100644 index 000000000000..1bac52a180ac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py @@ -0,0 +1,10 @@ +from setuptools import setup + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Celestica B3010 platforms', + + packages=['sonic_platform'], + package_dir={'sonic_platform': 'sonic_platform'}, +) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py new file mode 100644 index 000000000000..85157d319298 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py @@ -0,0 +1,464 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + import sys + import time + import os + import re + import shutil + from sonic_platform_base.chassis_base import ChassisBase + from .helper import APIHelper + from sonic_platform_base.sfp_base import SfpBase + +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_DRAWER = 4 +NUM_FAN_PER_DRAWER = 2 +NUM_PSU = 2 +NUM_THERMAL = 13 +NUM_SFP = 56 +NUM_COMPONENT = 9 + +SFP_PORT_START = 1 +SFP_PORT_END = 48 +QSFP_PORT_START = 49 +QSFP_PORT_END = 56 + +REBOOT_CAUSE_REG = "0xA106" +BASE_CPLD_PLATFORM = "sys_cpld" +BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM) +IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62" +IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + sfp_status_dict={} + + #led color status + SYSLED_COLOR_VAL_MAP = {\ + 'off': '0x33',\ + 'green': '0x10',\ + 'green_blink_1hz': '0x11',\ + 'amber': '0x20'\ + } + + SYSLED_VAL_COLOR_DESC_MAP = { + 0x33: 'off',\ + 0x10: 'green',\ + 0x11: 'green_blink_1hz',\ + 0x20: 'amber'\ + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self.fan_module_initialized = False + self._watchdog = None + self._airflow_direction = None + self.__initialize_eeprom() + + self.__initialize_thermals() + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_components() + + def __initialize_sfp(self): + if not self.sfp_module_initialized: + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + for fand_index in range(0, NUM_FAN_DRAWER): + drawer_fan_list=[] + for fan_index in range(0, NUM_FAN_PER_DRAWER): + fan = Fan(fand_index, fan_index) + self._fan_list.append(fan) + drawer_fan_list.append(fan) + fan_drawer = FanDrawer(fand_index, drawer_fan_list) + self._fan_drawer_list.append(fan_drawer) + self.fan_module_initialized = True + + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + return True + + def get_status_led(self): + color_str = 'N/A' + status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED) + if status: + color_val = int(output, 16) & 0x33 + color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str) + + return color_str + + def set_status_led(self, color): + status = False + + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val != None: + cmd = IPMI_SET_SYS_STATUS_LED.format(color_val) + status, res = self._api_helper.run_command(cmd) + + return status + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.get_register_value( + BASE_GETREG_PATH, REBOOT_CAUSE_REG) + + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x00" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + # When NON_HARDWARE is used and device is powercycled via IPMI + # reboot cause computed as Unknown, Hence using HARDWARE_OTHER + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet1, 1 for Ethernet2 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + self.__initialize_sfp() + + try: + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list) - 1)) + return sfp + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self.get_serial_number() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + ############################################################## + ###################### Event methods ######################### + ############################################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 48+1): + return (SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \ + SfpBase.SFP_PORT_TYPE_BIT_SFP) + elif index in range(49, 56+1): + return SfpBase.SFP_PORT_TYPE_BIT_QSFP28 + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py new file mode 100644 index 000000000000..185a62ef6a60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import re + +try: + #from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_PLATFORM = "sys_cpld" +SW_CPLD_PLATFORM = "questone2" +PLATFORM_SYSFS_PATH = "/sys/devices/platform/" + +FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BASE_GETREG_PATH = "{}/{}/getreg".format( + PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM) +SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" + +BASE_CPLD_VER_REG = "0xA100" +COME_CPLD_VER_REG = "0xA1E0" +SW_CPLD_VER_REG = "0x00" +FPGA_VER_REG = "0x00" + +UNKNOWN_VER = "N/A" +ONIE_VER_CMD = "cat /host/machine.conf" +SSD_VER_CMD = "smartctl -i /dev/sda" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic input/output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver), + ("CPLD SW1", "CPLD for port control SFP(1-24)", self.__get_cpld_ver), + ("CPLD SW2", "CPLD for port control SFP(25-48) QSFP(49-56)", self.__get_cpld_ver), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver), + ] + + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __get_bios_ver(self): + return self._api_helper.read_one_line_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self._api_helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return bmc_ver + else: + return UNKNOWN_VER + + def __get_fpga_ver(self): + version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG) + return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER + + def __get_cpld_ver(self): + cpld_api_param = { + 'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG), + 'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG), + 'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG), + 'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG), + } + api_param = cpld_api_param[self.name] + + cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1]) + return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.name == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py new file mode 100644 index 000000000000..ff08cd949891 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + for i2cbus in range(2): + path_prefix = "/sys/class/i2c-adapter/i2c-{0}/".format(i2cbus) + with open(path_prefix + "name") as fd: + if 'SMBus iSMT adapter at ' in fd.readline(): + self._eeprom_path = path_prefix + "{0}-0056/eeprom".format(i2cbus) + break + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py new file mode 100644 index 000000000000..6a1faa44ebbe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py @@ -0,0 +1,345 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_base import FanBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NOT_AVAILABLE = 'N/A' + +FAN_NAME_TEMPLATE = "{}Fan{}{}" +NUM_FAN_TRAYS = 4 +NUM_FANS_PER_TRAY = 2 +FAN_SPEED_TOLERANCE = 20 +MAX_RPM_FRONT=23000 +MAX_RPM_REAR=20500 +MAX_RPM_PSU=22600 +FAN_DIR_BASE = 0x41 +FAN_LED_BASE = 0x04 +FAN_FRU_BASE = 0x05 +FAN_STATUS_BASE = 0x00 +FAN_SID_BASE = 0x80 +PSU_FAN_SID_BASE = 0x8a +PSU_FRU_BASE = 0x03 + + +IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}" +IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'" +IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'" +IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'" +IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}" +IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + self._api_helper = APIHelper() + self.index = (self.fan_tray_index * 2) + self.fan_index + self.name = None + if self.is_psu_fan: + self.psu_index = psu_index + self.max_speed = MAX_RPM_PSU + self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index + self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index + else: + self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index + self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index + self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4) + if self.fan_tray_index > 1: + # Questone CPLD firmware is used and hence FAN 3 will be missing + # There are only 4 FAN trays in this platform + self._fan_dir_offset = self._fan_dir_offset + 4 + + self._fan_speed_offset = self._fan_dir_offset - 1 + self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index + + if fan_index % 2 == 0: + # Front FAN + self.is_front = True + self.max_speed = MAX_RPM_FRONT + self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY) + else: + # Rear FAN + self.is_front = False + self.max_speed = MAX_RPM_REAR + self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY) + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = NOT_AVAILABLE + + if self.is_psu_fan: + cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index) + status, output = self._api_helper.run_command(cmd) + if status and output: + model = output.split(':')[-1] + if len(model) > 0: + if model[-2:] == ' B': + direction = self.FAN_DIRECTION_INTAKE + else: + direction = self.FAN_DIRECTION_EXHAUST + else: + cmd = IPMI_FAN_DIR.format(self._fan_dir_offset) + status, output = self._api_helper.run_command(cmd) + if status: + dir_num = int(output, 16) & 0x0C + if dir_num == 0x0: + direction = self.FAN_DIRECTION_EXHAUST + elif dir_num == 0x8: + direction = self.FAN_DIRECTION_INTAKE + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 100.0 + + cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset) + status, output = self._api_helper.run_command(cmd) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target_speed = 0 + + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset) + status, output = self._api_helper.run_command(cmd) + if status: + fan_pwm = int(output, 16) + target_speed = round(fan_pwm / 255 * 100) + + return target_speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return FAN_SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + Notes: + pwm setting mode must set as Manual + manual: systemctl stop fanctrl.service + auto: systemctl start fanctrl.service + """ + + # FAN speed is controlled by BCM always + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + # There is no per Fan LED + return True + + def drawer_set_status_led(self, color): + status = False + + color_dict = {\ + self.STATUS_LED_COLOR_OFF: 0,\ + self.STATUS_LED_COLOR_AMBER: 1,\ + self.STATUS_LED_COLOR_RED: 1,\ + self.STATUS_LED_COLOR_GREEN: 2\ + } + + if not self.is_psu_fan: + cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0)) + status, _ = self._api_helper.run_command(cmd) + + return status + + + def get_status_led(self): + """ + Gets the state of the fan status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + + Note: + Output + STATUS_LED_COLOR_GREEN = "green" + STATUS_LED_COLOR_AMBER = "amber" + STATUS_LED_COLOR_RED = "red" + STATUS_LED_COLOR_OFF = "off" + + Input + 0x1: green + 0x2: red + 0x3: off + """ + status = NOT_AVAILABLE + color_dict = {\ + 0: self.STATUS_LED_COLOR_OFF,\ + 1: self.STATUS_LED_COLOR_AMBER,\ + 2: self.STATUS_LED_COLOR_GREEN\ + } + + if not self.is_psu_fan: + cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset) + status, output = self._api_helper.run_command(cmd) + if status: + color = int(output, 16) + status = color_dict.get(color, status) + + return status + + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + + presence = False + + cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset) + status, output = self._api_helper.run_command(cmd) + if status and output == "00": + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_MODEL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_speed() > 0 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + if not self.is_psu_fan: + return True + + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..14ea5c900506 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py @@ -0,0 +1,82 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + 1 + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].drawer_set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return 'Drawer {}'.format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py new file mode 100644 index 000000000000..7bcbd70a0a7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python + +import os +import struct +import subprocess +from mmap import * +from sonic_py_common.device_info import get_platform_and_hwsku + +SCALE = 16 +BIN_BITS = 8 +EMPTY_STRING = "" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def get_register_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + return None + else: + return data + + def hex_to_bin(self, ini_string): + return bin(int(ini_string, SCALE)).zfill(BIN_BITS) + + def is_host(self): + rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD) + return (rv == 0) + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.read_txt_file(file_path): + return dirpath + return None + + def write_file(self, file_path, data): + try: + with open(file_path, 'w') as fd: + fd.write(str(data)) + return True + except Exception: + pass + return False + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key)) + + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def fru_decode_product_serial(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + start_product_module_number = start_product_name + start_product_name_length +1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F + start_product_version = start_product_module_number + start_product_module_number_length +1 + start_product_version_length = ord(data[start_product_version]) & 0x0F + start_product_serial_number = start_product_version + start_product_version_length +1 + start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F + return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1] + return "N/A" + + def fru_decode_product_model(self, data): + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_lang_code = start_product_info + 1 + start_product_manu_name = start_product_lang_code + 1 + start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F + start_product_name = start_product_manu_name + start_product_manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x1F + start_product_module_number = start_product_name + start_product_name_length + 1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F + return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1] + return "N/A" + + def fru_decode_product_name(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + return data[start_product_name+1: start_product_name+start_product_name_length+1] + + return "N/A" + + def read_eeprom_sysfs(self,sys_path,sysfs_file): + sysfs_path = os.path.join(sys_path, sysfs_file) + try: + with open(sysfs_path, mode='rb', buffering=0) as fd: + data = fd.read(256) + return data + except Exception: + pass + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py new file mode 100644 index 000000000000..2f7931d42b01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py new file mode 100644 index 000000000000..c9ba822ac0da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py new file mode 100644 index 000000000000..8c36c61e1f98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py @@ -0,0 +1,265 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Product Name" +IPMI_FRU_SERIAL_KEY = "Product Serial" + +MAX_PSU_POWER = 550 #Watts +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x0d",\ + "VOUT": "0x0f",\ + "COUT": "0x10",\ + "POUT": "0x11",\ + "STATUS": "0x72",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x17",\ + "VOUT": "0x19",\ + "COUT": "0x1a",\ + "POUT": "0x1b",\ + "STATUS": "0x73",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 4 +FRU_MODEL = 1 + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx10^-1 + psu_voltage = int(value, 16) / 10.0 + + return psu_voltage + + def get_voltage_high_threshold(self): + return 12.6 + + def get_voltage_low_threshold(self): + return 11.4 + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx3x10^-1 + psu_current = int(value, 16) * 3 / 10.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx5 + psu_power = int(value, 16) * 5 + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return "blinking green" + else: + return "N/A" + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + + return MAX_PSU_POWER + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split(':')[-1] + model = fru_pn_list.strip() + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_serial = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_serial.split(':')[-1] + serial = fru_sr_list.strip() + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py new file mode 100644 index 000000000000..66950af04200 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py @@ -0,0 +1,197 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +QSFP_PORT_START = 49 +QSFP_PORT_END = 56 +SFP_PORT_START = 1 +SFP_PORT_END = 48 + +PORT_INFO_PATH = '/sys/class/questone2_fpga' +SFP_I2C_START = 2 + + +class Sfp(SfpOptoeBase): + """Platform-specific Sfp class""" + + # Path to QSFP sysfs + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + + def __init__(self, sfp_index): + SfpOptoeBase.__init__(self) + # Init index + self.index = sfp_index + 1 + self.sfp_type, self.port_name = self.__get_sfp_info() + self._api_helper = APIHelper() + self.platform = self._api_helper.platform + self.hwsku = self._api_helper.hwsku + + # Init eeprom path + self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index) + + def __get_sfp_info(self): + port_name = "Unknown" + sfp_type = "Unknown" + + if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END: + sfp_type = QSFP_TYPE + port_name = sfp_type + str(self.index - QSFP_PORT_START + 1) + elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END: + sfp_type = SFP_TYPE + port_name = sfp_type + str(self.index) + return sfp_type, port_name + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform]) + hwsku_path = "/".join([platform_path, self.hwsku] + ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_eeprom_path(self): + return self.eeprom_path + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"])) + + return (int(reg_status) == 0) + + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + if self.sfp_type != QSFP_TYPE: + return False + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w") + except IOError as e: + return False + + if lpmode: + value=1 + else: + value=0 + reg_file.write(hex(value)) + reg_file.close() + + return True + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) + + return (int(reg_status) == 1) + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.physical_to_logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + # Get path for access port presence status + sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs" + reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) + + content = self._api_helper.read_one_line_file(reg_path) + reg_value = int(content) + + return (reg_value == 0) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py similarity index 50% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py rename to platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py index 9ecf12218d50..d3d96b1e3e73 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py @@ -19,9 +19,8 @@ IPMI_SENSOR_NETFN = "0x04" IPMI_SS_READ_CMD = "0x2D {}" IPMI_SS_THRESHOLD_CMD = "0x27 {}" -DEFUALT_LOWER_TRESHOLD = 0.0 HIGH_TRESHOLD_SET_KEY = "unc" - +DEFAULT_VAL = 'N/A' class Thermal(ThermalBase): """Platform-specific Thermal class""" @@ -30,26 +29,30 @@ def __init__(self, thermal_index): ThermalBase.__init__(self) self._api_helper = APIHelper() self.index = thermal_index - self.THERMAL_LIST = [ - ('TEMP_FAN_U52', 'Fan Tray Middle Temperature Sensor', '0x00'), - ('TEMP_FAN_U17', 'Fan Tray Right Temperature Sensor', '0x01'), - ('TEMP_SW_U52', 'Switchboard Left Inlet Temperature Sensor', '0x02'), - ('TEMP_SW_U16', 'Switchboard Right Inlet Temperature Sensor', '0x03'), - ('TEMP_BB_U3', 'Baseboard Temperature Sensor', '0x04'), - ('TEMP_CPU', 'CPU Internal Temperature Sensor', '0x05'), - ('TEMP_SW_Internal', 'ASIC Internal Temperature Sensor', '0x61'), - ('SW_U04_Temp', 'IR3595 Chip Left Temperature Sensor', '0x4F'), - ('SW_U14_Temp', 'IR3595 Chip Right Temperature Sensor', '0x56'), - ('SW_U4403_Temp', 'IR3584 Chip Temperature Sensor', '0x5D'), + thermal_list = [\ + ('Base_Temp_U5', '0x01', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', '0x02', 'Baseboard Left Temp'),\ + ('Switch_Temp_U31', '0x03', 'ASIC External Front Temp'),\ + ('Switch_Temp_U30', '0x04', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U29', '0x05', 'Switchboard Right Temp'),\ + ('Switch_Temp_U28', '0x06', 'Switchboard Left Temp'),\ + ('CPU_Temp', '0x07', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\ + ('PSUL_Temp1', '0x0D', 'PSU 1 Ambient Temp'),\ + ('PSUL_Temp2', '0x0E', 'PSU 1 Hotspot Temp'),\ + ('PSUR_Temp1', '0x17', 'PSU 2 Ambient Temp'),\ + ('PSUR_Temp2', '0x18', 'PSU 2 Hotspot Temp'),\ ] - self.sensor_id = self.THERMAL_LIST[self.index][0] - self.sensor_des = self.THERMAL_LIST[self.index][1] - self.sensor_reading_addr = self.THERMAL_LIST[self.index][2] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] - def __set_threshold(self, key, value): - print('{} {}'.format(key, value)) + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp - def get_temperature(self): + def get_temperature(self, skip_record=False): """ Retrieves current temperature reading from thermal Returns: @@ -62,7 +65,20 @@ def get_temperature(self): if status and len(raw_ss_read.split()) > 0: ss_read = raw_ss_read.split()[0] temperature = float(int(ss_read, 16)) - return temperature + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL def get_high_threshold(self): """ @@ -77,7 +93,10 @@ def get_high_threshold(self): if status and len(raw_up_thres_read.split()) > 6: ss_read = raw_up_thres_read.split()[4] high_threshold = float(int(ss_read, 16)) - return high_threshold + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL def get_low_threshold(self): """ @@ -86,7 +105,7 @@ def get_low_threshold(self): A float number, the low threshold temperature of thermal in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return DEFUALT_LOWER_TRESHOLD + return DEFAULT_VAL def set_high_threshold(self, temperature): """ @@ -97,7 +116,8 @@ def set_high_threshold(self, temperature): Returns: A boolean, True if threshold is set successfully, False if not """ - status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) return status def set_low_threshold(self, temperature): @@ -111,37 +131,61 @@ def set_low_threshold(self, temperature): """ return False - def get_name(self): + def get_high_critical_threshold(self): """ - Retrieves the name of the thermal device - Returns: - string: The name of the thermal device + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return self.THERMAL_LIST[self.index][0] + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL - def get_presence(self): + def get_minimum_recorded(self): """ - Retrieves the presence of the device + Retrieves the minimum recorded temperature of thermal Returns: - bool: True if device is present, False if not + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - return True if self.get_temperature() > 0 else False + return self.minimum_thermal - def get_model(self): + def get_maximum_recorded(self): """ - Retrieves the model number (or part number) of the device + Retrieves the maximum recorded temperature of thermal Returns: - string: Model/part number of device + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device """ - return self.sensor_des + return self.sensor_name - def get_serial(self): + def get_presence(self): """ - Retrieves the serial number of the device + Retrieves the presence of the device Returns: - string: Serial number of device + bool: True if device is present, False if not """ - return "Unknown" + return True if self.get_temperature() > 0 else False def get_status(self): """ @@ -150,3 +194,11 @@ def get_status(self): A boolean value, True if device is operating properly, False if not """ return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py new file mode 100644 index 000000000000..562b2177b442 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py @@ -0,0 +1,264 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Qeastone2 +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import subprocess + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +I2C_WDT_BUS_ID=60 +I2C_WDT_DEV_ID=0x0d +I2C_WDT_RESET_SRC_REG=0x06 +I2C_WDT_CTRL_REG=0x81 +I2C_WDT_SET_TIMER_L_REG=0x82 +I2C_WDT_SET_TIMER_M_REG=0x83 +I2C_WDT_SET_TIMER_H_REG=0x84 +I2C_WDT_ARM_REG=0x85 +I2C_WDT_TIMER_L_REG=0x86 +I2C_WDT_TIMER_M_REG=0x87 +I2C_WDT_TIMER_H_REG=0x88 + +WDT_ENABLE=0x1 +WDT_DISABLE=0x0 +WDT_KEEPALIVE=0x1 +WDT_COMMON_ERROR=-1 +DEFAULT_TIMEOUT=180 + +class Watchdog(WatchdogBase): + + def __init__(self): + # Set default value + self.armed = True if self._active() else False + self.timeout = self._gettimeout() + #self._disable() + + def _i2cget_cmd(self, reg): + cmd = "i2cget -y -f {} {} {} b".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID, + reg) + return cmd + + def _i2cset_cmd(self, reg, val): + cmd = "i2cset -y -f {} {} {} {}".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID, + reg, val) + return cmd + + def _getstatusoutput(self, cmd): + ret,data = subprocess.getstatusoutput(cmd) + status = 0 + if ret != 0: + status = ret + + return status, data + + def _active(self): + """ + WDT is active or not + """ + status, data = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_CTRL_REG)) + if status: + pass + return True if data == "0x01" else False + + def _enable(self): + """ + Turn on the watchdog timer + """ + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG, + WDT_ENABLE)) + if status: + pass + + def _disable(self): + """ + Turn off the watchdog timer + """ + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG, + WDT_DISABLE)) + if status: + pass + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + self._settimeleft(0) + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_ARM_REG, + WDT_KEEPALIVE)) + if status: + pass + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_L_REG, + ms_low_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_M_REG, + ms_media_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_H_REG, + ms_high_byte)) + if status: + pass + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_L_REG)) + if status: + pass + status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_M_REG)) + if status: + pass + status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_H_REG)) + if status: + pass + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + def _settimeleft(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_L_REG, + ms_low_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_M_REG, + ms_media_byte)) + if status: + pass + status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_H_REG, + ms_high_byte)) + if status: + pass + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_L_REG)) + if status: + pass + status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_M_REG)) + if status: + pass + status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_H_REG)) + if status: + pass + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return (self.timeout - seconds) if (self.timeout > seconds) else -1 + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + self._settimeout(seconds) + self._keepalive() + self._enable() + self.armed = True + ret = self.timeout + except IOError as e: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service new file mode 100644 index 000000000000..c6ad69112edb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service @@ -0,0 +1,13 @@ +[Unit] +Description=Celestica questone2 platform modules +After=local-fs.target +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=-/etc/init.d/platform-modules-questone2 start +ExecStop=-/etc/init.d/platform-modules-questone2 stop +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c index 07ab42c21686..593a8655aacb 100644 --- a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c @@ -375,4 +375,4 @@ module_exit(baseboard_cpld_exit); MODULE_AUTHOR("Pradchaya Phucharoen "); MODULE_DESCRIPTION("Celestica Seastone2 Baseboard CPLD Driver"); -MODULE_LICENSE("GPL"); \ No newline at end of file +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py new file mode 100755 index 000000000000..559a4315a30f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py @@ -0,0 +1,161 @@ +#!/usr/bin/python +# +# Silverstone platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 4 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('Base_Temp_U5', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', 'Baseboard Left Temp'),\ + ('Switch_Temp_U1', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U28', 'Switchboard Right Temp'),\ + ('Switch_Temp_U29', 'Switchboard Left Temp'),\ + ('CPU_Temp', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', 'IR3584 Chip Temp'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R') + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh new file mode 100755 index 000000000000..e04cac54fa98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py new file mode 100644 index 000000000000..8d253086b26d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py @@ -0,0 +1,31 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Wirut Getbamrung', + maintainer_email='wgetbumr@celestica.com', + packages=[ + 'sonic_platform', + ], + package_dir={ + 'sonic_platform': 'sonic_platform'}, + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py new file mode 100644 index 000000000000..56664cc6e8f2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py @@ -0,0 +1,457 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + import sys + import time + import os + import re + import shutil + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sfp_base import SfpBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_DRAWER = 4 +NUM_FAN_PER_DRAWER = 2 +NUM_PSU = 2 +NUM_THERMAL = 13 +NUM_SFP = 33 +NUM_COMPONENT = 9 + +REBOOT_CAUSE_REG = "0xA106" +BASE_CPLD_PLATFORM = "baseboard" +BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM) +IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62" +IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + sfp_status_dict={} + + #led color status + SYSLED_COLOR_VAL_MAP = {\ + 'off': '0x33',\ + 'green': '0x10',\ + 'green_blink_1hz': '0x11',\ + 'amber': '0x20'\ + } + + SYSLED_VAL_COLOR_DESC_MAP = { + 0x33: 'off',\ + 0x10: 'green',\ + 0x11: 'green_blink_1hz',\ + 0x20: 'amber'\ + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self.fan_module_initialized = False + self._watchdog = None + self._airflow_direction = None + self.__initialize_eeprom() + + self.__initialize_thermals() + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_components() + + def __initialize_sfp(self): + if not self.sfp_module_initialized: + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + sfp = Sfp(index) + self._sfp_list.append(sfp) + present = sfp.get_presence() + self.sfp_status_dict[sfp.index] = '1' if present else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + for fand_index in range(0, NUM_FAN_DRAWER): + drawer_fan_list=[] + for fan_index in range(0, NUM_FAN_PER_DRAWER): + fan = Fan(fand_index, fan_index) + self._fan_list.append(fan) + drawer_fan_list.append(fan) + fan_drawer = FanDrawer(fand_index, drawer_fan_list) + self._fan_drawer_list.append(fan_drawer) + self.fan_module_initialized = True + + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + return True + + def get_status_led(self): + color_str = 'N/A' + status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED) + if status: + color_val = int(output, 16) & 0x33 + color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str) + + return color_str + + def set_status_led(self, color): + status = False + + color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None) + if color_val != None: + cmd = IPMI_SET_SYS_STATUS_LED.format(color_val) + status, res = self._api_helper.run_command(cmd) + + return status + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + hw_reboot_cause = self._api_helper.get_register_value( + BASE_GETREG_PATH, REBOOT_CAUSE_REG) + + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + + if hw_reboot_cause == "0x99": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC + description = 'ASIC Overload Reboot' + elif hw_reboot_cause == "0x88": + reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU + description = 'CPU Overload Reboot' + elif hw_reboot_cause == "0x77": + reboot_cause = self.REBOOT_CAUSE_WATCHDOG + description = 'Hardware Watchdog Reset' + elif hw_reboot_cause == "0x55": + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'CPU Cold Reset' + elif hw_reboot_cause == "0x44": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'CPU Warm Reset' + elif hw_reboot_cause == "0x33": + # When NON_HARDWARE is used and device is powercycled via IPMI + # reboot cause computed as Unknown, Hence using HARDWARE_OTHER + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Soft-Set Cold Reset' + elif hw_reboot_cause == "0x22": + reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE + description = 'Soft-Set Warm Reset' + elif hw_reboot_cause == "0x11": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power On Reset' + elif hw_reboot_cause == "0x00": + reboot_cause = self.REBOOT_CAUSE_POWER_LOSS + description = 'Power Cycle Reset' + else: + reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER + description = 'Hardware reason' + + return (reboot_cause, description) + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet1, 1 for Ethernet2 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + self.__initialize_sfp() + + try: + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("SFP index {} out of range (0-{})\n".format( + index, len(self._sfp_list) - 1)) + return sfp + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self.get_serial_number() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + ############################################################## + ###################### Event methods ######################### + ############################################################## + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 32+1): + return SfpBase.SFP_PORT_TYPE_BIT_QSFP28 + elif index == 33: + return SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py new file mode 100644 index 000000000000..1f82f87e6731 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import re + +try: + #from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_PLATFORM = "baseboard" +SW_CPLD_PLATFORM = "switchboard" +PLATFORM_SYSFS_PATH = "/sys/devices/platform/" + +FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BASE_GETREG_PATH = "{}/{}/getreg".format( + PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM) +SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format( + PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM) +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" + +BASE_CPLD_VER_REG = "0xA100" +COME_CPLD_VER_REG = "0xA1E0" +SW_CPLD_VER_REG = "0x00" +FPGA_VER_REG = "0x00" + +UNKNOWN_VER = "N/A" +ONIE_VER_CMD = "cat /host/machine.conf" +SSD_VER_CMD = "smartctl -i /dev/sda" + +class Component(): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic input/output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver), + ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver), + ("CPLD SW1", "CPLD for port control QSFP(1-16)", self.__get_cpld_ver), + ("CPLD SW2", "CPLD for port control QSFP(17-32) SFP(33)", self.__get_cpld_ver), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver), + ] + + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __get_bios_ver(self): + return self._api_helper.read_one_line_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + cmd="ipmitool mc info | grep 'Firmware Revision'" + status, raw_ver=self._api_helper.run_command(cmd) + if status: + bmc_ver=raw_ver.split(':')[-1].strip() + return bmc_ver + else: + return UNKNOWN_VER + + def __get_fpga_ver(self): + version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG) + return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER + + def __get_cpld_ver(self): + cpld_api_param = { + 'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG), + 'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG), + 'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG), + 'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG), + } + api_param = cpld_api_param[self.name] + + cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1]) + return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.name == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py new file mode 100644 index 000000000000..32afdc2751d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + for i2cbus in range(2): + path_prefix = "/sys/class/i2c-adapter/i2c-{}/".format(i2cbus) + with open(path_prefix + "name") as fd: + if 'SMBus iSMT adapter at ' in fd.readline(): + self._eeprom_path = path_prefix + "{}-0056/eeprom".format(i2cbus) + break + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py new file mode 100644 index 000000000000..2b577ac40287 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py @@ -0,0 +1,345 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_base import FanBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NOT_AVAILABLE = 'N/A' + +FAN_NAME_TEMPLATE = "{}Fan{}{}" +NUM_FAN_TRAYS = 4 +NUM_FANS_PER_TRAY = 2 +FAN_SPEED_TOLERANCE = 20 +MAX_RPM_FRONT=23000 +MAX_RPM_REAR=20500 +MAX_RPM_PSU=22600 +FAN_DIR_BASE = 0x41 +FAN_LED_BASE = 0x04 +FAN_FRU_BASE = 0x05 +FAN_STATUS_BASE = 0x00 +FAN_SID_BASE = 0x80 +PSU_FAN_SID_BASE = 0x8a +PSU_FRU_BASE = 0x03 + + +IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}" +IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}" +IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'" +IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'" +IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'" +IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}" +IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}" +IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}" + +class Fan(FanBase): + """Platform-specific Fan class""" + + def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): + self.fan_index = fan_index + self.fan_tray_index = fan_tray_index + self.is_psu_fan = is_psu_fan + self._api_helper = APIHelper() + self.index = (self.fan_tray_index * 2) + self.fan_index + self.name = None + if self.is_psu_fan: + self.psu_index = psu_index + self.max_speed = MAX_RPM_PSU + self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index + self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index + else: + self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index + self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index + self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4) + if self.fan_tray_index > 1: + # Questone CPLD firmware is used and hence FAN 3 will be missing + # There are only 4 FAN trays in this platform + self._fan_dir_offset = self._fan_dir_offset + 4 + + self._fan_speed_offset = self._fan_dir_offset - 1 + self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index + + if fan_index % 2 == 0: + # Front FAN + self.is_front = True + self.max_speed = MAX_RPM_FRONT + self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY) + else: + # Rear FAN + self.is_front = False + self.max_speed = MAX_RPM_REAR + self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY) + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = NOT_AVAILABLE + + if self.is_psu_fan: + cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index) + status, output = self._api_helper.run_command(cmd) + if status and output: + model = output.split(':')[-1] + if len(model) > 0: + if model[-2:] == ' B': + direction = self.FAN_DIRECTION_INTAKE + else: + direction = self.FAN_DIRECTION_EXHAUST + else: + cmd = IPMI_FAN_DIR.format(self._fan_dir_offset) + status, output = self._api_helper.run_command(cmd) + if status: + dir_num = int(output, 16) & 0x0C + if dir_num == 0x0: + direction = self.FAN_DIRECTION_EXHAUST + elif dir_num == 0x8: + direction = self.FAN_DIRECTION_INTAKE + + return direction + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed = 0 + + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 100.0 + + cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset) + status, output = self._api_helper.run_command(cmd) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) + + return speed + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + + Note: + speed_pc = pwm_target/255*100 + + 0 : when PWM mode is use + pwm : when pwm mode is not use + """ + target_speed = 0 + + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset) + status, output = self._api_helper.run_command(cmd) + if status: + fan_pwm = int(output, 16) + target_speed = round(fan_pwm / 255 * 100) + + return target_speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return FAN_SPEED_TOLERANCE + + def set_speed(self, speed): + """ + Sets the fan speed + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + Returns: + A boolean, True if speed is set successfully, False if not + Notes: + pwm setting mode must set as Manual + manual: systemctl stop fanctrl.service + auto: systemctl start fanctrl.service + """ + + # FAN speed is controlled by BCM always + return False + + def set_status_led(self, color): + """ + Sets the state of the fan module status LED + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + # There is no per Fan LED + return True + + def drawer_set_status_led(self, color): + status = False + + color_dict = {\ + self.STATUS_LED_COLOR_OFF: 0,\ + self.STATUS_LED_COLOR_AMBER: 1,\ + self.STATUS_LED_COLOR_RED: 1,\ + self.STATUS_LED_COLOR_GREEN: 2\ + } + + if not self.is_psu_fan: + cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0)) + status, _ = self._api_helper.run_command(cmd) + + return status + + + def get_status_led(self): + """ + Gets the state of the fan status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + + Note: + Output + STATUS_LED_COLOR_GREEN = "green" + STATUS_LED_COLOR_AMBER = "amber" + STATUS_LED_COLOR_RED = "red" + STATUS_LED_COLOR_OFF = "off" + + Input + 0x1: green + 0x2: red + 0x3: off + """ + status = NOT_AVAILABLE + color_dict = {\ + 0: self.STATUS_LED_COLOR_OFF,\ + 1: self.STATUS_LED_COLOR_AMBER,\ + 2: self.STATUS_LED_COLOR_GREEN\ + } + + if not self.is_psu_fan: + cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset) + status, output = self._api_helper.run_command(cmd) + if status: + color = int(output, 16) + status = color_dict.get(color, status) + + return status + + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + + presence = False + + cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset) + status, output = self._api_helper.run_command(cmd) + if status and output == "00": + presence = True + + return presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_MODEL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = NOT_AVAILABLE + + if not self.is_psu_fan: + cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset) + status, output = self._api_helper.run_command(cmd) + if status and output: + return output.split()[-1] + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and self.get_speed() > 0 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + if not self.is_psu_fan: + return True + + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..aea952d5822a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the fan status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(FanDrawerBase): + + def __init__(self, index, fan_list): + FanDrawerBase.__init__(self) + + self._fan_list = fan_list + self._index = index + 1 + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].drawer_set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return 'Drawer {}'.format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if FAN is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py new file mode 100644 index 000000000000..7bcbd70a0a7c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python + +import os +import struct +import subprocess +from mmap import * +from sonic_py_common.device_info import get_platform_and_hwsku + +SCALE = 16 +BIN_BITS = 8 +EMPTY_STRING = "" +HOST_CHK_CMD = "docker > /dev/null 2>&1" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def get_register_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + return None + else: + return data + + def hex_to_bin(self, ini_string): + return bin(int(ini_string, SCALE)).zfill(BIN_BITS) + + def is_host(self): + rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD) + return (rv == 0) + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + def run_command(self, cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def search_file_by_contain(self, directory, search_str, file_start): + for dirpath, dirnames, files in os.walk(directory): + for name in files: + file_path = os.path.join(dirpath, name) + if name.startswith(file_start) and search_str in self.read_txt_file(file_path): + return dirpath + return None + + def write_file(self, file_path, data): + try: + with open(file_path, 'w') as fd: + fd.write(str(data)) + return True + except Exception: + pass + return False + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key)) + + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def fru_decode_product_serial(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + start_product_module_number = start_product_name + start_product_name_length +1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F + start_product_version = start_product_module_number + start_product_module_number_length +1 + start_product_version_length = ord(data[start_product_version]) & 0x0F + start_product_serial_number = start_product_version + start_product_version_length +1 + start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F + return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1] + return "N/A" + + def fru_decode_product_model(self, data): + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_lang_code = start_product_info + 1 + start_product_manu_name = start_product_lang_code + 1 + start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F + start_product_name = start_product_manu_name + start_product_manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x1F + start_product_module_number = start_product_name + start_product_name_length + 1 + start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F + return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1] + return "N/A" + + def fru_decode_product_name(self, data): + + if data and data[4] != 00: + start_product_info = ord(data[4]) * 8 + start_format_version = start_product_info + start_product_info = start_format_version + 1 + start_product_Lang_code = start_product_info + 1 + start_product_Manu_name = start_product_Lang_code + 1 + start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F + start_product_name = start_product_Manu_name + start_product_Manu_name_length + 1 + start_product_name_length = ord(data[start_product_name]) & 0x0F + return data[start_product_name+1: start_product_name+start_product_name_length+1] + + return "N/A" + + def read_eeprom_sysfs(self,sys_path,sysfs_file): + sysfs_path = os.path.join(sys_path, sysfs_file) + try: + with open(sysfs_path, mode='rb', buffering=0) as fd: + data = fd.read(256) + return data + except Exception: + pass + return None diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py new file mode 100644 index 000000000000..2f7931d42b01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py new file mode 100644 index 000000000000..c9ba822ac0da --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Platform(PlatformBase): + """Platform-specific Platform class""" + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() + diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py new file mode 100644 index 000000000000..362463883ad9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py @@ -0,0 +1,273 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Product Name" +IPMI_FRU_SERIAL_KEY = "Product Serial" + +MAX_PSU_POWER = 550 #Watts +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x0d",\ + "VOUT": "0x0f",\ + "COUT": "0x10",\ + "POUT": "0x11",\ + "STATUS": "0x72",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x17",\ + "VOUT": "0x19",\ + "COUT": "0x1a",\ + "POUT": "0x1b",\ + "STATUS": "0x73",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 4 +FRU_MODEL = 1 + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx10^-1 + psu_voltage = int(value, 16) / 10.0 + + return psu_voltage + + def get_voltage_high_threshold(self): + return 12.6 + + def get_voltage_low_threshold(self): + return 11.4 + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx3x10^-1 + psu_current = int(value, 16) * 3 / 10.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx5 + psu_power = int(value, 16) * 5 + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if self.get_presence(): + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return "blinking green" + else: + return "N/A" + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + + return MAX_PSU_POWER + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split(':')[-1] + model = fru_pn_list.strip() + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_serial = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_serial.split(':')[-1] + serial = fru_sr_list.strip() + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_direction(self): + """ + Return the airflow direction of PSU FAN + Returns: + string: 'intake' or 'exhaust' + """ + self diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py new file mode 100644 index 000000000000..9de0aea6277f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Sfp contains an implementation of SONiC Platform Base API and +# provides the sfp device status which are available in the platform +# +############################################################################# +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +SFP_TYPE = "SFP" +QSFP_TYPE = "QSFP" + +QSFP_PORT_START = 1 +QSFP_PORT_END = 32 +SFP_PORT_START = 33 +SFP_PORT_END = 33 + +PORT_INFO_PATH = '/sys/class/seastone2_fpga' +SFP_I2C_START = 2 + + +class Sfp(SfpOptoeBase): + """Platform-specific Sfp class""" + + # Path to QSFP sysfs + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + + def __init__(self, sfp_index): + SfpOptoeBase.__init__(self) + # Init index + self.index = sfp_index + 1 + self.sfp_type, self.port_name = self.__get_sfp_info() + self._api_helper = APIHelper() + self.platform = self._api_helper.platform + self.hwsku = self._api_helper.hwsku + + # Init eeprom path + self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index) + + def __get_sfp_info(self): + port_name = "Unknown" + sfp_type = "Unknown" + + if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END: + sfp_type = QSFP_TYPE + port_name = sfp_type + str(self.index) + elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END: + sfp_type = SFP_TYPE + port_name = sfp_type + str(self.index - SFP_PORT_START + 1) + + return sfp_type, port_name + + def __get_path_to_port_config_file(self): + platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform]) + hwsku_path = "/".join([platform_path, self.hwsku] + ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH + return "/".join([hwsku_path, "port_config.ini"]) + + def get_eeprom_path(self): + return self.eeprom_path + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"])) + + return (int(reg_status) == 0) + + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + if self.sfp_type != QSFP_TYPE: + return False + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(0)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w") + except IOError as e: + #print("Error: unable to open file: %s" % str(e)) + return False + + reg_file.seek(0) + reg_file.write(hex(1)) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + + try: + reg_file = open( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w") + except IOError as e: + return False + + if lpmode: + value=1 + else: + value=0 + reg_file.write(hex(value)) + reg_file.close() + + return True + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + + reg_status = self._api_helper.read_one_line_file( + "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"])) + + return (int(reg_status) == 1) + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + sfputil_helper = SfpUtilHelper() + sfputil_helper.read_porttab_mappings( + self.__get_path_to_port_config_file()) + name = sfputil_helper.physical_to_logical[self.index] or "Unknown" + return name + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + # Get path for access port presence status + sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs" + reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename]) + + content = self._api_helper.read_one_line_file(reg_path) + reg_value = int(content) + + return (reg_value == 0) + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() and not self.get_reset_status() diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py new file mode 100644 index 000000000000..1db171329a02 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py @@ -0,0 +1,204 @@ +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_SS_THRESHOLD_CMD = "0x27 {}" +HIGH_TRESHOLD_SET_KEY = "unc" +DEFAULT_VAL = 'N/A' + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self._api_helper = APIHelper() + self.index = thermal_index + thermal_list = [\ + ('Base_Temp_U5', '0x01', 'Baseboard Right Temp'),\ + ('Base_Temp_U7', '0x02', 'Baseboard Left Temp'),\ + ('Switch_Temp_U1', '0x03', 'ASIC External Front Temp'),\ + ('Switch_Temp_U18', '0x04', 'ASIC External Rear Temp'),\ + ('Switch_Temp_U28', '0x05', 'Switchboard Right Temp'),\ + ('Switch_Temp_U29', '0x06', 'Switchboard Left Temp'),\ + ('CPU_Temp', '0x07', 'CPU Internal Temp'),\ + ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\ + ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\ + ('PSUL_Temp1', '0x0D', 'PSU 1 Ambient Temp'),\ + ('PSUL_Temp2', '0x0E', 'PSU 1 Hotspot Temp'),\ + ('PSUR_Temp1', '0x17', 'PSU 2 Ambient Temp'),\ + ('PSUR_Temp2', '0x18', 'PSU 2 Hotspot Temp'),\ + ] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] + + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp + + def get_temperature(self, skip_record=False): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + if status and len(raw_ss_read.split()) > 0: + ss_read = raw_ss_read.split()[0] + temperature = float(int(ss_read, 16)) + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[4] + high_threshold = float(int(ss_read, 16)) + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return DEFAULT_VAL + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.minimum_thermal + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.sensor_name + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return True if self.get_temperature() > 0 else False + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py new file mode 100644 index 000000000000..2290119674cb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py @@ -0,0 +1,274 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica Seastone2 +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import subprocess +import syslog +import fcntl + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/{}' +I2C_WDT_ARM_REG='0xA181' +I2C_WDT_SET_TIMER_L_REG='0xA182' +I2C_WDT_SET_TIMER_M_REG='0xA183' +I2C_WDT_SET_TIMER_H_REG='0xA184' +I2C_WDT_KEEPALIVE_REG='0xA185' +I2C_WDT_TIMER_L_REG='0xA186' +I2C_WDT_TIMER_M_REG='0xA187' +I2C_WDT_TIMER_H_REG='0xA188' + +WDT_ENABLE=0x1 +WDT_DISABLE=0x0 +WDT_KEEPALIVE=0x1 +WDT_COMMON_ERROR=-1 +DEFAULT_TIMEOUT=180 + +class Watchdog(WatchdogBase): + + def __init__(self): + # Set default value + self.armed = True if self._is_active() else False + self.timeout = self._gettimeout() + #self._disable() + + def _get_lpc_reg(self, reg): + file_path = PLATFORM_CPLD_PATH.format('getreg') + value = None + status = False + + try: + fd = open(file_path, "w+") + # Acquire an exclusive lock on the file + fcntl.flock(fd, fcntl.LOCK_EX) + fd.write(reg) + fd.flush() + fd.seek(0) + value = fd.readline().rstrip() + status = True + except (IOError, PermissionError, FileNotFoundError): + syslog.syslog(syslog.LOG_ERR, "Baseboard LPC getreg failed with {}",format(e)) + value = None + status = False + finally: + fcntl.flock(fd, fcntl.LOCK_UN) + fd.close() + + return status, value + + def _set_lpc_reg(self, reg, val): + status = False + file_path = PLATFORM_CPLD_PATH.format('setreg') + value = '{} {}'.format(reg, hex(val)) + + try: + fd = open(file_path, 'w') + fcntl.flock(fd, fcntl.LOCK_EX) + fd.write(value) + status = True + except (IOError, PermissionError, FileNotFoundError): + syslog.syslog(syslog.LOG_ERR, "Baseboard LPC setreg failed with {}",format(e)) + value = None + status = False + finally: + fcntl.flock(fd, fcntl.LOCK_UN) + fd.close() + + return status + + def _is_active(self): + """ + WDT is active or not + """ + status, data = self._get_lpc_reg(I2C_WDT_ARM_REG) + if status and data == "0x01": + return True + + return False + + def _enable(self): + """ + Turn on the watchdog timer + """ + self._settimeleft(0) + return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_ENABLE) + + def _disable(self): + """ + Turn off the watchdog timer + """ + return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_DISABLE) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + self._settimeleft(0) + return self._set_lpc_reg(I2C_WDT_KEEPALIVE_REG, WDT_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._set_lpc_reg(I2C_WDT_SET_TIMER_L_REG, ms_low_byte) + self._set_lpc_reg(I2C_WDT_SET_TIMER_M_REG, ms_media_byte) + self._set_lpc_reg(I2C_WDT_SET_TIMER_H_REG, ms_high_byte) + + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + data = [0, 0, 0] + status, data[0] = self._get_lpc_reg(I2C_WDT_SET_TIMER_L_REG) + if not status: + return 0 + status, data[1] = self._get_lpc_reg(I2C_WDT_SET_TIMER_M_REG) + if not status: + return 0 + status, data[2] = self._get_lpc_reg(I2C_WDT_SET_TIMER_H_REG) + if not status: + return 0 + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return seconds + + def _settimeleft(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + ms = seconds * 1000 + ms_low_byte = ms & 0xff + ms_media_byte = (ms >> 8) & 0xff + ms_high_byte = (ms >> 16) & 0xff + self._set_lpc_reg(I2C_WDT_TIMER_L_REG, ms_low_byte) + self._set_lpc_reg(I2C_WDT_TIMER_M_REG, ms_media_byte) + self._set_lpc_reg(I2C_WDT_TIMER_H_REG, ms_high_byte) + + return True + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + data = [0, 0, 0] + status, data[0] = self._get_lpc_reg(I2C_WDT_TIMER_L_REG) + if not status: + return 0 + status, data[1] = self._get_lpc_reg(I2C_WDT_TIMER_M_REG) + if not status: + return 0 + status, data[2] = self._get_lpc_reg(I2C_WDT_TIMER_H_REG) + if not status: + return 0 + seconds = int((int(data[2], 16) << 16 + | int(data[1], 16) << 8 + | int(data[0], 16)) / 1000) + + return (self.timeout - seconds) if (self.timeout > seconds) else 0 + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.armed: + self._keepalive() + else: + status = self._enable() + if not status: + syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed") + return ret + + self.armed = True + + ret = self.timeout + except IOError: + pass + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + status = self._disable() + if status: + self.armed = False + disarmed = True + else: + syslog.syslog(syslog.LOG_ERR, "Disable watchdog failed") + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + timeleft = WDT_COMMON_ERROR + + if self.armed: + try: + timeleft = self._gettimeleft() + except IOError: + pass + + return timeleft diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile new file mode 100644 index 000000000000..641690d4871e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile @@ -0,0 +1,11 @@ +TARGET:= pddf_custom_fan_driver_module +$(TARGET)-objs := ./fan_driver/pddf_custom_fan_api.o ./fan_driver/pddf_custom_fan_driver.o + +TARGET1:= pddf_custom_led_module +$(TARGET1)-objs := ./led_driver/pddf_custom_led_module.o + +TARGET2:= pddf_custom_psu_driver_module +$(TARGET2)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o + +obj-m := $(TARGET).o $(TARGET1).o $(TARGET2).o +obj-m += pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o tps536c7.o pddf_custom_wdt.o pddf_custom_lpc_basecpld.o diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c new file mode 100644 index 000000000000..6777690361b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c @@ -0,0 +1,656 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to FAN component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pddf_custom_fan_defs.h" +#include "pddf_custom_fan_driver.h" + +/*#define FAN_DEBUG*/ +#ifdef FAN_DEBUG +#define fan_dbg(...) printk(__VA_ARGS__) +#else +#define fan_dbg(...) +#endif + +extern void *get_device_table(char *name); + +void get_fan_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + default: + break; + } + + return; +} + + +int fan_update_hw(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + +int fan_update_attr(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + if (time_after(jiffies, info->last_updated + HZ + HZ / 2) || !info->valid) + { + dev_dbg(&client->dev, "Starting pddf_fan update\n"); + info->valid = 0; + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute.ret %d\n", __FUNCTION__, udata->aname, status); + } + + + info->last_updated = jiffies; + info->valid = 1; + } + + mutex_unlock(&info->update_lock); + + return 0; +} + +ssize_t fan_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data); + FAN_DATA_ATTR *usr_data = NULL; + struct fan_attr_info *attr_info = NULL; + int i, status=0; + char new_str[ATTR_NAME_LEN] = ""; + FAN_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (FAN_SYSFS_ATTR_DATA *)pdata->fan_attrs[i].access_data; + get_fan_duplicate_sysfs(ptr->index , new_str); + if (strcmp(attr->dev_attr.attr.name, pdata->fan_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0) + { + attr_info = &data->attr_info[i]; + usr_data = &pdata->fan_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", usr_data->aname); + goto exit; + } + + fan_update_attr(dev, attr_info, usr_data); + + /*Decide the o/p based on attribute type */ + switch(attr->index) + { + case FAN1_PRESENT: + case FAN2_PRESENT: + case FAN3_PRESENT: + case FAN4_PRESENT: + case FAN5_PRESENT: + case FAN6_PRESENT: + case FAN7_PRESENT: + case FAN8_PRESENT: + case FAN9_PRESENT: + case FAN10_PRESENT: + case FAN11_PRESENT: + case FAN12_PRESENT: + case FAN13_PRESENT: + case FAN14_PRESENT: + case FAN1_DIRECTION: + case FAN2_DIRECTION: + case FAN3_DIRECTION: + case FAN4_DIRECTION: + case FAN5_DIRECTION: + case FAN6_DIRECTION: + case FAN7_DIRECTION: + case FAN8_DIRECTION: + case FAN9_DIRECTION: + case FAN10_DIRECTION: + case FAN11_DIRECTION: + case FAN12_DIRECTION: + case FAN13_DIRECTION: + case FAN14_DIRECTION: + case FAN1_INPUT: + case FAN2_INPUT: + case FAN3_INPUT: + case FAN4_INPUT: + case FAN5_INPUT: + case FAN6_INPUT: + case FAN7_INPUT: + case FAN8_INPUT: + case FAN9_INPUT: + case FAN10_INPUT: + case FAN11_INPUT: + case FAN12_INPUT: + case FAN13_INPUT: + case FAN14_INPUT: + case FAN1_PWM: + case FAN2_PWM: + case FAN3_PWM: + case FAN4_PWM: + case FAN5_PWM: + case FAN6_PWM: + case FAN7_PWM: + case FAN8_PWM: + case FAN9_PWM: + case FAN10_PWM: + case FAN11_PWM: + case FAN12_PWM: + case FAN13_PWM: + case FAN14_PWM: + case FAN1_FAULT: + case FAN2_FAULT: + case FAN3_FAULT: + case FAN4_FAULT: + case FAN5_FAULT: + case FAN6_FAULT: + case FAN7_FAULT: + case FAN8_FAULT: + case FAN9_FAULT: + case FAN10_FAULT: + case FAN11_FAULT: + case FAN12_FAULT: + case FAN13_FAULT: + case FAN14_FAULT: + status = attr_info->val.intval; + break; + default: + fan_dbg(KERN_ERR "%s: Unable to find the attribute index for %s\n", __FUNCTION__, usr_data->aname); + status = 0; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t fan_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data); + FAN_DATA_ATTR *usr_data = NULL; + struct fan_attr_info *attr_info = NULL; + int i, ret ; + uint32_t val; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->fan_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + attr_info = &data->attr_info[i]; + usr_data = &pdata->fan_attrs[i]; + } + } + + if (attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + case FAN1_PWM: + case FAN2_PWM: + case FAN3_PWM: + case FAN4_PWM: + case FAN5_PWM: + case FAN6_PWM: + case FAN7_PWM: + case FAN8_PWM: + case FAN9_PWM: + case FAN10_PWM: + case FAN11_PWM: + case FAN12_PWM: + case FAN13_PWM: + case FAN14_PWM: + ret = kstrtoint(buf, 10, &val); + if (ret) + { + printk(KERN_ERR "%s: Unable to convert string into value for %s\n", __FUNCTION__, usr_data->aname); + return ret; + } + /*Update the value of attr_info here, and use it to update the HW values*/ + attr_info->val.intval = val; + break; + default: + printk(KERN_ERR "%s: Unable to find the attr index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + + fan_dbg(KERN_ERR "%s: pwm to be set is %d\n", __FUNCTION__, val); + fan_update_hw(dev, attr_info, usr_data); + +exit: + return count; +} + +int fan_cpld_client_read(FAN_DATA_ATTR *udata) +{ + int status = -1; + + if (udata!=NULL) + { + if (udata->len==1) + { + status = board_i2c_cpld_read(udata->devaddr , udata->offset); + } + else + { + /* Get the I2C client for the CPLD */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + status = i2c_smbus_read_word_swapped(client_ptr, udata->offset); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD read yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + } + + return status; +} + +int fan_cpld_client_write(FAN_DATA_ATTR *udata, uint32_t val) +{ + int status = 0; + + if (udata->len==1) + { + status = board_i2c_cpld_write(udata->devaddr, udata->offset, val); + } + else + { + /* Get the I2C client for the CPLD */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb); + if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD write yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + return status; +} + +int fan_fpgai2c_client_read(FAN_DATA_ATTR *udata) +{ + int status = -1; + + if (udata!=NULL) + { + if (udata->len==1) + { + status = board_i2c_fpga_read(udata->devaddr , udata->offset); + /*printk(KERN_ERR "### Reading offset 0x%x from 0x%x device ... val 0x%x\n", udata->offset, udata->devaddr, status);*/ + } + else + { + /* Get the I2C client for the FPGAI2C */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + status = i2c_smbus_read_word_swapped(client_ptr, udata->offset); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C read yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + } + + return status; +} + +int fan_fpgai2c_client_write(FAN_DATA_ATTR *udata, uint32_t val) +{ + int status = 0; + + if (udata->len==1) + { + status = board_i2c_fpga_write(udata->devaddr, udata->offset, val); + } + else + { + /* Get the I2C client for the FPGAI2C */ + struct i2c_client *client_ptr=NULL; + client_ptr = (struct i2c_client *)get_device_table(udata->devname); + if (client_ptr) + { + if (udata->len==2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb); + if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb); + } + else + printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C write yet"); + } + else + printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname); + } + + return status; +} + + +int sonic_i2c_get_fan_present_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + + + return status; +} + +int sonic_i2c_get_fan_rpm_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + if (udata->len == 1) + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + else if (udata->len ==2) + { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + + } + } + + if (val < 0) + status = val; + else + { + if (udata->is_divisor) + painfo->val.intval = udata->mult / (val >> 3); + else + painfo->val.intval = udata->mult * val; + } + + return status; +} + + +int sonic_i2c_get_fan_direction_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + + return status; +} + + +int sonic_i2c_set_fan_pwm_default(struct i2c_client *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + val = painfo->val.intval & udata->mask; + + if (val > 255) + { + return -EINVAL; + } + + if (strcmp(udata->devtype, "cpld") == 0) + { + status = fan_cpld_client_write(udata, val); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + status = fan_fpgai2c_client_write(udata, val); + } + else + { + if (udata->len == 1) + status = i2c_smbus_write_byte_data(client, udata->offset, val); + else if (udata->len == 2) + { + uint8_t val_lsb = val & 0xFF; + uint8_t val_hsb = (val >> 8) & 0xFF; + /* TODO: Check this logic for LE and BE */ + status = i2c_smbus_write_byte_data(client, udata->offset, val_lsb); + if (status == 0) status = i2c_smbus_write_byte_data(client, udata->offset+1, val_hsb); + } + else + { + printk(KERN_DEBUG "%s: pwm should be of len 1/2 bytes. Not setting the pwm as the length is %d\n", __FUNCTION__, udata->len); + } + } + + return status; +} + + +int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + if (udata->len == 1) + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + else if (udata->len ==2) + { + val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); + + } + } + + if (val < 0) + status = val; + else + { + val = val & udata->mask; + painfo->val.intval = val; + } + return status; +} + +int sonic_i2c_get_fan_fault_default(void *client, FAN_DATA_ATTR *udata, void *info) +{ + int status = 0; + int val = 0; + struct fan_attr_info *painfo = (struct fan_attr_info *)info; + + /*Assuming fan fault to be denoted by 1 byte only*/ + if (strcmp(udata->devtype, "cpld") == 0) + { + val = fan_cpld_client_read(udata); + } + else if (strcmp(udata->devtype, "fpgai2c") == 0) + { + val = fan_fpgai2c_client_read(udata); + } + else + { + val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset); + } + + if (val < 0) + status = val; + else + painfo->val.intval = ((val & udata->mask) == udata->cmpval); + return status; +} + + +int pddf_fan_post_probe_default(struct i2c_client *client, const struct i2c_device_id *dev_id) +{ + + /*Dummy func for now - check the respective platform modules*/ + return 0; +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h new file mode 100644 index 000000000000..24a91a291e8c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h @@ -0,0 +1,93 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform FAN defines/structures header file + */ + +#ifndef __PDDF_FAN_DEFS_H__ +#define __PDDF_FAN_DEFS_H__ + + +#define MAX_NUM_FAN 7 +#define MAX_FAN_ATTRS 128 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct FAN_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum fan_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // Type of FAN controller, i.e EMC2305, EMC2302, or FAN-CPLD etc + char devname[DEV_TYPE_LEN]; // Name of the device from where this informatin is to be read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + int mult; // Multiplication factor to get the actual data + uint8_t is_divisor; // Check if the value is a divisor and mult is dividend + void *access_data; + +}FAN_DATA_ATTR; + + +typedef struct FAN_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, FAN_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, FAN_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, FAN_DATA_ATTR *adata, void *data); + void *data; +} FAN_SYSFS_ATTR_DATA; + +typedef struct FAN_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + FAN_SYSFS_ATTR_DATA *a_ptr; +} FAN_SYSFS_ATTR_DATA_ENTRY; + + +/* FAN CLIENT DATA - PLATFORM DATA FOR FAN CLIENT */ +typedef struct FAN_DATA +{ + int num_fantrays; // num of fans controlled by this fan client + FAN_DATA_ATTR fan_attr; + int len; // no of valid attributes for this fan client + FAN_DATA_ATTR fan_attrs[MAX_FAN_ATTRS]; +}FAN_DATA; + +typedef struct FAN_PDATA +{ + int num_fantrays; // num of fans controlled by this fan client + int len; // no of valid attributes for this fan client + FAN_DATA_ATTR *fan_attrs; +}FAN_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); +#endif \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c new file mode 100644 index 000000000000..1db3573c1c20 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c @@ -0,0 +1,523 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel driver module for a FAN controller + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "pddf_custom_fan_defs.h" +#include "pddf_custom_fan_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_fan_api.h" + +#define DRVNAME "pddf_costom_fan" + +struct pddf_ops_t pddf_fan_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = pddf_fan_post_probe_default, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_fan_ops); + + + +FAN_SYSFS_ATTR_DATA data_fan1_present = {FAN1_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_present); +FAN_SYSFS_ATTR_DATA data_fan2_present = {FAN2_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_present); +FAN_SYSFS_ATTR_DATA data_fan3_present = {FAN3_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_present); +FAN_SYSFS_ATTR_DATA data_fan4_present = {FAN4_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_present); +FAN_SYSFS_ATTR_DATA data_fan5_present = {FAN5_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_present); +FAN_SYSFS_ATTR_DATA data_fan6_present = {FAN6_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_present); +FAN_SYSFS_ATTR_DATA data_fan7_present = {FAN7_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_present); +FAN_SYSFS_ATTR_DATA data_fan8_present = {FAN8_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_present); +FAN_SYSFS_ATTR_DATA data_fan9_present = {FAN9_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_present); +FAN_SYSFS_ATTR_DATA data_fan10_present = {FAN10_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_present); +FAN_SYSFS_ATTR_DATA data_fan11_present = {FAN11_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_present); +FAN_SYSFS_ATTR_DATA data_fan12_present = {FAN12_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_present); +FAN_SYSFS_ATTR_DATA data_fan13_present = {FAN13_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_present); +FAN_SYSFS_ATTR_DATA data_fan14_present = {FAN14_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_present); + + +FAN_SYSFS_ATTR_DATA data_fan1_direction = {FAN1_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_direction); +FAN_SYSFS_ATTR_DATA data_fan2_direction = {FAN2_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_direction); +FAN_SYSFS_ATTR_DATA data_fan3_direction = {FAN3_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_direction); +FAN_SYSFS_ATTR_DATA data_fan4_direction = {FAN4_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_direction); +FAN_SYSFS_ATTR_DATA data_fan5_direction = {FAN5_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_direction); +FAN_SYSFS_ATTR_DATA data_fan6_direction = {FAN6_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_direction); +FAN_SYSFS_ATTR_DATA data_fan7_direction = {FAN7_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_direction); +FAN_SYSFS_ATTR_DATA data_fan8_direction = {FAN8_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_direction); +FAN_SYSFS_ATTR_DATA data_fan9_direction = {FAN9_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_direction); +FAN_SYSFS_ATTR_DATA data_fan10_direction = {FAN10_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_direction); +FAN_SYSFS_ATTR_DATA data_fan11_direction = {FAN11_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_direction); +FAN_SYSFS_ATTR_DATA data_fan12_direction = {FAN12_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_direction); +FAN_SYSFS_ATTR_DATA data_fan13_direction = {FAN13_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_direction); +FAN_SYSFS_ATTR_DATA data_fan14_direction = {FAN14_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_direction); + + +FAN_SYSFS_ATTR_DATA data_fan1_input = {FAN1_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_input); +FAN_SYSFS_ATTR_DATA data_fan2_input = {FAN2_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_input); +FAN_SYSFS_ATTR_DATA data_fan3_input = {FAN3_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_input); +FAN_SYSFS_ATTR_DATA data_fan4_input = {FAN4_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_input); +FAN_SYSFS_ATTR_DATA data_fan5_input = {FAN5_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_input); +FAN_SYSFS_ATTR_DATA data_fan6_input = {FAN6_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_input); +FAN_SYSFS_ATTR_DATA data_fan7_input = {FAN7_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_input); +FAN_SYSFS_ATTR_DATA data_fan8_input = {FAN8_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_input); +FAN_SYSFS_ATTR_DATA data_fan9_input = {FAN9_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_input); +FAN_SYSFS_ATTR_DATA data_fan10_input = {FAN10_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_input); +FAN_SYSFS_ATTR_DATA data_fan11_input = {FAN11_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_input); +FAN_SYSFS_ATTR_DATA data_fan12_input = {FAN12_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_input); +FAN_SYSFS_ATTR_DATA data_fan13_input = {FAN13_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_input); +FAN_SYSFS_ATTR_DATA data_fan14_input = {FAN14_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_input); + +FAN_SYSFS_ATTR_DATA data_fan1_pwm = {FAN1_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_pwm); +FAN_SYSFS_ATTR_DATA data_fan2_pwm = {FAN2_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_pwm); +FAN_SYSFS_ATTR_DATA data_fan3_pwm = {FAN3_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_pwm); +FAN_SYSFS_ATTR_DATA data_fan4_pwm = {FAN4_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_pwm); +FAN_SYSFS_ATTR_DATA data_fan5_pwm = {FAN5_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_pwm); +FAN_SYSFS_ATTR_DATA data_fan6_pwm = {FAN6_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_pwm); +FAN_SYSFS_ATTR_DATA data_fan7_pwm = {FAN7_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_pwm); +FAN_SYSFS_ATTR_DATA data_fan8_pwm = {FAN8_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_pwm); +FAN_SYSFS_ATTR_DATA data_fan9_pwm = {FAN9_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_pwm); +FAN_SYSFS_ATTR_DATA data_fan10_pwm = {FAN10_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_pwm); +FAN_SYSFS_ATTR_DATA data_fan11_pwm = {FAN11_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_pwm); +FAN_SYSFS_ATTR_DATA data_fan12_pwm = {FAN12_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_pwm); +FAN_SYSFS_ATTR_DATA data_fan13_pwm = {FAN13_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_pwm); +FAN_SYSFS_ATTR_DATA data_fan14_pwm = {FAN14_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_pwm); + + +FAN_SYSFS_ATTR_DATA data_fan1_fault = {FAN1_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan1_fault); +FAN_SYSFS_ATTR_DATA data_fan2_fault = {FAN2_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan2_fault); +FAN_SYSFS_ATTR_DATA data_fan3_fault = {FAN3_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan3_fault); +FAN_SYSFS_ATTR_DATA data_fan4_fault = {FAN4_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan4_fault); +FAN_SYSFS_ATTR_DATA data_fan5_fault = {FAN5_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan5_fault); +FAN_SYSFS_ATTR_DATA data_fan6_fault = {FAN6_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan6_fault); +FAN_SYSFS_ATTR_DATA data_fan7_fault = {FAN7_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan7_fault); +FAN_SYSFS_ATTR_DATA data_fan8_fault = {FAN8_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan8_fault); +FAN_SYSFS_ATTR_DATA data_fan9_fault = {FAN9_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan9_fault); +FAN_SYSFS_ATTR_DATA data_fan10_fault = {FAN10_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan10_fault); +FAN_SYSFS_ATTR_DATA data_fan11_fault = {FAN11_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan11_fault); +FAN_SYSFS_ATTR_DATA data_fan12_fault = {FAN12_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan12_fault); +FAN_SYSFS_ATTR_DATA data_fan13_fault = {FAN13_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan13_fault); +FAN_SYSFS_ATTR_DATA data_fan14_fault = {FAN14_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(data_fan14_fault); + + +FAN_SYSFS_ATTR_DATA_ENTRY fan_sysfs_attr_data_tbl[]= +{ + { "fan1_present", &data_fan1_present}, + { "fan2_present", &data_fan2_present}, + { "fan3_present", &data_fan3_present}, + { "fan4_present", &data_fan4_present}, + { "fan5_present", &data_fan5_present}, + { "fan6_present", &data_fan6_present}, + { "fan7_present", &data_fan7_present}, + { "fan8_present", &data_fan8_present}, + { "fan9_present", &data_fan9_present}, + { "fan10_present", &data_fan10_present}, + { "fan11_present", &data_fan11_present}, + { "fan12_present", &data_fan12_present}, + { "fan13_present", &data_fan13_present}, + { "fan14_present", &data_fan14_present}, + { "fan1_direction", &data_fan1_direction}, + { "fan2_direction", &data_fan2_direction}, + { "fan3_direction", &data_fan3_direction}, + { "fan4_direction", &data_fan4_direction}, + { "fan5_direction", &data_fan5_direction}, + { "fan6_direction", &data_fan6_direction}, + { "fan7_direction", &data_fan7_direction}, + { "fan8_direction", &data_fan8_direction}, + { "fan9_direction", &data_fan9_direction}, + { "fan10_direction", &data_fan10_direction}, + { "fan11_direction", &data_fan11_direction}, + { "fan12_direction", &data_fan12_direction}, + { "fan13_direction", &data_fan13_direction}, + { "fan14_direction", &data_fan14_direction}, + { "fan1_input", &data_fan1_input}, + { "fan2_input", &data_fan2_input}, + { "fan3_input", &data_fan3_input}, + { "fan4_input", &data_fan4_input}, + { "fan5_input", &data_fan5_input}, + { "fan6_input", &data_fan6_input}, + { "fan7_input", &data_fan7_input}, + { "fan8_input", &data_fan8_input}, + { "fan9_input", &data_fan9_input}, + { "fan10_input", &data_fan10_input}, + { "fan11_input", &data_fan11_input}, + { "fan12_input", &data_fan12_input}, + { "fan13_input", &data_fan13_input}, + { "fan14_input", &data_fan14_input}, + { "fan1_pwm", &data_fan1_pwm}, + { "fan2_pwm", &data_fan2_pwm}, + { "fan3_pwm", &data_fan3_pwm}, + { "fan4_pwm", &data_fan4_pwm}, + { "fan5_pwm", &data_fan5_pwm}, + { "fan6_pwm", &data_fan6_pwm}, + { "fan7_pwm", &data_fan7_pwm}, + { "fan8_pwm", &data_fan8_pwm}, + { "fan9_pwm", &data_fan9_pwm}, + { "fan10_pwm", &data_fan10_pwm}, + { "fan11_pwm", &data_fan11_pwm}, + { "fan12_pwm", &data_fan12_pwm}, + { "fan13_pwm", &data_fan13_pwm}, + { "fan14_pwm", &data_fan14_pwm}, + { "fan1_fault", &data_fan1_fault}, + { "fan2_fault", &data_fan2_fault}, + { "fan3_fault", &data_fan3_fault}, + { "fan4_fault", &data_fan4_fault}, + { "fan5_fault", &data_fan5_fault}, + { "fan6_fault", &data_fan6_fault}, + { "fan7_fault", &data_fan7_fault}, + { "fan8_fault", &data_fan8_fault}, + { "fan9_fault", &data_fan9_fault}, + { "fan10_fault", &data_fan10_fault}, + { "fan11_fault", &data_fan11_fault}, + { "fan12_fault", &data_fan12_fault}, + { "fan13_fault", &data_fan13_fault}, + { "fan14_fault", &data_fan14_fault}, +}; + +void *get_fan_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(fan_sysfs_attr_data_tbl)/sizeof(fan_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, fan_sysfs_attr_data_tbl[i].name) ==0) + { + return &fan_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_fan_access_data); + + + +static int pddf_fan_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct fan_data *data; + int status=0,i,num, j=0; + FAN_PDATA *fan_platform_data; + FAN_DATA_ATTR *data_attr; + FAN_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_fan_ops.pre_probe) + { + status = (pddf_fan_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + status = -EIO; + goto exit; + } + + /* Add support for a pre probe function */ + data = kzalloc(sizeof(struct fan_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + + /*Take control of the platform data*/ + fan_platform_data = (FAN_PDATA *)(client->dev.platform_data); + num = fan_platform_data->len; + data->num_attr = num; + + for (i=0;ifan_attrs + i; + sysfs_data_entry = get_fan_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->fan_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_fan_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->fan_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + data->fan_attribute_list[i+j] = NULL; + data->fan_attribute_group.attrs = data->fan_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->fan_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: fan '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_fan_ops.post_probe) + { + status = (pddf_fan_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0; data->fan_attribute_list[i]!=NULL; i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i]; + kfree(ptr); + } + pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); +exit: + return status; +} + +static void pddf_fan_remove(struct i2c_client *client) +{ + int i = 0, ret = 0; + struct sensor_device_attribute *ptr = NULL; + struct fan_data *data = i2c_get_clientdata(client); + FAN_PDATA *platdata = (FAN_PDATA *)client->dev.platform_data; + FAN_DATA_ATTR *platdata_sub = platdata->fan_attrs; + + if (pddf_fan_ops.pre_remove) + { + ret = (pddf_fan_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group); + for (i=0; data->fan_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i]; + kfree(ptr); + } + pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_fan_ops.post_remove) + { + ret = (pddf_fan_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static const struct i2c_device_id pddf_fan_id[] = { + { "fan_ctrl", 0 }, + { "fan_cpld", 1 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, pddf_fan_id); + +static struct i2c_driver pddf_fan_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = DRVNAME, + }, + .probe = pddf_fan_probe, + .remove = pddf_fan_remove, + .id_table = pddf_fan_id, + .address_list = normal_i2c, +}; + +static int __init pddf_fan_init(void) +{ + int status = 0; + + if (pddf_fan_ops.pre_init) + { + status = (pddf_fan_ops.pre_init)(); + if (status!=0) + return status; + } + + status = i2c_add_driver(&pddf_fan_driver); + if (status!=0) + return status; + + if (pddf_fan_ops.post_init) + { + status = (pddf_fan_ops.post_init)(); + if (status!=0) + return status; + } + return status; + +} + +static void __exit pddf_fan_exit(void) +{ + if (pddf_fan_ops.pre_exit) (pddf_fan_ops.pre_exit)(); + i2c_del_driver(&pddf_fan_driver); + if (pddf_fan_ops.post_exit) (pddf_fan_ops.post_exit)(); +} + +module_init(pddf_fan_init); +module_exit(pddf_fan_exit); + +MODULE_AUTHOR("Broadcom, yajiang@celestica.com"); +MODULE_DESCRIPTION("pddf_fan driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h new file mode 100644 index 000000000000..7dc1a2931c3a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h @@ -0,0 +1,117 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * FAN driver related data structures + */ +#ifndef __PDDF_FAN_DRIVER_H__ +#define __PDDF_FAN_DRIVER_H__ + +enum fan_sysfs_attributes { + FAN1_PRESENT, + FAN2_PRESENT, + FAN3_PRESENT, + FAN4_PRESENT, + FAN5_PRESENT, + FAN6_PRESENT, + FAN7_PRESENT, + FAN8_PRESENT, + FAN9_PRESENT, + FAN10_PRESENT, + FAN11_PRESENT, + FAN12_PRESENT, + FAN13_PRESENT, + FAN14_PRESENT, + FAN1_DIRECTION, + FAN2_DIRECTION, + FAN3_DIRECTION, + FAN4_DIRECTION, + FAN5_DIRECTION, + FAN6_DIRECTION, + FAN7_DIRECTION, + FAN8_DIRECTION, + FAN9_DIRECTION, + FAN10_DIRECTION, + FAN11_DIRECTION, + FAN12_DIRECTION, + FAN13_DIRECTION, + FAN14_DIRECTION, + FAN1_INPUT, + FAN2_INPUT, + FAN3_INPUT, + FAN4_INPUT, + FAN5_INPUT, + FAN6_INPUT, + FAN7_INPUT, + FAN8_INPUT, + FAN9_INPUT, + FAN10_INPUT, + FAN11_INPUT, + FAN12_INPUT, + FAN13_INPUT, + FAN14_INPUT, + FAN1_PWM, + FAN2_PWM, + FAN3_PWM, + FAN4_PWM, + FAN5_PWM, + FAN6_PWM, + FAN7_PWM, + FAN8_PWM, + FAN9_PWM, + FAN10_PWM, + FAN11_PWM, + FAN12_PWM, + FAN13_PWM, + FAN14_PWM, + FAN1_FAULT, + FAN2_FAULT, + FAN3_FAULT, + FAN4_FAULT, + FAN5_FAULT, + FAN6_FAULT, + FAN7_FAULT, + FAN8_FAULT, + FAN9_FAULT, + FAN10_FAULT, + FAN11_FAULT, + FAN12_FAULT, + FAN13_FAULT, + FAN14_FAULT, + FAN_MAX_ATTR +}; +/* Each client has this additional data */ +struct fan_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; + +struct fan_data { + struct device *hwmon_dev; + int num_attr; + struct attribute *fan_attribute_list[MAX_FAN_ATTRS]; + struct attribute_group fan_attribute_group; + struct fan_attr_info attr_info[MAX_FAN_ATTRS]; +}; + +#endif \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt new file mode 100644 index 000000000000..923733e858c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt @@ -0,0 +1,4 @@ +5/23/2023: Added information about the seventh fan drawers + pddf_custom_fan_driver_module:Using + pddf_fan_driver_module:Abandoned + -yajiang@celestica.com diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h new file mode 100644 index 000000000000..e786e567d433 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h @@ -0,0 +1,149 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * Platform LED related defines and structures + */ + + +/***************************************** + * kobj list + *****************************************/ + +struct kobject *platform_kobj=NULL; +struct kobject *led_kobj=NULL; + +struct kobject *state_attr_kobj=NULL; +struct kobject *cur_state_kobj=NULL; + +/***************************************** + * Static Data provided from user + * space JSON data file + *****************************************/ +#define NAME_SIZE 32 +#define VALUE_SIZE 5 +typedef enum { + STATUS_LED_COLOR_OFF=0, + STATUS_LED_COLOR_GREEN=1, + STATUS_LED_COLOR_YELLOW=2, + STATUS_LED_COLOR_RED=3, + STATUS_LED_COLOR_BLUE=4, + STATUS_LED_COLOR_GREEN_BLINK=5, + STATUS_LED_COLOR_YELLOW_BLINK=6, + STATUS_LED_COLOR_RED_BLINK=7, + STATUS_LED_COLOR_BLUE_BLINK=8, + STATUS_LED_COLOR_AMBER, + STATUS_LED_COLOR_AMBER_BLINK, + MAX_LED_STATUS +}LED_STATUS; + +char* LED_STATUS_STR[] = { + "off", + "green", + "yellow", + "red", + "blue", + "green_blink", + "yellow_blink", + "red_blink", + "blue_blink", + "amber", + "amber_blink" +}; + + +typedef struct +{ + char bits[NAME_SIZE]; + int pos; + int mask_bits; +}MASK_BITS; + +typedef struct +{ + int swpld_addr; + int swpld_addr_offset; + MASK_BITS bits; + u8 reg_values[VALUE_SIZE]; + char value[NAME_SIZE]; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_DATA; + +typedef struct +{ + int state; + char color[NAME_SIZE]; +/* S3IP System LED RW sysfs */ + int sys_led; + int bmc_led; + int fan_led; + int psu_led; + int loc_led; +/* S3IP Power LED RO sysfs */ + int psu1_led; + int psu2_led; +/* S3IP Fantray LED RO sysfs */ + int fantray1_led; + int fantray2_led; + int fantray3_led; + int fantray4_led; + int fantray5_led; + int fantray6_led; + int fantray7_led; +} CUR_STATE_DATA; + +typedef struct +{ + CUR_STATE_DATA cur_state; + char device_name[NAME_SIZE]; + int index; + LED_DATA data[MAX_LED_STATUS]; + int swpld_addr; + int swpld_addr_offset; + char attr_devtype[NAME_SIZE]; + char attr_devname[NAME_SIZE]; +} LED_OPS_DATA; + +typedef enum{ + LED_SYS, + LED_PSU, + LED_FAN, + LED_FANTRAY, + LED_DIAG, + LED_LOC, + LED_BMC, + LED_TYPE_MAX +} LED_TYPE; +char* LED_TYPE_STR[LED_TYPE_MAX] = +{ + "LED_SYS", + "LED_PSU", + "LED_FAN", + "LED_FANTRAY", + "LED_DIAG", + "LED_LOC", + "LED_BMC" +}; + +/***************************************** + * Data exported from kernel for + * user space plugin to get/set + *****************************************/ +#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr) \ + struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store), \ + .type = _type , \ + .len = _len , \ + .addr = _addr } diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c new file mode 100644 index 000000000000..8f0da48b4d98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c @@ -0,0 +1,873 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module to manage various LEDs of a switch + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include "pddf_custom_led_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include +#include +#include + +#define DEBUG 0 +#define MAX_PSU_NUM 2 +#define MAX_FANTRAY_NUM 7 +LED_OPS_DATA sys_led_ops_data[1]={0}; +LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0}; +LED_OPS_DATA diag_led_ops_data[1]= {0}; +LED_OPS_DATA fan_led_ops_data[1]= {0}; +LED_OPS_DATA loc_led_ops_data[1]= {0}; +LED_OPS_DATA bmc_led_ops_data[1]= {0}; +LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0}; +LED_OPS_DATA temp_data={0}; +LED_OPS_DATA* dev_list[LED_TYPE_MAX] = { + sys_led_ops_data, + psu_led_ops_data, + fan_led_ops_data, + fantray_led_ops_data, + diag_led_ops_data, + loc_led_ops_data, + bmc_led_ops_data, + NULL +}; +int num_psus = 0; +int num_fantrays = 0; + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value); +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); +extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value); + +extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +static LED_STATUS find_state_index(const char* state_str) { + int index; + char *ptr = (char *)state_str; + while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++; + *ptr='\0'; + for ( index = 0; index < MAX_LED_STATUS; index++) { + if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) { + return index; + } + } + return MAX_LED_STATUS; +} + +static LED_TYPE get_dev_type(char* name) +{ + LED_TYPE ret = LED_TYPE_MAX; + if(strcasecmp(name, "SYS_LED") == 0) { + ret = LED_SYS; + } else if(strcasecmp(name, "FAN_LED") == 0) { + ret = LED_FAN; + } else if(strstr(name, "PSU_LED")) { + ret = LED_PSU; + } else if(strcasecmp(name, "DIAG_LED") == 0) { + ret = LED_DIAG; + } else if(strcasecmp(name, "LOC_LED") == 0) { + ret = LED_LOC; + } else if(strstr(name, "FANTRAY_LED")) { + ret = LED_FANTRAY; + } +#if DEBUG > 1 + pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret); +#endif + return (ret); +} +static int dev_index_check(LED_TYPE type, int index) +{ +#if DEBUG + pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n", + LED_TYPE_STR[type], type, index, num_psus, num_fantrays); +#endif + switch(type) + { + case LED_PSU: + if(index >= MAX_PSU_NUM) return (-1); + break; + case LED_FANTRAY: + if(index >= MAX_FANTRAY_NUM) return (-1); + break; + default: + if(index >= 1) return (-1); + break; + } + return (0); +} + +static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL); + + if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) { + printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return (NULL); + } + if(dev_index_check(led_type, ptr->index) == -1) { + printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type); + return (NULL); + } +#if DEBUG > 1 + pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n", + ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index); +#endif + return (dev_list[led_type]+ptr->index); +} + +static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state) +{ + int i = 0; + if(!ptr) return ; + pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n", + ptr->device_name, ptr->index, num_psus, num_fantrays, ptr); + pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index); + pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname); + pddf_dbg(LED, KERN_INFO "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color); + for (i = 0; i< MAX_LED_STATUS; i++) { + if(ptr->data[i].swpld_addr && (i == state || state == -1)) { + pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;" + "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr, + ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value, + ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits, + ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname); + } + } +} + +ssize_t get_status_led(struct device_attribute *da) +{ + int ret=0; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + uint32_t color_val=0, sys_val=0; + int state=0; + int cpld_type=0; + int j; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index); + return (-1); + } + + if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + + strscpy(temp_data.cur_state.color, "None", NAME_SIZE); + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) { + strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color); +#endif + return(ret); +} + +ssize_t set_status_led(struct device_attribute *da) +{ + int ret=0; + uint32_t sys_val=0, new_val=0, read_val=0; + LED_STATUS cur_state = MAX_LED_STATUS; + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + char* _buf=temp_data_ptr->cur_state.color; + int cpld_type = 0; + + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n", + __func__, ops_ptr->device_name, ops_ptr->index); + return (-1); + } + + pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__, + temp_data_ptr->device_name, temp_data_ptr->index, + temp_data_ptr->cur_state.color); + cur_state = find_state_index(_buf); + + if (cur_state == MAX_LED_STATUS) { + pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__); + return (-1); + } + + if (ops_ptr->data[cur_state].swpld_addr != 0x0) { + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + cpld_type = 1; + sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + + if (sys_val < 0){ + return sys_val; + } + + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf); + return (-1); + } + + if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset); + } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val, + cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + + return(ret); +} + + +ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + ret = sprintf(buf, "%s\n", ptr->addr); + break; + case PDDF_INT_DEC: + ret = sprintf(buf, "%d\n", *(int*)(ptr->addr)); + break; + case PDDF_INT_HEX: + ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr)); + break; + case PDDF_USHORT: + ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr)); + break; + case PDDF_UINT32: + ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr)); + break; + default: + break; + } +#if DEBUG > 1 + pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n", + ptr->dev_attr.attr.name, ptr->type, buf); +#endif + return ret; +} + +ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0, num = 0; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + switch (ptr->type) + { + case PDDF_CHAR: + memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf + ptr->addr[strlen(buf)-1] = '\0'; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR VALUE:%s\n", + ptr->dev_attr.attr.name, ptr->addr); +#endif + break; + case PDDF_INT_DEC: + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC VALUE:%d\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_INT_HEX: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX VALUE:0x%x\n", + ptr->dev_attr.attr.name, *(int *)(ptr->addr)); +#endif + break; + case PDDF_USHORT: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(unsigned short *)(ptr->addr) = (unsigned short)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT VALUE:%x\n", + ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr)); +#endif + break; + case PDDF_UINT32: + ret = kstrtoint(buf,16,&num); + if (ret==0) + *(uint32_t *)(ptr->addr) = (uint32_t)num; +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n", + ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr)); +#endif + break; + default: + break; + } + return count; +} + +ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, + char *buf) +{ + int ret = 0; + pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + if (_ptr == NULL) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + uint32_t color_val=0, sys_val=0; + int state=0, j; + int cpld_type=0; + if (!ops_ptr) { + pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__); + return (-1); + } + if (ops_ptr->swpld_addr == 0x0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__, + ops_ptr->device_name, ops_ptr->index); + return (-1); + } + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + if (sys_val < 0) { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return sys_val; + } + for (state=0; statedata[state].bits.mask_bits); + for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) { + if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) { + ret = sprintf(buf, "%d\n", state); + break; + } + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n", + ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, + ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state); +#endif + return ret; +} + +ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret = 0; + int cur_state = 0; + uint32_t sys_val=0, new_val=0, read_val=0; + int cpld_type=0; + + pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state); + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + ret = kstrtoint(buf,10,&cur_state); + if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) { + pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__); + return -1; + } + LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr; + + if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) { + cpld_type=1; + sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) { + sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + return (-1); + } + + new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) | + (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos); + + if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) { + ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val); + read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) { + ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val); + read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset); + } else { + pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__, + ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype); + return (-1); + } + +#if DEBUG + pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n", + LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, + sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype); +#endif + return count; +} + + +static int load_led_ops_data(struct device_attribute *da, LED_STATUS state) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr; + LED_TYPE led_type; + LED_OPS_DATA* ops_ptr = NULL; + int i = 0; + char *token = NULL, *value_ptr = NULL; + + if(!ptr || strlen(ptr->device_name)==0 ) { + pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL"); + return(-1); + } + + if(ptr->device_name) + { + pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n", + ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value); + } + if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__); + return(-1); + } + if(dev_index_check(led_type, ptr->index)==-1) { + pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type); + return(-1); + } + ops_ptr = dev_list[led_type]+ptr->index; + + memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name)); + ops_ptr->index = ptr->index; + memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA)); + ops_ptr->data[state].swpld_addr = ptr->swpld_addr; + ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset; + ops_ptr->swpld_addr = ptr->swpld_addr; + ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset; + memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype)); + memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname)); + memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype)); + memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname)); +#ifdef __STDC_LIB_EXT1__ + memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values)); +#else + memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values)); +#endif + value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL); + if (value_ptr) { + memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value)); + while((token = strsep((char**)&value_ptr,";")) != NULL && i < VALUE_SIZE) { + if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) { + pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token); + } + i++; + } + kfree(value_ptr); + } + + print_led_data(dev_list[led_type]+ptr->index, state); + + memset(ptr, 0, sizeof(LED_OPS_DATA)); + return (0); +} + +static int show_led_ops_data(struct device_attribute *da) +{ + LED_OPS_DATA* ops_ptr = find_led_ops_data(da); + print_led_data(ops_ptr, -1); + return(0); +} + +static int verify_led_ops_data(struct device_attribute *da) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr; + LED_OPS_DATA* ops_ptr=find_led_ops_data(da); + + if(ops_ptr) + memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA)); + else + { + pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index); + } + return (0); +} + + +ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ +#if DEBUG + pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf); +#endif + if(strncmp(buf, "show", strlen("show")) == 0) { + show_led_ops_data(da); + } + else if(strncmp(buf, "verify", strlen("verify")) == 0) { + verify_led_ops_data(da); + } + else if(strncmp(buf, "get_status", strlen("get_status")) == 0) { + get_status_led(da); + } + else if(strncmp(buf, "set_status", strlen("set_status")) == 0) { + set_status_led(da); + } + else { + LED_STATUS index = find_state_index(buf); + if (index < MAX_LED_STATUS) { + load_led_ops_data(da, index); + } else { + printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf); + } + } + return (count); +} + +ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int ret, num; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) { + ret = kstrtoint(buf,10,&num); + if (ret==0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_psus); +#endif + return(count); + } + if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) { + ret = kstrtoint(buf, 10, &num); + if (ret == 0) + *(int *)(ptr->addr) = num; +#if DEBUG + pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n", + ptr->dev_attr.attr.name, num, num_fantrays); +#endif + return (count); + } + return (count); +} + +ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0; + char mask=0xFF; + char *pptr=NULL; + char bits[NAME_SIZE]; + struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da; + MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr); + memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf + bits_ptr->bits[strlen(buf)-1] = '\0'; + if((pptr=strstr(buf,":")) != NULL) { + len = pptr-buf; + sprintf(bits, buf); + bits[len] = '\0'; + rc1 = kstrtoint(bits, 16, &num1); + if (rc1 == 0) + { + sprintf(bits, ++pptr); + rc2 = kstrtoint(bits, 16, &num2); + if (rc2 == 0) + { + for (i=num2; i<=num1; i++) { + mask &= ~(1 << i); + } + bits_ptr->mask_bits = mask; + bits_ptr->pos = num2; + } + } + } else { + rc1 = kstrtoint(buf, 16, &num1); + if (rc1 == 0) + { + bits_ptr->mask_bits = mask & ~(1 << num1); + bits_ptr->pos = num1; + } + } +#if DEBUG + pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n", + ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos); +#endif + return (count); +} + +/************************************************************************** + * platform/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus); +PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data, + store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays); + +struct attribute* attrs_platform[]={ + &pddf_dev_platform_attr_num_psus.dev_attr.attr, + &pddf_dev_platform_attr_num_fantrays.dev_attr.attr, + NULL, +}; +struct attribute_group attr_group_platform={ + .attrs = attrs_platform, +}; + +/************************************************************************** + * led/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name); +PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype); +PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname); +PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index); +PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr); +PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset); +PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL, + dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data); + +struct attribute* attrs_dev[] = { + &pddf_dev_dev_attr_device_name.dev_attr.attr, + &pddf_dev_dev_attr_attr_devtype.dev_attr.attr, + &pddf_dev_dev_attr_attr_devname.dev_attr.attr, + &pddf_dev_dev_attr_index.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr.dev_attr.attr, + &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr, + &pddf_dev_dev_attr_dev_ops.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_dev = { + .attrs = attrs_dev, +}; + +/************************************************************************** + * state_attr/ attributes + **************************************************************************/ +#define LED_DEV_STATE_ATTR_GROUP(name, func) \ + PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \ + PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \ + store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \ + struct attribute* attrs_##name[]={ \ + &pddf_dev_##name##_attr_bits.dev_attr.attr, \ + &pddf_dev_##name##_attr_value.dev_attr.attr, \ + NULL, \ + }; \ + struct attribute_group attr_group_##name={ \ + .attrs = attrs_##name, \ + }; \ + + +LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0]) + +/************************************************************************** + * cur_state/ attributes + **************************************************************************/ +PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color); +PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data); +PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL); +PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data, + NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]); +PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]); +PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]); +PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]); +PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]); +PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]); +PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data, + store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]); + + +struct attribute* attrs_cur_state[] = { + &pddf_dev_cur_state_attr_color.dev_attr.attr, + &pddf_dev_cur_state_attr_sys_led.dev_attr.attr, + &pddf_dev_cur_state_attr_loc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fan_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr, + &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr, + NULL, +}; + +struct attribute_group attr_group_cur_state={ + .attrs = attrs_cur_state, +}; + +/*************************************************************************/ +#define KOBJ_FREE(obj) \ + if(obj) kobject_put(obj); \ + +void free_kobjs(void) +{ + KOBJ_FREE(cur_state_kobj) + KOBJ_FREE(state_attr_kobj) + KOBJ_FREE(led_kobj) + KOBJ_FREE(platform_kobj) +} + +int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child) +{ + if (parent) { + *child = kobject_create_and_add(name, parent); + } else { + printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name); + free_kobjs(); + return (-ENOMEM); + } + return (0); +} + +int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name) +{ + int status = sysfs_create_group(kobj, attr); + if(status) { + pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status); + } + return (status); +} + + +static int __init led_init(void) { + struct kobject *device_kobj; + pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + KBOJ_CREATE("platform", device_kobj, &platform_kobj); + KBOJ_CREATE("led", device_kobj, &led_kobj); + KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj); + KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj); + + LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform"); + LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev"); + LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr"); + LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state"); + return (0); +} + + +static void __exit led_exit(void) { + pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n"); + free_kobjs(); +} + +module_init(led_init); +module_exit(led_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("led driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c new file mode 100644 index 000000000000..2c93c36f3f42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c @@ -0,0 +1,634 @@ +/* +* +* Licensed under the GNU General Public License Version 2 +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +*/ + +/* +* pddf_xilinx_device_7021_algo.c +* Description: +* A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters +* +*********************************************************************************/ +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define DEBUG 0 + +enum { + STATE_DONE = 0, + STATE_INIT, + STATE_ADDR, + STATE_ADDR10, + STATE_START, + STATE_WRITE, + STATE_READ, + STATE_STOP, + STATE_ERROR, +}; + +#define XIIC_MSB_OFFSET 0 +#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET) + +/* + * Register offsets in bytes from RegisterBase. Three is added to the + * base offset to access LSB (IBM style) of the word + */ +#define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */ +#define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */ +#define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */ +#define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */ +#define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */ +#define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ +#define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ +#define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */ +#define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ +#define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */ + +/* Control Register masks */ +#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ +#define XIIC_CR_TX_FIFO_RESET_MASK 0x02 /* Transmit FIFO reset=1 */ +#define XIIC_CR_MSMS_MASK 0x04 /* Master starts Txing=1 */ +#define XIIC_CR_DIR_IS_TX_MASK 0x08 /* Dir of tx. Txing=1 */ +#define XIIC_CR_NO_ACK_MASK 0x10 /* Tx Ack. NO ack = 1 */ +#define XIIC_CR_REPEATED_START_MASK 0x20 /* Repeated start = 1 */ +#define XIIC_CR_GENERAL_CALL_MASK 0x40 /* Gen Call enabled = 1 */ + +/* Status Register masks */ +#define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */ +#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x02 /* 1=when addr as slave */ +#define XIIC_SR_BUS_BUSY_MASK 0x04 /* 1 = bus is busy */ +#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */ +#define XIIC_SR_TX_FIFO_FULL_MASK 0x10 /* 1 = Tx FIFO full */ +#define XIIC_SR_RX_FIFO_FULL_MASK 0x20 /* 1 = Rx FIFO full */ +#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x40 /* 1 = Rx FIFO empty */ +#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x80 /* 1 = Tx FIFO empty */ + +/* Interrupt Status Register masks Interrupt occurs when... */ +#define XIIC_INTR_ARB_LOST_MASK 0x01 /* 1 = arbitration lost */ +#define XIIC_INTR_TX_ERROR_MASK 0x02 /* 1=Tx error/msg complete */ +#define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ +#define XIIC_INTR_RX_FULL_MASK 0x08 /* 1=Rx FIFO/reg=OCY level */ +#define XIIC_INTR_BNB_MASK 0x10 /* 1 = Bus not busy */ +#define XIIC_INTR_AAS_MASK 0x20 /* 1 = when addr as slave */ +#define XIIC_INTR_NAAS_MASK 0x40 /* 1 = not addr as slave */ +#define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ + +/* The following constants specify the depth of the FIFOs */ +#define IIC_RX_FIFO_DEPTH 16 /* Rx fifo capacity */ +#define IIC_TX_FIFO_DEPTH 16 /* Tx fifo capacity */ + +/* + * Tx Fifo upper bit masks. + */ +#define XIIC_TX_DYN_START_MASK 0x0100 /* 1 = Set dynamic start */ +#define XIIC_TX_DYN_STOP_MASK 0x0200 /* 1 = Set dynamic stop */ + +/* + * The following constants define the register offsets for the Interrupt + * registers. There are some holes in the memory map for reserved addresses + * to allow other registers to be added and still match the memory map of the + * interrupt controller registers + */ +#define XIIC_IISR_OFFSET 0x20 /* Interrupt Status Register */ +#define XIIC_RESETR_OFFSET 0x40 /* Reset Register */ + +#define XIIC_RESET_MASK 0xAUL + +#define XIIC_PM_TIMEOUT 1000 /* ms */ +/* timeout waiting for the controller to respond */ +#define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) + +struct fpgalogic_i2c { + void __iomem *base; + u32 reg_shift; + u32 reg_io_width; + wait_queue_head_t wait; + struct i2c_msg *msg; + int pos; + int nmsgs; + int state; /* see STATE_ */ + int ip_clock_khz; + int bus_clock_khz; + void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value); + u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); + u32 timeout; + struct mutex lock; +}; +static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; +extern void __iomem * fpga_ctl_addr; +extern int (*ptr_fpgapci_read)(uint32_t); +extern int (*ptr_fpgapci_write)(uint32_t, uint32_t); +extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int); +static int xiic_reinit(struct fpgalogic_i2c *i2c); + +void i2c_get_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_lock(&i2c->lock); +} + +/** + * i2c_release_mutex - release mutex + */ +void i2c_release_mutex(struct fpgalogic_i2c *i2c) +{ + mutex_unlock(&i2c->lock); +} + +static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value) +{ + (void)iowrite32(value, i2c->base + reg); +} + +static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg) +{ + u32 ret; + + ret = ioread32(i2c->base + reg); + + return ret; +} + +static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask) +{ + u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); +} + +static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c) +{ + u8 sr; + unsigned long timeout; + + timeout = jiffies + XIIC_I2C_TIMEOUT; + for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + !(sr & XIIC_SR_RX_FIFO_EMPTY_MASK); + sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) { + xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + if (time_after(jiffies, timeout)) { + printk("Failed to clear rx fifo\n"); + return -ETIMEDOUT; + } + } + + return 0; +} + +/** + * Wait until something change in a given register + * @i2c: ocores I2C device instance + * @reg: register to query + * @mask: bitmask to apply on register value + * @val: expected result + * @timeout: timeout in jiffies + * + * Timeout is necessary to avoid to stay here forever when the chip + * does not answer correctly. + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int poll_wait(struct fpgalogic_i2c *i2c, + int reg, u8 mask, u8 val, + const unsigned long timeout) +{ + unsigned long j; + u8 status = 0; + + j = jiffies + timeout; + while (1) { + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, reg); + mutex_unlock(&i2c->lock); + if ((status & mask) == val) + break; + if (time_after(jiffies, j)) + return -ETIMEDOUT; + cpu_relax(); + cond_resched(); + } + return 0; +} + +/** + * Wait until is possible to process some data + * @i2c: ocores I2C device instance + * + * Used when the device is in polling mode (interrupts disabled). + * + * Return: 0 on success, -ETIMEDOUT on timeout + */ +static int ocores_poll_wait(struct fpgalogic_i2c *i2c) +{ + u8 mask = 0, status = 0; + int err = 0; + int val = 0; + int tmp = 0; + mutex_lock(&i2c->lock); + if (i2c->state == STATE_DONE) { + /* transfer is over */ + mask = XIIC_SR_BUS_BUSY_MASK; + } else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){ + /* on going transfer */ + if (0 == i2c->msg->len){ + mask = XIIC_INTR_TX_ERROR_MASK; + } else { + mask = XIIC_SR_TX_FIFO_FULL_MASK; + } + } + else if (i2c->state == STATE_READ){ + /* on going receive */ + mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK; + } + mutex_unlock(&i2c->lock); + // printk("Wait for: 0x%x\n", mask); + + /* + * once we are here we expect to get the expected result immediately + * so if after 50ms we timeout then something is broken. + */ + + if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { /* for i2cdetect I2C_SMBUS_QUICK mode*/ + err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50)); + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); + mutex_unlock(&i2c->lock); + if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */ + err = 0; + } else { + err = -ETIMEDOUT; + } + } + else { + if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50)); + mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK; + } + if (0 == err){ + err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50)); + } + mutex_lock(&i2c->lock); + status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + + if ((status & XIIC_INTR_ARB_LOST_MASK) || + ((status & XIIC_INTR_TX_ERROR_MASK) && + !(status & XIIC_INTR_RX_FULL_MASK) && + !(i2c->msg->flags & I2C_M_RD))) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */ + err = -ETIMEDOUT; + + if (status & XIIC_INTR_ARB_LOST_MASK) { + val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET); + tmp = XIIC_CR_MSMS_MASK; + val &=(~tmp); + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n", + __func__, XIIC_INTR_ARB_LOST_MASK); + } + if (status & XIIC_INTR_TX_ERROR_MASK) { + int sta = 0; + int cr = 0; + sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET); + cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET); + xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK); + printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n", + __func__, status, sta, cr); + } + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + (void)xiic_reinit(i2c); + mutex_unlock(&i2c->lock); + return err; + } + mutex_unlock(&i2c->lock); + } + + if (err) + printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n", + __func__, status); + return err; +} + +static void ocores_process(struct fpgalogic_i2c *i2c) +{ + struct i2c_msg *msg = i2c->msg; + //unsigned long flags; + u16 val; + + /* + * If we spin here because we are in timeout, so we are going + * to be in STATE_ERROR. See ocores_process_timeout() + */ + mutex_lock(&i2c->lock); + // printk("STATE: %d\n", i2c->state); + + if (i2c->state == STATE_START) { + i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; + /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ + if (i2c->state == STATE_READ){ + /* it's the last message so we include dynamic stop bit with length */ + val = msg->len | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + goto out; + } + } + if (i2c->state == STATE_READ){ + /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */ + if (msg->flags & I2C_M_RECV_LEN) { + msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + msg->flags &= ~I2C_M_RECV_LEN; + msg->buf[i2c->pos++] = msg->len; + } + else { + msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET); + } + } else if (i2c->state == STATE_WRITE){ + /* if it reaches the last byte data to be sent */ + if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){ + val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); + i2c->state = STATE_DONE; + goto out; + /* if it is not the last byte data to be sent */ + } else if (i2c->pos < msg->len) { + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]); + goto out; + } + } + + /* end of msg? */ + if (i2c->pos == msg->len) { + i2c->nmsgs--; + i2c->pos = 0; + if (i2c->nmsgs) { + i2c->msg++; + msg = i2c->msg; + if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{ + i2c->state = STATE_START; + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK); + goto out; + } + } else { /* end? */ + i2c->state = STATE_DONE; + goto out; + } + } + +out: + mutex_unlock(&i2c->lock); + return ; +} + + +static int fpgai2c_poll(struct fpgalogic_i2c *i2c, + struct i2c_msg *msgs, int num) +{ + int ret = 0; + // u8 ctrl; + + mutex_lock(&i2c->lock); + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); + + /* set i2c clock as 100Hz. */ + //xiic_setreg32(i2c, 0x13c, 0x7C); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret){ + mutex_unlock(&i2c->lock); + return ret; + } + + i2c->msg = msgs; + i2c->pos = 0; + i2c->nmsgs = num; + i2c->state = STATE_START; + + // printk("STATE: %d\n", i2c->state); + + if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */ + u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + xiic_irq_clr(i2c, status); + /* send out the 1st byte data and stop bit */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK); + } else { + /* send out the 1st byte data */ + xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK); + } + mutex_unlock(&i2c->lock); + while (1) { + int err; + + err = ocores_poll_wait(i2c); + if (err) { + i2c->state = STATE_ERROR; + break; + }else if (i2c->state == STATE_DONE){ + break; + } + ocores_process(i2c); + } + + return (i2c->state == STATE_DONE) ? num : -EIO; +} + +static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap); + int err = -EIO; + u8 retry = 0, max_retry = 0; + + if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */ + max_retry = 1; + else + max_retry = 5; // retry 5 times if receive a NACK or other errors + while( (-EIO == err) && (retry < max_retry)) + { + err = fpgai2c_poll(i2c, msgs, num); + retry++; + } + + return err; + +} + +static u32 fpgai2c_func(struct i2c_adapter *adap) +{ +/* a typical full-I2C adapter would use the following */ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm fpgai2c_algorithm= { + .master_xfer = fpgai2c_xfer, /*write I2C messages */ + .functionality = fpgai2c_func, /* what the adapter supports */ +}; + +static int xiic_reinit(struct fpgalogic_i2c *i2c) +{ + int ret; + int val = 0; + + /* Soft reset IIC controller. */ + xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); + + /* Set receive Fifo depth to maximum (zero based). */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); + + /* Reset Tx Fifo. */ + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); + + /* Enable IIC Device, remove Tx Fifo reset & disable general call. */ + val |= XIIC_CR_ENABLE_DEVICE_MASK; + //val |= XIIC_CR_TX_FIFO_RESET_MASK; + //val |= XIIC_CR_MSMS_MASK; + val |= XIIC_CR_DIR_IS_TX_MASK; + xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val); + + /* make sure RX fifo is empty */ + ret = xiic_clear_rx_fifo(i2c); + if (ret) + return ret; + + return 0; +} + +static int fpgai2c_init(struct fpgalogic_i2c *i2c) +{ + // int prescale; + // int diff; + // u8 ctrl; + int ret; + + + //i2c->reg_set = xiic_setreg32; + //i2c->reg_get = xiic_getreg32; + + ret = xiic_reinit(i2c); + if (ret < 0) { + printk("Cannot xiic_reinit\n"); + return ret; + } + + /* Initialize interrupt handlers if not already done */ + init_waitqueue_head(&i2c->wait); + return 0; +} + +static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index) +{ + struct fpgapci_devdata *pci_privdata = 0; + pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent); + + if (pci_privdata == 0) { + printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__); + return -1; + } +#if DEBUG + pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx" + " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d", + __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr, + pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr, + pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch); +#endif + if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) { + printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n", + __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS); + return -1; + } +#ifdef __STDC_LIB_EXT1__ + memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0])); +#else + memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0])); +#endif + + fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr + + i2c_ch_index* pci_privdata->fpga_i2c_ch_size; + mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); + + + adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; + i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]); + return 0; +} + +static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index) +{ + int ret = 0; + + adap_data_init(adap, i2c_ch_index); + adap->algo = &fpgai2c_algorithm; + + ret = i2c_add_numbered_adapter(adap); + return ret; +} + +/* + * FPGAPCI APIs + */ +int board_i2c_fpgapci_read(uint32_t offset) +{ + int data; + data=ioread32(fpga_ctl_addr+offset); + return data; +} + + +int board_i2c_fpgapci_write(uint32_t offset, uint32_t value) +{ + iowrite32(value, fpga_ctl_addr+offset); + return (0); +} + + +static int __init pddf_xilinx_device_7021_algo_init(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default; + ptr_fpgapci_read = board_i2c_fpgapci_read; + ptr_fpgapci_write = board_i2c_fpgapci_write; + return 0; +} + +static void __exit pddf_xilinx_device_7021_algo_exit(void) +{ + pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__); + + pddf_i2c_pci_add_numbered_bus = NULL; + ptr_fpgapci_read = NULL; + ptr_fpgapci_write = NULL; + return; +} + + +module_init (pddf_xilinx_device_7021_algo_init); +module_exit (pddf_xilinx_device_7021_algo_exit); +MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c new file mode 100644 index 000000000000..7f7f19068aa2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c @@ -0,0 +1,340 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * fpga-cls.c - front panel port control. + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h" + +#define XILINX_FPGA_VERSION 0x0000 +#define XILINX_FPGA_SCRATCH 0x0004 +#define XILINX_FPGA_REG_SIZE 0x2000 + + +/* + * fpga_priv - port fpga private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct fpga_priv { + void __iomem *base; + struct mutex fpga_lock; // For FPGA internal lock + void __iomem * fpga_read_addr; +}; + +extern void __iomem * fpga_ctl_addr; + +/** + * Show the value of the register set by 'set_fpga_reg_address' + * If the address is not set by 'set_fpga_reg_address' first, + * The version register is selected by default. + * @param buf register value in hextring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + // read data from the address + uint32_t data; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = ioread32(fpga->fpga_read_addr); + return sprintf(buf, "0x%8.8x\n", data); +} +/** + * Store the register address + * @param buf address wanted to be read value of + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t addr; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + addr = (uint32_t)strtoul(buf, &last, 16); + if (addr == 0 && buf == last) { + return -EINVAL; + } + fpga->fpga_read_addr = fpga->base + addr; + return count; +} +/** + * Show value of fpga scratch register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_SCRATCH) & 0xffffffff); +} +/** + * Store value of fpga scratch register + * @param buf scratch register value passing from user space + * @return number of bytes stored, or an error code + */ +static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + uint32_t data; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + data = (uint32_t)strtoul(buf, &last, 16); + if (data == 0 && buf == last) { + return -EINVAL; + } + iowrite32(data, fpga->base + XILINX_FPGA_SCRATCH); + return count; +} + +/** + * Show value of fpga version register + * @param buf register value in hexstring + * @return number of bytes read, or an error code + */ +static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct fpga_priv *fpga = dev_get_drvdata(dev); + + return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_VERSION) & 0xffffffff); +} + + +/** + * Store a value in a specific register address + * @param buf the value and address in format '0xhhhh 0xhhhhhhhh' + * @return number of bytes sent by user space, or an error code + */ +static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // register are 4 bytes + uint32_t addr; + uint32_t value; + uint32_t mode = 8; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + struct fpga_priv *fpga = dev_get_drvdata(dev); + + strscpy(clone, buf, count); + mutex_lock(&fpga->fpga_lock); + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + addr = (uint32_t)strtoul(tok, &last, 16); + if (addr == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + value = (uint32_t)strtoul(tok, &last, 16); + if (value == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + tok = strsep((char**)&pclone, " "); + if (tok == NULL) { + mode = 32; + } else { + mode = (uint32_t)strtoul(tok, &last, 10); + if (mode == 0 && tok == last) { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + } + if (mode == 32) { + iowrite32(value, fpga->base + addr); + } else if (mode == 8) { + iowrite8(value, fpga->base + addr); + } else { + mutex_unlock(&fpga->fpga_lock); + return -EINVAL; + } + mutex_unlock(&fpga->fpga_lock); + return count; +} + +/** + * Read all FPGA register in binary mode. + * @param buf Raw transceivers port startus and control register values + * @return number of bytes read, or an error code + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i = 0; + ssize_t status; + u8 read_reg; + struct device *dev = kobj_to_dev(kobj); + struct fpga_priv *fpga = dev_get_drvdata(dev); + + if ( off + count > XILINX_FPGA_REG_SIZE ) { + return -EINVAL; + } + mutex_lock(&fpga->fpga_lock); + while (i < count) { + read_reg = ioread8(fpga->base + off + i); + buf[i++] = read_reg; + } + status = count; + mutex_unlock(&fpga->fpga_lock); + return status; +} + + +/* FPGA attributes */ +static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address); +static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value); +static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch); +static DEVICE_ATTR( version, 0400, get_fpga_version, NULL); +static BIN_ATTR_RO( dump, XILINX_FPGA_REG_SIZE); + +static struct bin_attribute *fpga_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute *fpga_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_scratch.attr, + &dev_attr_version.attr, + &dev_attr_setreg.attr, + NULL, +}; + +static struct attribute_group fpga_attr_grp = { + .attrs = fpga_attrs, + .bin_attrs = fpga_bin_attrs, +}; + + +static int cls_fpga_probe(struct platform_device *pdev) +{ + + struct fpga_priv *fpga; + int ret = -ENOMEM; + + if (!fpga_ctl_addr){ + printk(KERN_WARNING, "fpga_ctl_addr is null"); + return ret; + } + + fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL); + if (!fpga){ + ret = -ENOMEM; + goto err_exit; + } + + mutex_init(&fpga->fpga_lock); + dev_set_drvdata(&pdev->dev, fpga); + fpga->base = fpga_ctl_addr; + + printk("FPGA version: 0x%x\n", ioread32(fpga->base + XILINX_FPGA_VERSION)); + + ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp); + if (ret != 0) { + printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n"); + goto err_remove_fpga; + } + + return 0; + +err_remove_fpga: + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); +mem_unmap: + iounmap(fpga->base); +err_exit: + return ret; + +} + +static int cls_fpga_remove(struct platform_device *pdev) +{ + struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev); + + sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp); + iounmap(fpga->base); + return 0; +} + +static void fpga_dev_release( struct device * dev) +{ + return; +} +static struct resource cls_fpga_resources[] = { + { + .start = NULL, + .end = NULL, + .flags = IORESOURCE_IO, + }, +}; + +static struct platform_device cls_fpga_dev = { + .name = "fpga_sysfs", + .id = -1, + .num_resources = ARRAY_SIZE(cls_fpga_resources), + .resource = cls_fpga_resources, + .dev = { + .release = fpga_dev_release, + } +}; + +static struct platform_driver cls_fpga_driver = { + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, + .driver = { + .name = "fpga_sysfs", + }, +}; + +static int __init drv_init(void) +{ + int rc = 0; + + rc = platform_device_register(&cls_fpga_dev); + rc += platform_driver_register(&cls_fpga_driver); + printk("fpga drv_init:%d\n", rc); + return rc; +} + +static void __exit drv_exit(void) +{ + platform_driver_unregister(&cls_fpga_driver); + platform_device_unregister(&cls_fpga_dev); + printk("fpga drv_exit.\n"); +} + +module_init(drv_init); +module_exit(drv_exit); + +MODULE_AUTHOR("Nicholas Wu"); +MODULE_DESCRIPTION("Celestica fpga control driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-fpga"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c new file mode 100644 index 000000000000..08a9831785c9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c @@ -0,0 +1,441 @@ +/* + * cpld_b .c - The CPLD driver for the Base Board of cloverstone + * The driver implement sysfs to access CPLD register on the baseboard of cloverstone via LPC bus. + * Copyright (C) 2018 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "sys_cpld" +/** + * CPLD register address for read and write. + */ +#define VERSION_ADDR 0xA100 +#define BMC_PRESENT_ADDR 0xA108 +#define SCRATCH_ADDR 0xA101 +#define SYS_LED_ADDR 0xA162 +#define CPLD_REGISTER_SIZE 0xFF + +struct cpld_b_data { + struct mutex cpld_lock; + uint16_t read_addr; +}; + +struct cpld_b_data *cpld_data; + +/** + * Read the value from scratch register as hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return sprintf(buf,"0x%2.2x\n", data); +} + +/** + * Set scratch register with specific hex string. + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned long data; + char *last; + + mutex_lock(&cpld_data->cpld_lock); + data = (uint16_t)strtoul(buf,&last,16); + if(data == 0 && buf == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + outb(data, SCRATCH_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(scratch); + + +/* CPLD version attributes */ +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + unsigned char value = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(VERSION_ADDR); + len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(version); + + +/* BMC Present Status */ +static ssize_t bmc_present_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + unsigned char value = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + value = inb(BMC_PRESENT_ADDR); + len = sprintf(buf, "%d\n", value & 0x0F); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RO(bmc_present); + + +static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + char *last; + + addr = (uint16_t)strtoul(buf,&last,16); + if(addr == 0 && buf == last){ + return -EINVAL; + } + cpld_data->read_addr = addr; + return count; +} + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + int len = 0; + // CPLD register is one byte + mutex_lock(&cpld_data->cpld_lock); + len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr)); + mutex_unlock(&cpld_data->cpld_lock); + return len; +} +static DEVICE_ATTR_RW(getreg); + +static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + // CPLD register is one byte + uint16_t addr; + uint8_t value; + char *tok; + char clone[count]; + char *pclone = clone; + char *last; + + strscpy(clone, buf, count); + + mutex_lock(&cpld_data->cpld_lock); + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + addr = (uint16_t)strtoul(tok,&last,16); + if(addr == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + tok = strsep((char**)&pclone, " "); + if(tok == NULL){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + value = (uint8_t)strtoul(tok,&last,16); + if(value == 0 && tok == last){ + mutex_unlock(&cpld_data->cpld_lock); + return -EINVAL; + } + + outb(value,addr); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_WO(setreg); + +/** + * Read all CPLD register in binary mode. + * @return number of byte read. + */ +static ssize_t dump_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + unsigned long i=0; + ssize_t status; + + mutex_lock(&cpld_data->cpld_lock); +begin: + if(i < count){ + buf[i++] = inb(VERSION_ADDR + off); + off++; + msleep(1); + goto begin; + } + status = count; +exit: + mutex_unlock(&cpld_data->cpld_lock); + return status; +} +static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE); + +/** + * Show system led status - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = data & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on"); +} + +/** + * Set the status of system led - on/off/1k/4k + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "4k")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "1k")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "on")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~(0x3); + data = data | led_status; + + /* if bit[5:4] is not configured to 01(green) or 10(yellow), + led will be off after set this filed */ + if(led_status == 0x00 && (0x0 == (data >> 4 & 0x3) || 0x3 == (data >> 4 & 0x3))){ + data = data & ~(0x3 << 4); + data = data | (0x01 << 4); /* set bit[5:4] to 01(green) defaultly */ + } else if(led_status == 0x01 || led_status == 0x02){ + data = data & ~(0x3 << 4); /* set bit[5:4] to 00(blink) defaultly */ + } + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led); + +/** + * Show system led color - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer for get value + * @return Hex string read from scratch register. + */ +static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + unsigned char data = 0; + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + data = (data >> 4) & 0x3; + return sprintf(buf, "%s\n", + data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both"); +} + +/** + * Set the color of system led - both/green/yellow/none + * @param dev kernel device + * @param devattr kernel device attribute + * @param buf buffer of set value + * @param count number of bytes in buffer + * @return number of bytes written, or error code < 0. + */ +static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + unsigned char led_status,data; + if(sysfs_streq(buf, "off")){ + led_status = 0x03; + }else if(sysfs_streq(buf, "yellow")){ + led_status = 0x02; + }else if(sysfs_streq(buf, "green")){ + led_status = 0x01; + }else if(sysfs_streq(buf, "both")){ + led_status = 0x00; + }else{ + count = -EINVAL; + return count; + } + mutex_lock(&cpld_data->cpld_lock); + data = inb(SYS_LED_ADDR); + data = data & ~( 0x3 << 4); + data = data | (led_status << 4); + outb(data, SYS_LED_ADDR); + mutex_unlock(&cpld_data->cpld_lock); + return count; +} +static DEVICE_ATTR_RW(sys_led_color); + +static struct attribute *cpld_b_attrs[] = { + &dev_attr_bmc_present.attr, + &dev_attr_version.attr, + &dev_attr_scratch.attr, + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_sys_led.attr, + &dev_attr_sys_led_color.attr, + NULL, +}; + +static struct bin_attribute *cpld_b_bin_attrs[] = { + &bin_attr_dump, + NULL, +}; + +static struct attribute_group cpld_b_attrs_grp = { + .attrs = cpld_b_attrs, + .bin_attrs = cpld_b_bin_attrs, +}; + +static struct resource cpld_b_resources[] = { + { + .start = 0xA100, + .end = 0xA1FF, + .flags = IORESOURCE_IO, + }, +}; + +static void cpld_b_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device cpld_b_dev = { + .name = DRIVER_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(cpld_b_resources), + .resource = cpld_b_resources, + .dev = { + .release = cpld_b_dev_release, + } +}; + +static int cpld_b_drv_probe(struct platform_device *pdev) +{ + struct resource *res; + int err = 0; + + cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data), + GFP_KERNEL); + if (!cpld_data) + return -ENOMEM; + + mutex_init(&cpld_data->cpld_lock); + + cpld_data->read_addr = VERSION_ADDR; + + res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (unlikely(!res)) { + printk(KERN_ERR "Specified Resource Not Available...\n"); + return -ENODEV; + } + + err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + if (err) { + printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n"); + return err; + } + return 0; +} + +static int cpld_b_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp); + return 0; +} + +static struct platform_driver cpld_b_drv = { + .probe = cpld_b_drv_probe, + .remove = __exit_p(cpld_b_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int cpld_b_init(void) +{ + // Register platform device and platform driver + platform_device_register(&cpld_b_dev); + platform_driver_register(&cpld_b_drv); + return 0; +} + +void cpld_b_exit(void) +{ + // Unregister platform device and platform driver + platform_driver_unregister(&cpld_b_drv); + platform_device_unregister(&cpld_b_dev); +} + +module_init(cpld_b_init); +module_exit(cpld_b_exit); + + +MODULE_AUTHOR("Celestica Inc."); +MODULE_DESCRIPTION("LPC CPLD baseboard driver"); +MODULE_VERSION("2.0.0"); +MODULE_LICENSE("GPL"); + diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c similarity index 85% rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c index 21ef0de9f31c..b26aabba64cd 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c @@ -37,29 +37,25 @@ #define WDT_CONTROL_BASE 0xA100 #define TEST_SCRATCH_REG 0xA101 -#define REBOOT_CAUSE_REG 0xA105 -#define WDT_SET_TIMER_H_BIT_REG 0xA161 -#define WDT_SET_TIMER_M_BIT_REG 0xA162 -#define WDT_SET_TIMER_L_BIT_REG 0xA163 -#define WDT_TIMER_H_BIT_REG 0xA164 -#define WDT_TIMER_M_BIT_REG 0xA165 -#define WDT_TIMER_L_BIT_REG 0xA166 -#define WDT_ENABLE_REG 0xA167 -#define WDT_FEED_REG 0xA168 -#define WDT_PUNCH_REG 0xA169 +#define REBOOT_CAUSE_REG 0xA106 +#define WDT_SET_TIMER_H_BIT_REG 0xA181 +#define WDT_SET_TIMER_M_BIT_REG 0xA182 +#define WDT_SET_TIMER_L_BIT_REG 0xA183 +#define WDT_TIMER_H_BIT_REG 0xA184 +#define WDT_TIMER_M_BIT_REG 0xA185 +#define WDT_TIMER_L_BIT_REG 0xA186 +#define WDT_ENABLE_REG 0xA187 +#define WDT_FEED_REG 0xA188 +#define WDT_PUNCH_REG 0xA189 #define WDT_START_FEED 0x01 #define WDT_STOP_FEED 0x00 -#define POWER_CYCLE_RESET 0x00 + #define POWER_ON_RESET 0x11 #define SOFT_SET_WARM_RESET 0x22 #define SOFT_SET_COLD_RESET 0x33 #define CPU_WARM_RESET 0x44 -#define CPU_COLD_RESET 0x55 -#define CPU_GPIO_WARM_RESET 0x66 -#define WDT_RESET 0x77 -#define CPU_OVERLOAD_RESET 0x88 -#define INSUFFICIENT_FAN_SPEED_RESET 0xAA +#define WDT_RESET 0x66 #define MAX_TIMER_VALUE 0xffffff @@ -84,10 +80,10 @@ struct wdt_data { struct cpld_wdt_private { struct platform_device *pdev; - struct watchdog_device wddev; + struct watchdog_device wddev; struct cdev cdev; - struct miscdevice mdev; - bool suspended; + struct miscdevice mdev; + bool suspended; struct wdt_data wdat; }; @@ -271,10 +267,10 @@ static const struct watchdog_info ident = { static ssize_t identity_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); if(!wdt) return -EINVAL; - return sprintf(buf, "%s\n", wdt->wdat.ident.identity); + return sprintf(buf, "%s\n", wdt->wdat.ident.identity); } static DEVICE_ATTR_RO(identity); @@ -283,12 +279,12 @@ static DEVICE_ATTR_RO(identity); static ssize_t state_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct cpld_wdt_private *wdt = dev_get_drvdata(dev); + struct cpld_wdt_private *wdt = dev_get_drvdata(dev); bool state = watchdog_is_running(wdt); if(true == state) return sprintf(buf, "active\n"); else - return sprintf(buf, "inactive\n"); + return sprintf(buf, "inactive\n"); } static DEVICE_ATTR_RO(state); @@ -309,11 +305,10 @@ static DEVICE_ATTR_RO(status); static ssize_t reason_show(struct device *dev, struct device_attribute *attr, char *buf) { - char bootstatus; + char bootstatus; struct cpld_wdt_private *wdt = dev_get_drvdata(dev); - if(!wdt) - return -EINVAL; - + if(!wdt) + return -EINVAL; bootstatus = watchdog_get_reason(wdt); return sprintf(buf, "0x%02x\n", bootstatus); @@ -344,7 +339,7 @@ static ssize_t timeout_show(struct device *dev, struct device_attribute *attr, unsigned int timeout; struct cpld_wdt_private *wdt = dev_get_drvdata(dev); if(!wdt) - return -EINVAL; + return -EINVAL; timeout = watchdog_get_timeout(wdt); @@ -371,7 +366,7 @@ static int watchdog_open(struct inode *inode, struct file *file) { struct cpld_wdt_private *wdt; - wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); + wdt = container_of(file->private_data, struct cpld_wdt_private, mdev); /* If the watchdog is alive we don't need to start it again */ @@ -384,15 +379,13 @@ static int watchdog_open(struct inode *inode, struct file *file) __module_get(THIS_MODULE); wdt->wdat.expect_close = 0; - - return nonseekable_open(inode, file); } static int watchdog_release(struct inode *inode, struct file *file) { struct cpld_wdt_private *p; - p = container_of(file->private_data, struct cpld_wdt_private, mdev); + p = container_of(file->private_data, struct cpld_wdt_private, mdev); if(!p) return -EINVAL; @@ -523,8 +516,7 @@ static long watchdog_ioctl(struct file *file, unsigned int cmd, new_timeout = new_timeout*1000; if (watchdog_set_timeout(p, new_timeout)) return -EINVAL; - - val = watchdog_get_timeout(p); + val = watchdog_get_timeout(p); return put_user(val, uarg.i); case WDIOC_GETTIMEOUT: val = watchdog_get_timeout(p); @@ -578,15 +570,12 @@ static int cpld_wdt_probe(struct platform_device *pdev) p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); if (!p) - return -ENOMEM; - - + return -ENOMEM; mutex_init(&(p->wdat.lock)); - - p->wdat.ident.options = WDIOC_SETTIMEOUT - | WDIOF_MAGICCLOSE - | WDIOF_KEEPALIVEPING - | WDIOC_GETTIMELEFT; + p->wdat.ident.options = WDIOC_SETTIMEOUT + | WDIOF_MAGICCLOSE + | WDIOF_KEEPALIVEPING + | WDIOC_GETTIMELEFT; snprintf(p->wdat.ident.identity, sizeof(p->wdat.ident.identity), "%s", DRV_NAME); @@ -597,13 +586,12 @@ static int cpld_wdt_probe(struct platform_device *pdev) pr_info("Watchdog CPLD Version:0x%02x\n", ver); - if (timeout) { - if (timeout <= 0 - || timeout > max_timeout) { + if (timeout) { + if (timeout <= 0 || timeout > max_timeout) { pr_err("starting timeout out of range\n"); err = -EINVAL; return err; - } + } //watchdog_start(p); @@ -617,68 +605,48 @@ static int cpld_wdt_probe(struct platform_device *pdev) if (nowayout) __module_get(THIS_MODULE); - pr_info("watchdog started with initial timeout of %u Second(s)\n", - timeout/1000); - } + pr_info("watchdog started with initial timeout of %u Second(s)\n", timeout/1000); + } err = watchdog_set_timeout(p, timeout); if (err) return err; - err = register_reboot_notifier(&watchdog_notifier); + err = register_reboot_notifier(&watchdog_notifier); if (err) return err; - p->mdev = watchdog_miscdev; - err = misc_register(&p->mdev); + p->mdev = watchdog_miscdev; + err = misc_register(&p->mdev); if (err) { - pr_err("cannot register miscdev on minor=%d\n", - watchdog_miscdev.minor); - return err;; - } - - /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE); - if (!p->wdat.res) - return -ENODEV; + pr_err("cannot register miscdev on minor=%d\n", watchdog_miscdev.minor); + return err; + } - if (!devm_request_region(dev, p->wdat.res->start, - resource_size(p->wdat.res), - pdev->name)) { - return -EBUSY; - } - */ err = sysfs_create_group(&pdev->dev.kobj, &wdt_group); - if (err) { - printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); - return err; - } + if (err) { + printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n"); + return err; + } - platform_set_drvdata(pdev, p); - dev_set_drvdata(dev, p); + platform_set_drvdata(pdev, p); + dev_set_drvdata(dev, p); - pr_info("initialized. sec (nowayout=%d)\n", - nowayout); + pr_info("initialized. sec (nowayout=%d)\n", + nowayout); return 0; } static int cpld_wdt_remove(struct platform_device *pdev) { - struct cpld_wdt_private *p = platform_get_drvdata(pdev); - /* - if (!nowayout) - watchdog_stop(&p->wddev); - */ - if(!p) - return 0; - + struct cpld_wdt_private *p = platform_get_drvdata(pdev); + + if (p) { sysfs_remove_group(&pdev->dev.kobj, &wdt_group); - misc_deregister(&p->mdev); - - unregister_reboot_notifier(&watchdog_notifier); - - return 0; - + unregister_reboot_notifier(&watchdog_notifier); + } + return 0; } static struct platform_driver cpld_wdt_driver = { @@ -722,14 +690,14 @@ static int __init cpld_wdt_init_module(void) pr_info("Platform Device/Driver Register Failed. err:%d\n", err); pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION); - return err; + return err; } static void __exit cpld_wdt_cleanup_module(void) { - platform_driver_unregister(&cpld_wdt_driver); + platform_driver_unregister(&cpld_wdt_driver); platform_device_unregister(&cpld_wdt_dev); - pr_info("Watchdog Module Unloaded\n"); + pr_info("Watchdog Module Unloaded\n"); } module_init(cpld_wdt_init_module); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h new file mode 100644 index 000000000000..cb6dbe29c0bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h @@ -0,0 +1,504 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_VIN_OFF BIT(3) +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 10 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, int page, int phase); +int pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); +int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); + +#endif /* PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c new file mode 100644 index 000000000000..338417125569 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c @@ -0,0 +1,478 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description of various APIs related to PSU component + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "pddf_psu_driver.h" + + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +/*#define PSU_DEBUG*/ +#ifdef PSU_DEBUG +#define psu_dbg(...) printk(__VA_ARGS__) +#else +#define psu_dbg(...) +#endif + + +void get_psu_duplicate_sysfs(int idx, char *str) +{ + switch (idx) + { + case PSU_V_OUT: + strscpy(str, "in3_input", ATTR_NAME_LEN); + break; + case PSU_I_OUT: + strscpy(str, "curr2_input", ATTR_NAME_LEN); + break; + case PSU_P_OUT: + strscpy(str, "power2_input", ATTR_NAME_LEN); + break; + case PSU_FAN1_SPEED: + strscpy(str, "fan1_input", ATTR_NAME_LEN); + break; + case PSU_TEMP1_INPUT: + strscpy(str, "temp1_input", ATTR_NAME_LEN); + break; + default: + break; + } + + return; +} + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) + { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL; + + + mutex_lock(&info->update_lock); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_set != NULL) + { + status = (sysfs_attr_data->pre_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_set != NULL) + { + status = (sysfs_attr_data->do_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_set != NULL) + { + status = (sysfs_attr_data->post_set)(client, udata, info); + if (status!=0) + dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + mutex_unlock(&info->update_lock); + + return 0; +} + + +int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata) +{ + int status = 0; + struct i2c_client *client = to_i2c_client(dev); + PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid) + { + dev_dbg(&client->dev, "Starting update for %s\n", data->name); + + sysfs_attr_data = udata->access_data; + if (sysfs_attr_data->pre_get != NULL) + { + status = (sysfs_attr_data->pre_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + if (sysfs_attr_data->do_get != NULL) + { + status = (sysfs_attr_data->do_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + + } + if (sysfs_attr_data->post_get != NULL) + { + status = (sysfs_attr_data->post_get)(client, udata, data); + if (status!=0) + dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status); + } + + data->last_updated = jiffies; + data->valid = 1; + } + + mutex_unlock(&data->update_lock); + return 0; +} + +ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i, status=0; + u16 value = 0; + u8 vout_mode = 0; + int exponent, mantissa; + int multiplier = 1000; + char new_str[ATTR_NAME_LEN] = ""; + PSU_SYSFS_ATTR_DATA *ptr = NULL; + + for (i=0;inum_attr;i++) + { + ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data; + get_psu_duplicate_sysfs(ptr->index , new_str); + if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 ) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + strscpy(new_str, "", ATTR_NAME_LEN); + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) + { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + psu_update_attr(dev, sysfs_attr_info, usr_data); + + switch(attr->index) + { + case PSU_PRESENT: + case PSU_POWER_GOOD: + status = sysfs_attr_info->val.intval; + return sprintf(buf, "%d\n", status); + break; + case PSU_MODEL_NAME: + case PSU_MFR_ID: + case PSU_SERIAL_NUM: + case PSU_FAN_DIR: + return sprintf(buf, "%s\n", sysfs_attr_info->val.strval); + break; + case PSU_V_OUT: + value = psu_get_v_out(client); + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + + case PSU_V_OUT_MIN: + case PSU_V_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + vout_mode = psu_get_vout_mode(client); + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + exponent = 0; + mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff); + + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_I_OUT: + case PSU_V_IN: + case PSU_I_IN: + case PSU_P_OUT_MAX: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + break; + case PSU_P_IN: + case PSU_P_OUT: + multiplier = 1000000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + case PSU_FAN1_SPEED: + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent)); + else + return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent)); + + break; + case PSU_TEMP1_INPUT: + case PSU_TEMP1_HIGH_THRESHOLD: + multiplier = 1000; + value = sysfs_attr_info->val.shortval; + exponent = two_complement_to_int(value >> 11, 5, 0x1f); + mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff); + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); + + break; + default: + printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname); + goto exit; + } + +exit: + return sprintf(buf, "%d\n", status); +} + + +ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct i2c_client *client = to_i2c_client(dev); + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data); + PSU_DATA_ATTR *usr_data = NULL; + struct psu_attr_info *sysfs_attr_info = NULL; + int i; + + for (i=0;inum_attr;i++) + { + if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0) + { + sysfs_attr_info = &data->attr_info[i]; + usr_data = &pdata->psu_attrs[i]; + } + } + + if (sysfs_attr_info==NULL || usr_data==NULL) { + printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name); + goto exit; + } + + switch(attr->index) + { + /*No write attributes for now in PSU*/ + default: + goto exit; + } + + psu_update_hw(dev, sysfs_attr_info, usr_data); + +exit: + return count; +} + +extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg); +int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0; + int val = 0; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + + + if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0) + { + val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset); + if (val < 0){ + return val; + } + padata->val.intval = ((val & adata->mask) == adata->cmpval); + psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval); + } + + return status; +} + +int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + char buf[32]=""; //temporary placeholder for block data + uint8_t offset = (uint8_t)adata->offset; + int data_len = adata->len; + + while (retry) + { + status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf); + if (unlikely(status<0)) + { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + buf[0] = '\0'; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + buf[data_len-1] = '\0'; + } + + if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0) + strscpy(padata->val.strval, buf+1, data_len-1); + else + strscpy(padata->val.strval, buf, data_len); + + psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval); + return 0; +} + +int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data) +{ + + int status = 0, retry = 10; + struct psu_attr_info *padata = (struct psu_attr_info *)data; + uint8_t offset = (uint8_t)adata->offset; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + padata->val.shortval = 0; + dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr); + } + else + { + padata->val.shortval = status; + } + + psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h new file mode 100644 index 000000000000..24e4ea02e7ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h @@ -0,0 +1,31 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver related api declarations + */ + +#ifndef __PDDF_PSU_API_H__ +#define __PDDF_PSU_API_H__ + +extern void get_psu_duplicate_sysfs(int idx, char *str); +extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf); +extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + +extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data); +extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h new file mode 100644 index 000000000000..60e81a9f5878 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h @@ -0,0 +1,90 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description: + * Platform PSU defines/structures header file + */ + +#ifndef __PDDF_PSU_DEFS_H__ +#define __PDDF_PSU_DEFS_H__ + + +#define MAX_NUM_PSU 5 +#define MAX_PSU_ATTRS 32 +#define ATTR_NAME_LEN 32 +#define STR_ATTR_SIZE 32 +#define DEV_TYPE_LEN 32 + +/* Each client has this additional data + */ + +typedef struct PSU_DATA_ATTR +{ + char aname[ATTR_NAME_LEN]; // attr name, taken from enum psu_sysfs_attributes + char devtype[DEV_TYPE_LEN]; // either a 'eeprom' or 'cpld', or 'pmbus' attribute + char devname[DEV_TYPE_LEN]; // Name of the device from where this sysfs attr is read + uint32_t devaddr; + uint32_t offset; + uint32_t mask; + uint32_t cmpval; + uint32_t len; + void *access_data; + +}PSU_DATA_ATTR; + +typedef struct PSU_SYSFS_ATTR_DATA +{ + int index; + unsigned short mode; + ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf); + int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data); + ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data); + int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data); + void *data; +} PSU_SYSFS_ATTR_DATA; + +typedef struct PSU_SYSFS_ATTR_DATA_ENTRY +{ + char name[ATTR_NAME_LEN]; + PSU_SYSFS_ATTR_DATA *a_ptr; +} PSU_SYSFS_ATTR_DATA_ENTRY; + + +/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */ +typedef struct PSU_DATA +{ + int idx; // psu index + int num_psu_fans; + PSU_DATA_ATTR psu_attr; + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; +}PSU_DATA; + +typedef struct PSU_PDATA +{ + int idx; // psu index + int num_psu_fans; // num of fans supported by the PSU + int len; // no of valid attributes for this psu client + PSU_DATA_ATTR *psu_attrs; +}PSU_PDATA; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c new file mode 100644 index 000000000000..fa5d31a0866a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c @@ -0,0 +1,398 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module driver for PSU + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h" +#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h" + + +static unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +struct pddf_ops_t pddf_psu_ops = { + .pre_init = NULL, + .post_init = NULL, + + .pre_probe = NULL, + .post_probe = NULL, + + .pre_remove = NULL, + .post_remove = NULL, + + .pre_exit = NULL, + .post_exit = NULL, +}; +EXPORT_SYMBOL(pddf_psu_ops); + + +PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_present); + +PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_model_name); + +PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_power_good); + +PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_mfr_id); + +PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_serial_num); + +PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan_dir); + +PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_min); + +PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out); + +PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_out_max); + +PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_fan1_speed_rpm); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_input); + +PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_temp1_high_threshold); + +PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_v_in); + +PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_i_in); + +PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL}; +EXPORT_SYMBOL(access_psu_p_in); + +PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]= +{ + { "psu_present", &access_psu_present}, + { "psu_model_name", &access_psu_model_name}, + { "psu_power_good" , &access_psu_power_good}, + { "psu_mfr_id" , &access_psu_mfr_id}, + { "psu_serial_num" , &access_psu_serial_num}, + { "psu_fan_dir" , &access_psu_fan_dir}, + { "psu_v_out" , &access_psu_v_out}, + { "psu_v_out_min" , &access_psu_v_out_min}, + { "psu_v_out_max" , &access_psu_v_out_max}, + { "psu_i_out" , &access_psu_i_out}, + { "psu_p_out" , &access_psu_p_out}, + { "psu_p_out_max" , &access_psu_p_out_max}, + { "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm}, + { "psu_temp1_input" , &access_psu_temp1_input}, + { "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold}, + { "psu_v_in" , &access_psu_v_in}, + { "psu_i_in" , &access_psu_i_in}, + { "psu_p_in" , &access_psu_p_in} +}; + +void *get_psu_access_data(char *name) +{ + int i=0; + for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++) + { + if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0) + { + return &psu_sysfs_attr_data_tbl[i]; + } + } + return NULL; +} +EXPORT_SYMBOL(get_psu_access_data); + + +static int psu_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct psu_data *data; + int status =0; + int i,num, j=0; + PSU_PDATA *psu_platform_data; + PSU_DATA_ATTR *data_attr; + PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry; + char new_str[ATTR_NAME_LEN] = ""; + + + if (client == NULL) { + printk("NULL Client.. \n"); + goto exit; + } + + if (pddf_psu_ops.pre_probe) + { + status = (pddf_psu_ops.pre_probe)(client, dev_id); + if (status != 0) + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { + status = -EIO; + goto exit; + } + + data = kzalloc(sizeof(struct psu_data), GFP_KERNEL); + if (!data) { + status = -ENOMEM; + goto exit; + } + + i2c_set_clientdata(client, data); + dev_info(&client->dev, "chip found\n"); + + /* Take control of the platform data */ + psu_platform_data = (PSU_PDATA *)(client->dev.platform_data); + num = psu_platform_data->len; + data->index = psu_platform_data->idx - 1; + data->num_psu_fans = psu_platform_data->num_psu_fans; + data->num_attr = num; + + + + /* Create and Add supported attr in the 'attributes' list */ + for (i=0; ipsu_attrs + i; + sysfs_data_entry = get_psu_access_data(data_attr->aname); + if (sysfs_data_entry == NULL) + { + printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname); + continue; + } + + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr; + strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN); + data->attr_info[i].valid = 0; + mutex_init(&data->attr_info[i].update_lock); + + /*Create a duplicate entry*/ + get_psu_duplicate_sysfs(dy_ptr->index, new_str); + if (strcmp(new_str,"")) + { + dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL); + dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1]; + strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN); + dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode; + dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show; + dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store; + dy_ptr->index = sysfs_data_entry->a_ptr->index; + + data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr; + j++; + strscpy(new_str,"", ATTR_NAME_LEN); + } + } + data->psu_attribute_list[i+j] = NULL; + data->psu_attribute_group.attrs = data->psu_attribute_list; + + /* Register sysfs hooks */ + status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group); + if (status) { + goto exit_free; + } + + data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + dev_info(&client->dev, "%s: psu '%s'\n", + dev_name(data->hwmon_dev), client->name); + + /* Add a support for post probe function */ + if (pddf_psu_ops.post_probe) + { + status = (pddf_psu_ops.post_probe)(client, dev_id); + if (status != 0) + goto exit_remove; + } + + return 0; + + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); +exit_free: + /* Free all the allocated attributes */ + for (i=0;data->psu_attribute_list[i]!=NULL;i++) + { + struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + } + kfree(data); +exit: + return status; +} + +static void psu_remove(struct i2c_client *client) +{ + int i=0, ret = 0; + struct psu_data *data = i2c_get_clientdata(client); + PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata() + PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs; + struct sensor_device_attribute *ptr = NULL; + + if (pddf_psu_ops.pre_remove) + { + ret = (pddf_psu_ops.pre_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN pre_remove function failed\n"); + } + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group); + for (i=0; data->psu_attribute_list[i]!=NULL; i++) + { + ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i]; + kfree(ptr); + data->psu_attribute_list[i] = NULL; + } + pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__); + kfree(data); + if (platdata_sub) { + printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__); + kfree(platdata_sub); + } + if (platdata) { + printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__); + kfree(platdata); + } + + if (pddf_psu_ops.post_remove) + { + ret = (pddf_psu_ops.post_remove)(client); + if (ret!=0) + printk(KERN_ERR "FAN post_remove function failed\n"); + } +} + +enum psu_intf +{ + eeprom_intf, + smbus_intf +}; + +static const struct i2c_device_id psu_id[] = { + {"psu_eeprom", eeprom_intf}, + {"psu_pmbus", smbus_intf}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, psu_id); + +static struct i2c_driver psu_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "psu", + }, + .probe = psu_probe, + .remove = psu_remove, + .id_table = psu_id, + .address_list = normal_i2c, +}; + +int example_fun(void) +{ + pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n"); + return 0; +} +EXPORT_SYMBOL(example_fun); + + +int psu_init(void) +{ + int status = 0; + + if (pddf_psu_ops.pre_init) + { + status = (pddf_psu_ops.pre_init)(); + if (status!=0) + return status; + } + + pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n"); + status = i2c_add_driver(&psu_driver); + if (status!=0) + return status; + + if (pddf_psu_ops.post_init) + { + status = (pddf_psu_ops.post_init)(); + if (status!=0) + return status; + } + + return status; +} +EXPORT_SYMBOL(psu_init); + +void psu_exit(void) +{ + pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n"); + if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)(); + i2c_del_driver(&psu_driver); + if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)(); +} +EXPORT_SYMBOL(psu_exit); + +module_init(psu_init); +module_exit(psu_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("psu driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h new file mode 100644 index 000000000000..a94cf7441dbc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h @@ -0,0 +1,70 @@ +/* + * Copyright 2019 Broadcom. + * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * Description + * PSU driver data structures + */ +#ifndef __PDDF_PSU_DRIVER_H__ +#define __PDDF_PSU_DRIVER_H__ + +enum psu_sysfs_attributes { + PSU_PRESENT, + PSU_MODEL_NAME, + PSU_POWER_GOOD, + PSU_MFR_ID, + PSU_SERIAL_NUM, + PSU_FAN_DIR, + PSU_V_OUT, + PSU_V_OUT_MIN, + PSU_V_OUT_MAX, + PSU_I_OUT, + PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */ + PSU_P_OUT_MAX, + PSU_FAN1_SPEED, + PSU_TEMP1_INPUT, + PSU_TEMP1_HIGH_THRESHOLD, + PSU_V_IN, + PSU_I_IN, + PSU_P_IN, + PSU_ATTR_MAX +}; + + +/* Every client has psu_data which is divided into per attribute data */ +struct psu_attr_info { + char name[ATTR_NAME_LEN]; + struct mutex update_lock; + char valid; /* !=0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ + u8 status; + union { + char strval[STR_ATTR_SIZE]; + int intval; + u16 shortval; + u8 charval; + }val; +}; +struct psu_data { + struct device *hwmon_dev; + u8 index; + int num_psu_fans; + int num_attr; + struct attribute *psu_attribute_list[MAX_PSU_ATTRS]; + struct attribute_group psu_attribute_group; + struct psu_attr_info attr_info[MAX_PSU_ATTRS]; +}; + + +#endif diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c new file mode 100644 index 000000000000..3709503e621e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c @@ -0,0 +1,133 @@ +/* + * Hardware monitoring driver for Texas Instruments TPS536C7 + * + * Copyright (c) 2017 Mellanox Technologies. All rights reserved. + * Copyright (c) 2017 Vadim Pasternak + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include "pmbus.h" + + +#define TPS536C7_PROT_VR12_5MV 0x01 /* VR12.0 mode, 5-mV DAC */ +#define TPS536C7_PROT_VR12_5_10MV 0x02 /* VR12.5 mode, 10-mV DAC */ +#define TPS536C7_PROT_VR13_10MV 0x04 /* VR13.0 mode, 10-mV DAC */ +#define TPS536C7_PROT_IMVP8_5MV 0x05 /* IMVP8 mode, 5-mV DAC */ +#define TPS536C7_PROT_VR13_5MV 0x07 /* VR13.0 mode, 5-mV DAC */ +#define TPS536C7_PAGE_NUM 1 + +static int tps536c7_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + u8 buf[I2C_SMBUS_BLOCK_MAX]; + int phases_a = 0, phases_b = 0; + int i, ret; + + + return 1; + + ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf); + if (ret < 0) + return ret; + + dev_err(&client->dev, "jjj device ID: %s\n", buf); + if (strncmp("TI\x53\x6C\x70", buf, 5)) { + dev_err(&client->dev, "Unexpected device ID: %s\n", buf); + return -ENODEV; + } + #if 0 + ret = i2c_smbus_read_block_data(client, TPS53676_USER_DATA_03, buf); + if (ret < 0) + return ret; + for (i = 0; i < 2 * TPS53676_MAX_PHASES; i += 2) { + if (buf[i + 1] & 0x80) { + if (buf[i] & 0x08) + phases_b++; + else + phases_a++; + } + } + + info->format[PSC_VOLTAGE_OUT] = linear; + info->pages = 1; + info->phases[0] = phases_a; + if (phases_b > 0) { + info->pages = 2; + info->phases[1] = phases_b; + } + #endif + + return 0; +} + +static struct pmbus_driver_info tps536c7_info = { + .pages = TPS536C7_PAGE_NUM, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = linear, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT, + .identify = tps536c7_identify, +}; + +static int tps536c7_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct pmbus_driver_info *info; + + info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + memcpy(info, &tps536c7_info, sizeof(*info)); + + //return pmbus_do_probe(client, id, info); + return pmbus_do_probe(client, info); +} + +static const struct i2c_device_id tps536c7_id[] = { + {"tps536c7", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, tps536c7_id); + +static const struct of_device_id tps536c7_of_match[] = { + {.compatible = "ti,tps536c7"}, + {} +}; +MODULE_DEVICE_TABLE(of, tps536c7_of_match); + +static struct i2c_driver tps536c7_driver = { + .driver = { + .name = "tps536c7", + .of_match_table = of_match_ptr(tps536c7_of_match), + }, + .probe = tps536c7_probe, + //.remove = pmbus_do_remove, + .id_table = tps536c7_id, +}; + +module_i2c_driver(tps536c7_driver); + +MODULE_AUTHOR("Vadim Pasternak "); +MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS536C7"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py new file mode 100644 index 000000000000..34b109b5bbfd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py @@ -0,0 +1,27 @@ +import os +from setuptools import setup +os.listdir + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on Celestica Platforms based on PDDF', + license='Apache 2.0', + author='SONiC Team', + author_email='yajiang@celestica.com', + url='https://github.com/Azure/sonic-buildimage', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.9', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py new file mode 100644 index 000000000000..21d9cd445e31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal"] +from . import platform +from . import chassis diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py new file mode 100644 index 000000000000..747b35aabd4c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py @@ -0,0 +1,234 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/22 15:37 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +try: + import sys + import time + import syslog + import subprocess + import os + import re + import shutil + from . import helper + from . import component + from .watchdog import Watchdog + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() + +REBOOT_CAUSE_PATH = "/sys/devices/platform/cpld_wdt/reason" +SET_SYS_STATUS_LED = "0x3A 0x39 0x02 0x00 {}" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + sfp_status_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + self.helper = helper.APIHelper() + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._watchdog = None + self._airflow_direction = None + + for port_idx in range(1, self.platform_inventory['num_ports'] + 1): + present = self.get_sfp(port_idx).get_presence() + self.sfp_status_dict[port_idx] = '1' if present else '0' + for index in range(self.platform_inventory['num_component']): + component_obj = component.Component(index) + self._component_list.append(component_obj) + + @staticmethod + def _getstatusoutput(cmd): + status = 0 + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = ret + if data[-1:] == '\n': + data = data[:-1] + + return status, data + + @staticmethod + def initizalize_system_led(): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def set_status_led(self, color): + if color == self.get_status_led(): + return False + + if BMC_EXIST: + sys_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'amber_blink_1hz': '03', + 'amber_blink_4hz': '04', + 'green_blink_1hz': '05', + 'green_blink_4hz': '06', + 'alternate_blink_1hz': '07', + 'alternate_blink_4hz': '08' + } + color_val = sys_led_color_map.get(color.lower(), None) + if color_val is None: + print("SYS LED color %s not support!" % color) + return False + + status, _ = self.helper.ipmi_raw(SET_SYS_STATUS_LED.format(color_val)) + + return status + else: + result = self.set_system_led("SYS_LED", color) + return result + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + For Quanta the index in sfputil.py starts from 1, so override + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + if index == 0: + raise IndexError + sfp = self._sfp_list[index - 1] + except IndexError: + sys.stderr.write("override: SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + + return sfp + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + REBOOT_CAUSE_POWER_LOSS = "Power Loss" + REBOOT_CAUSE_THERMAL_OVERLOAD_CPU = "Thermal Overload: CPU" + REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC = "Thermal Overload: ASIC" + REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER = "Thermal Overload: Other" + REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED = "Insufficient Fan Speed" + REBOOT_CAUSE_WATCHDOG = "Watchdog" + REBOOT_CAUSE_HARDWARE_OTHER = "Hardware - Other" + REBOOT_CAUSE_NON_HARDWARE = "Non-Hardware" + """ + reboot_cause = self.helper.read_txt_file(REBOOT_CAUSE_PATH) or "Unknown" + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + reboot_cause_description = { + '0x11': (self.REBOOT_CAUSE_POWER_LOSS, "Power on Reset"), + '0x22': (self.REBOOT_CAUSE_NON_HARDWARE, "Soft-set CPU warm reset"), + '0x33': (self.REBOOT_CAUSE_HARDWARE_OTHER, "CPU cold reset"), + '0x44': (self.REBOOT_CAUSE_NON_HARDWARE, "CPU warm reset"), + '0x66': (self.REBOOT_CAUSE_WATCHDOG, "Hardware Watchdog Reset"), + + } + prev_reboot_cause = reboot_cause_description.get(reboot_cause, + (self.REBOOT_CAUSE_NON_HARDWARE, "Unknown reason")) + return prev_reboot_cause + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + try: + + if self._watchdog is None: + # Create the watchdog Instance + self._watchdog = Watchdog() + except Exception as E: + syslog.syslog(syslog.LOG_ERR, "Fail to load watchdog due to {}".format(E)) + return self._watchdog + + def get_change_event(self, timeout=0): + sfp_dict = {} + + sfp_removed = '0' + sfp_inserted = '1' + + sfp_present = True + sfp_absent = False + + start_time = time.time() + time_period = timeout / float(1000) # Convert msecs to secss + + while time.time() < (start_time + time_period) or timeout == 0: + for port_idx in range(1, self.platform_inventory['num_ports'] + 1): + if self.sfp_status_dict[port_idx] == sfp_removed and \ + self.get_sfp(port_idx).get_presence() == sfp_present: + sfp_dict[port_idx] = sfp_inserted + self.sfp_status_dict[port_idx] = sfp_inserted + elif self.sfp_status_dict[port_idx] == sfp_inserted and \ + self.get_sfp(port_idx).get_presence() == sfp_absent: + sfp_dict[port_idx] = sfp_removed + self.sfp_status_dict[port_idx] = sfp_removed + + if sfp_dict: + return True, {'sfp': sfp_dict} + + time.sleep(0.5) + + return True, {'sfp': {}} # Timeout + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # either 0xfb or 0xbf + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py new file mode 100644 index 000000000000..3ce7e20fb0b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py @@ -0,0 +1,230 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/21 17:09 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_base.component_base import ComponentBase + from . import helper + import re +except ImportError as e: + raise ImportError(str(e) + "- required module not found") +BMC_EXIST = helper.APIHelper().get_bmc_status() +FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version" +Bios_Version_Cmd = "dmidecode -t bios | grep Version" +ONIE_Version_Cmd = "cat /host/machine.conf" +SSD_Version_Cmd = "smartctl -i /dev/sda" +ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" + +if BMC_EXIST: + Check_Bios_Boot = "ipmitool raw 0x3a 0x25 0x02" + Fan_CPLD_Cmd = "ipmitool raw 0x3a 0x64 02 01 00" + COME_CPLD_Cmd = "ipmitool raw 0x3a 0x3e 1 0x1a 1 0xe0" + Sys_Cpld_Cmd = "ipmitool raw 0x3a 0x64 0x00 0x01 0x00" + Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0 | tr a-z A-Z | cut -d 'X' -f 2" + Main_BMC_Cmd = "0x32 0x8f 0x08 0x01" + Backup_BMC_Cmd = "0x32 0x8f 0x08 0x01" + + COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "CPLD FAN", "ASIC PCIe", "SSD"] + COMPONENT_DES_LIST = ["Basic Input/Output system", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32) SFP(33-34)", + "CPLD for fan control and status", + "ASIC PCIe Firmware", + "Solid State Drive"] +else: + Check_Bios_Boot = "i2cget -y -f 100 0x0d 0x70 | tr a-z A-Z | cut -d 'X' -f 2" + Fan_CPLD_Cmd = "i2cget -y -f 107 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + COME_CPLD_Cmd = "i2cget -y -f 104 0x0d 0xe0 | tr a-z A-Z | cut -d 'X' -f 2" + Sys_Cpld_Cmd = "i2cget -y -f 100 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0x00 | tr a-z A-Z | cut -d 'X' -f 2" + + COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE", + "CPLD SW1", "CPLD SW2", "CPLD FAN", "SSD"] + + COMPONENT_DES_LIST = ["Basic Input/Output system", + "Open Network Install Environment", + "Baseboard Management Controller", + "FPGA for transceiver EEPROM access and other component I2C access", + "COMe board CPLD", + "CPLD for board functions and watchdog", + "CPLD for port control QSFP(1-16)", + "CPLD for port control QSFP(17-32) SFP(33-34)", + "CPLD for fan control and status", + "Solid State Drive"] + + + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + ComponentBase.__init__(self) + self.index = component_index + self.helper = helper.APIHelper() + self.name = self.get_name() + + def __get_bios_version(self): + """ + Get Bios version by command 'dmidecode -t bios | grep Version' + return: Bios Version + """ + status, result = self.helper.run_command(Check_Bios_Boot) + bios_version = "N/A" + if not status: + print("Fail! Unable to get the current Main bios or backup bios!") + return bios_version + status_ver, version_str = self.helper.run_command(Bios_Version_Cmd) + if not status: + print("Fail! Unable to get the bios version!") + return bios_version + + bios_version = re.findall(r"Version:(.*)", version_str)[0] + if result.strip() == "01" and self.name == "BIOS": + return bios_version.strip() + + elif result.strip() == "03" and self.name == "BIOS": + return bios_version.strip() + else: + return "N/A" + + def __get_onie_version(self): + """ + Get ONIE Version" + """ + onie_version = "N/A" + status, raw_onie_data = self.helper.run_command(ONIE_Version_Cmd) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_version = ret.group(0) + return onie_version + + def __get_cpld_version(self): + """ + Get Come cpld/Fan cpld/Sys cpld/Switch 1 cpld/Switch 2 cpld version + """ + version = "N/A" + cpld_version_dict = { + "CPLD COMe": COME_CPLD_Cmd, + "CPLD FAN": Fan_CPLD_Cmd, + "CPLD SW1": Sw_Cpld1_Cmd, + "CPLD SW2": Sw_Cpld2_Cmd, + "CPLD BASE": Sys_Cpld_Cmd, + } + if self.name in cpld_version_dict.keys(): + version_cmd = cpld_version_dict[self.name] + status, ver = self.helper.run_command(version_cmd) + if not status: + print("Fail! Can't get %s version by command:%s" % (self.name, version_cmd)) + return version + version1 = int(ver.strip()) / 10 + version2 = int(ver.strip()) % 10 + version = "%d.%d" % (version1, version2) + return version + + def __get_fpga_version(self): + """ + Get fpga version by fpga version bus path. + """ + status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH) + if not status: + return "N/A" + return fpga_version.replace("0x", "") + + def __get_bmc_version(self): + """ + Get main/backup bmc version + """ + version = "N/A" + cmd = Main_BMC_Cmd if self.name == "Main_BMC" else Backup_BMC_Cmd + status, result = self.helper.ipmi_raw(cmd) + if not status: + print("Fail! Can't get the %s version by command:%s" % (self.name, cmd)) + return version + str_1 = str(int(result.strip().split(" ")[0])) + str_2 = str(int(result.strip().split(" ")[1], 16)) + version = "%s.%s" % (str_1, str_2) + return version + + def __get_asic_pcie_ver(self): + status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD) + if status: + return raw_ver + else: + return "N/A" + + def __get_ssd_version(self): + ssd_version = "N/A" + status, raw_ssd_data = self.helper.run_command(SSD_Version_Cmd) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_version = ret.group(1) + return ssd_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_NAME_LIST[self.index] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_DES_LIST[self.index] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if "BIOS" in self.name: + fw_version = self.__get_bios_version() + elif "ONIE" in self.name: + fw_version = self.__get_onie_version() + elif "CPLD" in self.name: + fw_version = self.__get_cpld_version() + elif self.name == "FPGA": + fw_version = self.__get_fpga_version() + elif "BMC" in self.name: + fw_version = self.__get_bmc_version() + elif self.name == "ASIC PCIe": + fw_version = self.__get_asic_pcie_ver() + elif "SSD" in self.name: + fw_version = self.__get_ssd_version() + return fw_version + + @staticmethod + def install_firmware(image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + return False + + @staticmethod + def update_firmware(image_path): + # Not support + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py new file mode 100644 index 000000000000..838328e321be --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py @@ -0,0 +1,78 @@ +try: + import os + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin' + +class Eeprom(PddfEeprom): + _TLV_DISPLAY_VENDOR_EXT = True + _TLV_INFO_MAX_LEN = 256 + pddf_obj = {} + plugin_data = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + if not pddf_data or not pddf_plugin_data: + raise ValueError('PDDF JSON data error') + + self.pddf_obj = pddf_data + self.plugin_data = pddf_plugin_data + + # system EEPROM always has device name EEPROM1 + self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom") + if self.eeprom_path is None: + return + + super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'rb') as b_fd: + self.eeprom_data = bytearray(b_fd.read()) + else: + self.eeprom_data = self.read_eeprom() + with open(EEPROM_TMP_FILE, 'wb') as b_fd: + b_fd.write(self.eeprom_data) + os.chmod(EEPROM_TMP_FILE, 0o444) + except Exception as E: + self.eeprom_data = "N/A" + raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(E))) + else: + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + return + + total_length = ((eeprom[9]) << 8) | (eeprom[10]) + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + (eeprom[tlv_index + 1])] + code = "0x%02X" % tlv[0] + + if (tlv[0]) == self._TLV_CODE_VENDOR_EXT: + name = "Vendor Extension" + value = "" + if self._TLV_DISPLAY_VENDOR_EXT: + for c in tlv[2:2 + tlv[1]]: + value += "0x%02X " % c + else: + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32: + break + + tlv_index += (eeprom[tlv_index + 1]) + 2 + + def get_revision(self): + return self.eeprom_tlv_dict.get('0x26', 'N/A') + + def get_vendor_extn(self): + return self.eeprom_tlv_dict.get('0xFD', 'N/A') diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py new file mode 100644 index 000000000000..ad90dfdf7b20 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py @@ -0,0 +1,93 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/21 16:36 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from . import helper + import re +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() +Fan_Direction_Cmd = "0x3a 0x62 {}" +SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}" + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + self.helper = helper.APIHelper() + + def get_presence(self): + """ + Retrieves the presence of fan + """ + return super().get_presence() + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + return 15 if "PSU" in self.get_name() else 25 + + def is_under_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_min_th = target_speed * (1 - float(speed_tolerance) / 100) + if speed < speed_min_th: + return True + else: + return False + + def is_over_speed(self): + speed = float(self.get_speed()) + target_speed = float(self.get_target_speed()) + speed_tolerance = self.get_speed_tolerance() + + speed_max_th = target_speed * (1 + float(speed_tolerance) / 100) + if speed > speed_max_th: + return True + else: + return False + + def set_status_led(self,color): + if self.is_psu_fan: + return super().set_status_led(color) + + if color == self.get_status_led(): + return False + + if BMC_EXIST: + fan_led_color_map = { + 'off': '00', + 'green': '01', + 'amber': '02', + 'red': '02' + } + + fan_index_val = hex(self.fantray_index + 3) + + color_val = fan_led_color_map.get(color.lower(), None) + + if fan_index_val is None: + return False + + if color_val is None: + return False + + status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val)) + + return status + else: + return self.set_system_led("SYS_LED", color) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..babf6580ae3b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/2/18 15:45 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py new file mode 100644 index 000000000000..94783ed18ac5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py @@ -0,0 +1,143 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/2/28 plugins:10 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +import os +import json +import struct +import subprocess +from sonic_py_common import device_info +from mmap import * + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(object): + + def __init__(self): + (self.platform, self.hwsku) = device_info.get_platform_and_hwsku() + + @staticmethod + def is_host(): + return os.system(HOST_CHK_CMD) == 0 + + @staticmethod + def pci_get_value(resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except Exception: + status = False + return status, result + + @staticmethod + def run_command(cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + @staticmethod + def run_interactive_command(cmd): + try: + subprocess.call(cmd) + except: + return False + return True + + @staticmethod + def read_txt_file(file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + @staticmethod + def read_one_line_file(file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + @staticmethod + def write_txt_file(file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception as E: + print(str(E)) + return False + return True + + def get_cpld_reg_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + status, result = self.run_command(cmd) + return result if status else None + + @staticmethod + def ipmi_raw(cmd): + status = True + result = "" + cmd = "ipmitool raw {}".format(str(cmd)) + ret, raw_data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = raw_data + return status, result + + @staticmethod + def ipmi_fru_id(key_id, key=None): + status = True + result = "" + cmd = "ipmitool fru print {}".format(str( + key_id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(key_id), str(key)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + return status, result + + @staticmethod + def ipmi_set_ss_thres(id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + return status, result + + @staticmethod + def get_bmc_status(): + """ + get bmc present by pddf-device.json + return: True(present), False(absent) + """ + pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' + with open(pddf_device_path) as f: + json_data = json.load(f) + bmc_present = json_data["PLATFORM"]["bmc_present"] + return True if bmc_present == "True" else False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py new file mode 100644 index 000000000000..8595e80692df --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py @@ -0,0 +1,23 @@ +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py new file mode 100644 index 000000000000..033307568b31 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py @@ -0,0 +1,46 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/20 13:46 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + import re + import os + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self.helper = helper.APIHelper() + if BMC_EXIST: + from . import sensor_list_config + if not os.path.exists(sensor_list_config.Sensor_List_Info): + cmd = "ipmitool sensor list > %s" % sensor_list_config.Sensor_List_Info + self.helper.run_command(cmd) + + @staticmethod + def get_capacity(): + return 550 + + @staticmethod + def get_type(): + return 'AC' + + @staticmethod + def get_revision(): + """ + Get PSU HW Revision by read psu eeprom data. + return: HW Revision or 'N/A' + """ + return "N/A" + + + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py new file mode 100644 index 000000000000..8c75e5480a73 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py @@ -0,0 +1,11 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/4/13 9:29 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +# The path of sensor list information file +Sensor_List_Info = "/tmp/sensor_info.log" + +# The Sensor list information refresh interval +Sensor_Info_Update_Period_Secs = 60 diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py new file mode 100644 index 000000000000..89af6f6de14b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python + +try: + import ast + from sonic_platform_pddf_base.pddf_sfp import PddfSfp + from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + + def get_presence(self): + presence = PddfSfp.get_presence(self) + if not presence and self._xcvr_api != None: + self._xcvr_api = None + + return presence + + def get_xcvr_api(self): + if self._xcvr_api is None and self.get_presence(): + self.refresh_xcvr_api() + + # Find and update the right optoe driver + api_to_driver_map = {\ + 'Sff8636Api': 'optoe1',\ + 'Sff8472Api': 'optoe2',\ + 'CmisApi': 'optoe3',\ + 'CCmisApi': 'optoe3',\ + 'Sff8436Api': 'sff8436'\ + } + create_dev = False + path_list = self.eeprom_path.split('/') + name_path = '/'.join(path_list[:-1]) + '/name' + del_dev_path = '/'.join(path_list[:-2]) + '/delete_device' + new_dev_path = '/'.join(path_list[:-2]) + '/new_device' + api_name = type(self._xcvr_api).__name__ + new_driver = api_to_driver_map.get(api_name, 'optoe1') + + try: + with open(name_path, 'r') as fd: + cur_driver = fd.readline().strip() + except FileNotFoundError: + create_dev = True + else: + if cur_driver != new_driver: + with open(del_dev_path, 'w') as fd: + fd.write("0x50") + create_dev = True + + if create_dev: + with open(new_dev_path, 'w') as fd: + fd.write("{} 0x50".format(new_driver)) + + if api_name == 'Sff8636Api' or \ + api_name == 'Sff8436Api': + self.write_eeprom(93,1,bytes([0x04])) + + return self._xcvr_api + + def get_platform_media_key(self, transceiver_dict, port_speed, lane_count): + api = self.get_xcvr_api() + api_name = type(api).__name__ + if api_name in ['CmisApi', 'CCmisApi']: + is_cmis = True + else: + is_cmis = False + + # Per lane speed + media_key = str(int(port_speed / lane_count)) + if is_cmis: + media_compliance_code = transceiver_dict['specification_compliance'] + if 'copper' in media_compliance_code: + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + else: + media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance']) + eth_compliance_str = '10/40G Ethernet Compliance Code' + ext_compliance_str = 'Extended Specification Compliance' + media_compliance_code = '' + if eth_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_dict[eth_compliance_str] + if ext_compliance_str in media_compliance_dict: + media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str] + if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower(): + media_len = transceiver_dict['cable_length'] + media_key += '-copper-' + str(media_len) + 'M' + else: + media_key += '-optical' + + return {\ + 'vendor_key': '',\ + 'media_key': media_key,\ + 'lane_speed_key': ''\ + } diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py new file mode 100644 index 000000000000..572a82be48c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py @@ -0,0 +1,68 @@ +#!/usr/bin/env python +# @Company ：Celestica +# @Time : 2023/7/24 13:32 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal + from . import helper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +BMC_EXIST = helper.APIHelper().get_bmc_status() +FAN_STATUS_INFO_CMD = "i2cget -y -f 107 0x0d 0x26" + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + self.helper = helper.APIHelper() + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal=is_psu_thermal, + psu_index=psu_index) + + def get_high_critical_threshold(self): + """ + Rewrite the method of obtaining PSU high critical in pddf_thermal + + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + if BMC_EXIST: + from . import sensor_list_config + if not self.is_psu_thermal: + output = self.pddf_obj.get_attr_name_output(self.thermal_obj_name, "temp1_high_crit_threshold") + if not output: + return None + + if output['status'].isalpha(): + attr_value = None + else: + attr_value = float(output['status']) + + if output['mode'] == 'bmc': + return attr_value + else: + return float(attr_value / 1000) + else: + info = self.helper.read_txt_file(sensor_list_config.Sensor_List_Info) + for line in info.splitlines(): + if "PSU%d_Temp1" % self.thermals_psu_index in line: + return float(line.split("|")[8]) + else: + return super().get_high_critical_threshold() + + def get_high_threshold(self): + if BMC_EXIST: + return super().get_high_threshold() + else: + status, fan_info = self.helper.run_command(FAN_STATUS_INFO_CMD) + if not status: + return None + thermal_name = self.get_name() + fan_dir = "B2F" if (bin(int(fan_info, 16)))[-2:-1] == "0" else "F2B" + value = self.plugin_data["THERMAL"]["NONE_BMC"]["temp1_high_threshold"][thermal_name][fan_dir] + return float(value) if value.isdigit() else None + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py new file mode 100644 index 000000000000..7e4fc599dda2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py @@ -0,0 +1,208 @@ +#!/usr/bin/env python + +############################################################################# +# +# Watchdog contains an implementation of SONiC Platform Base Watchdog API +# +############################################################################# +import fcntl +import os +import array + +try: + from . import helper + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_READ_WRITE = 0xC0000000 +IO_SIZE_INT = 0x00040000 +IO_SIZE_40 = 0x00280000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_GETSUPPORT = 0 | WDR_40 +WDIOC_GETSTATUS = 1 | WDR_INT +WDIOC_GETBOOTSTATUS = 2 | WDR_INT +WDIOC_GETTEMP = 3 | WDR_INT +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +WDT_COMMON_ERROR = -1 +WD_MAIN_IDENTITY = "cpld_wdt" +WDT_SYSFS_PATH = "/sys/class/watchdog/" + +DEFAULT_TIMEOUT = 180 +watchdog = 0 + + +class Watchdog(WatchdogBase): + watchdog = None + + def __init__(self): + global watchdog + self.helper = helper.APIHelper() + self.status_path = "/sys/devices/platform/cpld_wdt/status" + self.state_path = "/sys/devices/platform/cpld_wdt/state" + self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" + # Set default value + state = self.helper.read_txt_file(self.state_path) + self.armed = True if state == "active" else False + self.timeout = DEFAULT_TIMEOUT + if not watchdog: + watchdog = os.open("/dev/cpld_wdt", os.O_RDWR) + self.watchdog = watchdog + + def _enable(self): + """ + Turn on the watchdog timer + """ + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _disable(self): + """ + Turn off the watchdog timer + """ + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keep_alive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _set_timeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + return int(req[0]) + + def _get_timeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True) + + return int(req[0]) + + def _get_time_left(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + ################################################################# + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + + ret = WDT_COMMON_ERROR + if seconds < 0: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._set_timeout(seconds) + + if self.armed: + self._keep_alive() + else: + self._enable() + self.armed = True + + ret = self.timeout + except IOError: + pass + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + self._disable() + self.armed = False + disarmed = True + except IOError: + pass + + return disarmed + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return self.armed + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Returns: + An integer specifying the number of seconds remaining on thei + watchdog timer. If the watchdog is not armed, returns -1. + """ + + time_left = WDT_COMMON_ERROR + + if self.armed: + try: + time_left = self._get_time_left() + except IOError: + pass + + return time_left + + def __del__(self): + """ + Close watchdog + """ + + if self.watchdog is not None: + os.close(self.watchdog) + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh new file mode 100755 index 000000000000..4e078f27639c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh @@ -0,0 +1,20 @@ +#!/bin/bash +# install custom fpga device. + +sleep 3 +modprobe pddf_custom_fpga_extend + +bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status` +#Set off Alarm LED +if [[ "$bmc_present" == "True" ]]; then + # Set all LEDs to Manual control + ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null + + # Set Alarm LED to OFF + ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null + + #Set CPLD Fan LED register to BMC control + ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null +else + i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null +fi diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..4330f7c21382 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh @@ -0,0 +1,14 @@ +#!/bin/bash +# Has customized those drivers,so rename them to lose effect +psu_driver=pddf_psu_driver_module.ko +fan_driver=pddf_fan_driver_module.ko +ker_name=$(uname -r) +driver_path=/usr/lib/modules/${ker_name}/extra/ +if [ -e ${driver_path}${psu_driver} ]; then + mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk +fi + +if [ -e ${driver_path}${fan_driver} ]; then + mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk +fi +echo 'pddf psu,fan driver module has rename now' diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py new file mode 100755 index 000000000000..8e0dfe90c063 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py @@ -0,0 +1,180 @@ +#!/usr/bin/python +# +# Silverstone-v2 platform sensors. This script get the sensor data from BMC +# using ipmitool and display them in lm-sensor alike format. +# +# The following data is support: +# 1. Temperature sensors +# 2. PSUs +# 3. Fan Drawers + +import sys +import logging +import subprocess + +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] +MAX_NUM_FANS = 7 +MAX_NUM_PSUS = 2 + +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} + +def ipmi_sensor_dump(cmd): + ''' Execute ipmitool command return dump output + exit if any error occur. + ''' + global sensor_dict + sensor_dump = '' + + try: + sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True) + except subprocess.CalledProcessError as e: + logging.error('Error! Failed to execute: {}'.format(cmd)) + sys.exit(1) + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True + +def get_reading_by_name(sensor_name, sdr_elist_dump): + ''' + Search for the match sensor name, return sensor + reading value and unit, return object epmtry string + if search not match. + + The output of sensor dump: + TEMP_FB_U52 | 00h | ok | 7.1 | 31 degrees C + TEMP_FB_U17 | 01h | ok | 7.1 | 27 degrees C + TEMP_SW_U52 | 02h | ok | 7.1 | 30 degrees C + Fan2_Status | 07h | ok | 29.2 | Present + Fan2_Front | 0Eh | ok | 29.2 | 12000 RPM + Fan2_Rear | 46h | ok | 29.2 | 14700 RPM + PSU2_Status | 39h | ok | 10.2 | Presence detected + PSU2_Fan | 3Dh | ok | 10.2 | 16000 RPM + PSU2_VIn | 3Ah | ok | 10.2 | 234.30 Volts + PSU2_CIn | 3Bh | ok | 10.2 | 0.80 Amps + ''' + found = '' + + for line in sdr_elist_dump.splitlines(): + line = line.decode() + if sensor_name in line: + found = line.strip() + break + + if not found: + logging.error('Cannot find sensor name:' + sensor_name) + + else: + try: + found = found.split('|')[4] + except IndexError: + logging.error('Cannot get sensor data of:' + sensor_name) + + logging.basicConfig(level=logging.DEBUG) + return found + + +def read_temperature_sensors(): + sensor_list = [\ + ('TEMP_FB_U52', 'Fanboard Center Temp'),\ + ('TEMP_FB_U17', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', 'Switchboard Right Temp'),\ + ('TEMP_CPU', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('VDD_CORE_Temp', 'TPS536C7 Chip Temp'),\ + ('XP3R3V_R_Temp', 'MP2975 3.3v Chip Right Temp'),\ + ('XP3R3V_L_Temp', 'MP2975 3.3v Chip Left Temp'),\ + ('XP0R8V_Temp', 'MP2975 0.8v Chip Temp')\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Temperature Sensors\n" + output += "Adapter: IPMI adapter\n" + for sensor in sensor_list: + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_fan_sensors(num_fans): + + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "Fan Drawers\n" + output += "Adapter: IPMI adapter\n" + for fan_num in range(1, num_fans+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(fan_num) + display_sensor_name = sensor[1].format(fan_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Temp1'),\ + ('PSU{}_Temp2', 'PSU {} Temp2'),\ + ('PSU{}_Temp3', 'PSU {} Temp3'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ + ] + + output = '' + sensor_format = '{0:{width}}{1}\n' + # Find max length of sensor calling name + max_name_width = max(len(sensor[1]) for sensor in sensor_list) + + output += "PSU\n" + output += "Adapter: IPMI adapter\n" + for psu_num in range(1, num_psus+1): + for sensor in sensor_list: + ipmi_sensor_name = sensor[0].format(psu_num) + display_sensor_name = sensor[1].format(psu_num) + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ + width=str(max_name_width+1)) + output += '\n' + return output + +def main(): + output_string = '' + + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) + + +if __name__ == '__main__': + main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py new file mode 100755 index 000000000000..74f0e1ea91cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py @@ -0,0 +1,100 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/7/24 9:34 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Load pddf_custom_lpc_basecpld.ko, after confirming the BMC is in place, +# load different configuration files, and finally remove the driver. + +import subprocess +import os +import os.path + + +class PrePddfInit(object): + def __init__(self): + self.ker_path = "/usr/lib/modules/{}/extra" + self.lpc_basecpld_name = "pddf_custom_lpc_basecpld" + self.lpc_basecpld_ko = "pddf_custom_lpc_basecpld.ko" + self.bmc_exist_cmd = "/sys/bus/platform/devices/sys_cpld/bmc_present" + self.platform_name = "x86_64-cel_silverstone_v2-r0" + self.bmc_present = False + + @staticmethod + def run_command(cmd): + status = True + result = "" + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data + + return status, result + + def get_kernel_path(self): + """ + get the kernel object complete path + :return: + """ + sta_, res_ = self.run_command("uname -r") + if sta_: + return self.ker_path.format(res_) + else: + return None + + def install_lpc_basecpld(self): + """ + install lpc basecpld driver + """ + ker_path = self.get_kernel_path() + if ker_path: + self.run_command("insmod %s/%s" % (ker_path, self.lpc_basecpld_ko)) + + def uninstall_lpc_basecpld(self): + self.run_command("rmmod %s" % self.lpc_basecpld_name) + + def get_bmc_status(self): + """ + get bmc status + """ + self.install_lpc_basecpld() + if os.path.exists(self.bmc_exist_cmd): + # "1": "absent", "0": "present" + sta, res = self.run_command("cat %s" % self.bmc_exist_cmd) + self.bmc_present = False if res == "1" else True + self.uninstall_lpc_basecpld() + + def choose_pddf_device_json(self): + """ + Depending on the state of the BMC, different pddf-device.json file configurations will be used: + 1.BMC exist: cp pddf-device.json-bmc pddf-device.json + 2.None BMC : cp pddf-device.json-nonebmc pddf-device.json + """ + device_name = "pddf-device.json-bmc" if self.bmc_present else "pddf-device.json-nonebmc" + device_path = "/usr/share/sonic/device/%s/pddf/" % self.platform_name + self.run_command("cp %s%s %spddf-device.json" % (device_path, device_name, device_path)) + + def choose_platform_components(self): + """ + Depending on the state of the BMC, different platform_components.json file configurations will be used: + 1.BMC exist: cp platform_components.json-bmc platform_components.json + 2.None BMC : cp platform_components.json-nonebmc platform_components.json + """ + # ./usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/platform_components.json + device_name = "platform_components.json-bmc" if self.bmc_present else "platform_components.json-nonebmc" + device_path = "/usr/share/sonic/device/%s/" % self.platform_name + self.run_command("cp %s%s %splatform_components.json" % (device_path, device_name, device_path)) + + def main(self): + self.get_bmc_status() + self.choose_pddf_device_json() + self.choose_platform_components() + with open("/usr/share/sonic/device/%s/bmc_status" % self.platform_name, 'w') as fp: + fp.write(str(self.bmc_present)) + + +if __name__ == '__main__': + if not os.path.isfile("/usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status"): + pre_init = PrePddfInit() + pre_init.main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors new file mode 100755 index 000000000000..5d740a9eb7d7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors @@ -0,0 +1,11 @@ +#!/bin/bash + +DOCKER_EXEC_FLAGS="i" + +# Determine whether stdout is on a terminal +if [ -t 1 ] ; then + DOCKER_EXEC_FLAGS+="t" +fi + +docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh new file mode 100755 index 000000000000..03bc2fcf9730 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh @@ -0,0 +1,39 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status` + +if [[ "$bmc_present" == "True" ]]; then + # Set all LEDs to BMC's control + ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null + + # BMC cold power-cyle + ipmitool chassis power cycle &> /dev/null +else + # Set System LED to booting pattern + i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null + + # CPLD cold power-cyle + i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null +fi + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service similarity index 58% rename from platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service index 233971ae784d..a63f5fe71ccd 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service @@ -1,11 +1,13 @@ [Unit] -Description=Belgite Platform Monitoring service +Description=Silverstone-V2 Platform background monitor service Before=pmon.service After=pddf-platform-init.service DefaultDependencies=no [Service] -ExecStart=/usr/local/bin/belgite_pddf_monitor.py +ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py +Restart=always +RestartSec=30s KillSignal=SIGKILL SuccessExitStatus=SIGKILL diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service similarity index 89% rename from platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service index 249fa2e89764..021f7b283a1a 100644 --- a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service @@ -6,6 +6,7 @@ DefaultDependencies=no [Service] Type=oneshot +ExecStartPre=/usr/local/bin/pre_pddf_init.py ExecStart=/usr/local/bin/pddf_util.py install ExecStop=/usr/local/bin/pddf_util.py clean RemainAfterExit=yes diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py new file mode 100755 index 000000000000..8ad50341cd9a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py @@ -0,0 +1,129 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +CPU_TEMP_MAX = 130 +CPU_MAJOR_ALARM = 105 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone0/temp" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 1.8 +Ki = 0.3 +Kd = 0 +SET_POINT = 96 +PWM_MIN = 35 +PWM_MAX = 100 + + +class CPUPIDRegulation(object): + """ + Make a class we can use to capture stdout and sterr in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self): + """Needs a logger and a logger level.""" + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + + @staticmethod + def get_cpu_temperature(): + """ + Get CPU temperature + """ + try: + temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000 + return temp + except Exception: + return False + + def exception_data_handling(self): + """ + Get the temperature of CPU, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~130; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + cpu_temp = self.get_cpu_temperature() + if cpu_temp is False: + re_try = True + elif cpu_temp not in range(CPU_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + for _ in range(5): + cpu_temp = self.get_cpu_temperature() + if (type(cpu_temp) is int) and \ + (cpu_temp in range(CPU_TEMP_MAX+1)) and \ + (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF): + return cpu_temp + else: + error_temp_list.append(cpu_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return cpu_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + cpu_temp = self.exception_data_handling() + if not cpu_temp: + return DUTY_MAX + if cpu_temp >= CPU_MAJOR_ALARM: + self.syslog.warning("High temperature warning: CPU temperature %sC, Major Alarm %sC" + % (cpu_temp, CPU_MAJOR_ALARM)) + if len(T_LIST) < 2: + T_LIST.append(float(cpu_temp)) + return PWM_LIST[0] + else: + T_LIST.append(float(cpu_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py new file mode 100755 index 000000000000..f7fe5e82b898 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py @@ -0,0 +1,207 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 17:44 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan control strategy main program + +try: + import re + import os + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform + from . import CPUPIDRegulation + from . import FanLinearAdjustment + from . import SwitchInternalPIDRegulation +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +FUNCTION_NAME = "FanControl" +ERROR_COLOR = "amber" +NORMAL_COLOR = "green" +DUTY_MAX = 100 +FAN_NUMBER = 7 +PSU_NUMBER = 2 +SENSOR_NUMBER = 6 +Fan_Front_MAX = 40000 +Fan_Front_MIN = 7800 +Fan_Rear_MAX = 37800 +Fan_Rear_MIN = 6600 + + +class FanControl(object): + """ + Make a class we can use to capture stdout in the log + """ + # static temp var + _ori_temp = 0 + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self): + self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(DUTY_MAX, FAN_NUMBER, PSU_NUMBER, SENSOR_NUMBER) + self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation() + self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation() + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_psu_status(self, fan_duty_list): + """ + Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100 + :param fan_duty_list: A list.TO app the fans target pwm + """ + psu_presence_list = [True, True] + try: + pus_info = os.popen("i2cget -y -f 100 0x0d 0x60").read().strip() + psus_present = bin(int(pus_info, 16))[6:8] + for psu_index in range(PSU_NUMBER): + psu_presence = True if psus_present[psu_index] == "0" else False + if not psu_presence: + psu_presence_list[psu_index] = False + self.syslog.warning( + "psu%s was error,presence:%s" % (psu_index + 1, str(psu_presence))) + else: + psu_presence_list[psu_index] = True + if False in psu_presence_list: + fan_duty_list.append(DUTY_MAX) + except Exception: + pass + + def get_fan_status(self): + """ + Get all of fans status(fan drawer) + :return: A list indicating the status of all groups fans + """ + fan_presence_list = [True, True, True, True, True, True, True] # Default state: fans are OK + for fan_drawer_index in range(FAN_NUMBER): + try: + fan_presence = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_presence() + fan_status = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_status() + if not all([fan_presence, fan_status]): + fan_presence_list[fan_drawer_index] = False + self.syslog.warning("Fan Drawer-%s has error,presence:%s, status:%s" + % (fan_drawer_index + 1, fan_presence, fan_status)) + except Exception: + pass + return fan_presence_list + + def check_fans_presence(self): + """ + check all fans presence or not + """ + fans_inserted_list = self.get_fan_status() + fans_inserted_num = fans_inserted_list.count(True) + if fans_inserted_num == 0: # all fans broken, cpld will power off + self.syslog.critical("No fans inserted!!! Severe overheating hazard. " + "Please insert Fans immediately or power off the device") + + def set_fans_pwm_by_rpm(self, fan_duty_list): + """ + Set fans pwm by fans rpm. If all fans normal or 1 fan broken, + manage the fans follow thermal policy. + More than 1 fans broken, Will increase the fan speed to 100% + :param fan_duty_list: A list.TO app the fans target pwm + """ + fan_rpm_error_list = list() + for fan in self.platform_chassis_obj.get_all_fans(): + fan_name = fan.get_name() + fan_speed_rpm = fan.get_speed_rpm() + if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)): + fan_rpm_error_list.append(fan_name) + if not fan_rpm_error_list: + for fan_drawer_index in range(FAN_NUMBER): + self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR) + return None + if len(fan_rpm_error_list) >= 2: + self.syslog.warning("%s rpm less than the set minimum speed. " + "Will increase the fan speed to 100%%" % fan_rpm_error_list) + fan_duty_list.append(DUTY_MAX) + else: + self.syslog.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list) + + fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list)) + for error_fan_drawer in fan_modules_index_list: + self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR) + + self.syslog.warning("The STA front panel light will be set to %s" % ERROR_COLOR) + self.platform_chassis_obj.set_status_led(ERROR_COLOR) + + def get_linear_pid_pwm(self, fan_duty_list): + """ + Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment + :param fan_duty_list: A list.TO app the fans target pwm + """ + linear_regulation = self.FanLinearAdjustment.linear_control() + cpu_pid_adjustment = self.CPUPIDRegulation.pid_control() + sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control() + fan_duty_list.append(linear_regulation) + fan_duty_list.append(cpu_pid_adjustment) + fan_duty_list.append(sw_pid_adjustment) + + def manage_fans(self): + """ + Set the fan speed according to the Fan Control Strategy + """ + fan_duty_speed_list = list() + + # Fan speed setting judgment-PSU + self.get_psu_status(fan_duty_speed_list) + + # Fan speed setting judgment-FAN presence + self.check_fans_presence() + + # Fan speed setting judgment-FAN SPEED + self.set_fans_pwm_by_rpm(fan_duty_speed_list) + + # Fan speed setting judgment-linear and cpu pid and sw pid + self.get_linear_pid_pwm(fan_duty_speed_list) + + self._new_perc = max(fan_duty_speed_list) + if self._new_perc < 35: + self._new_perc = 35 + if self._new_perc > 100: + self._new_perc = 100 + + for fan in self.platform_chassis_obj.get_all_fans(): + fan.set_speed(self._new_perc) + + +def handler(signum, frame): + logging.warning('Cause signal %d, will set all fan speed to max.' % signum) + platform_chassis = platform.Platform().get_chassis() + set_error = list() + fan_index = 1 + for fan in platform_chassis.get_all_fans(): + set_stat = fan.set_speed(DUTY_MAX) + fan_drawer = fan_index//2 + if not set_stat: + set_error.append(fan_drawer) + fan_index += 1 + if set_error: + logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX)) + sys.exit(0) + + +def main(): + signal.signal(signal.SIGINT, handler) + signal.signal(signal.SIGTERM, handler) + monitor = FanControl() + # Loop forever, doing something useful hopefully: + while True: + monitor.manage_fans() + time.sleep(2) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py new file mode 100755 index 000000000000..fac9ba9253ff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/16 17:00 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy + +try: + import sys + import getopt + import subprocess + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = "FanControl" + + +class FanLinearAdjustment(object): + """ + Make a class we can use to capture stdout in the log + """ + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + init_fan_temperature = [0, 0] + + def __init__(self, duty_max, fan_num, psu_num, sensor_num): + self.duty_max = duty_max + self.fan_num = fan_num + self.psu_num = psu_num + self.sensor_num = sensor_num + self.last_pwm = 0 + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_all_temperature(self): + """ + Get U16 and U17 temperature by thermal API + return: [TEMP_SW_U16 temperature, TEMP_FB_U17 temperature] + """ + all_temperature_list = list() + for sensor_index in range(self.sensor_num): + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + if temp is None or str(temp).strip() == "": + for count in range(5): # retry to get the temperature + temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature() + try: + float(temp) + break + except ValueError: + pass + else: + return None + all_temperature_list.append(temp) + u16_temperature = all_temperature_list[4] + u17_temperature = all_temperature_list[5] + return [u16_temperature, u17_temperature] + + def get_fan_pwm_by_temperature(self, temp_list): + """ + According to the sensor temperature, the temperature rise and fall are judged, + and the fan speed with the highest speed is selected + :param temp_list: Sensor temperature list + :return: According to the sensor temperature, select the maximum expected fan value at each point(int) + """ + fan_direction = "NA" + for fan in self.platform_chassis_obj.get_all_fans(): + fan_status = fan.get_status() + if fan_status: + fan_direction = fan.get_direction() + break + all_temp = self.get_all_temperature() + if all_temp is None: + # According to Thermal suggestion, when the temperature can't be + # obtained, set the fan to full speed + self.syslog.warning("Can't get TEMP_FB_U17/TEMP_SW_U16, Will increase the fan speed to 100%%") + return self.duty_max + + # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature + sensor_index = 1 if fan_direction.lower() == "intake" else 0 + sensor_temp = float(all_temp[sensor_index]) + update_temp_sensor = True + diff_temp = temp_list[sensor_index] - all_temp[sensor_index] + if diff_temp > 0: + update_temp_sensor = False + + if sensor_index == 0: + if not update_temp_sensor: # U16 temperature down + b = 919 / 6 + if sensor_temp <= 37: + sensor_temp_pwm = 38 + elif sensor_temp >= 49: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((31 / 6) * sensor_temp - b) + else: # U16 temperature up + b = 506 / 3 + if sensor_temp <= 40: + sensor_temp_pwm = 38 + elif sensor_temp >= 52: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((31 / 6) * sensor_temp - b) + return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm) + else: + if not update_temp_sensor: # U17 temperature down + b = 20 + if sensor_temp <= 23: + sensor_temp_pwm = 40 + elif sensor_temp >= 46: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((60 / 23) * sensor_temp - b) + else: # U17 temperature up + b = 640 / 23 + if sensor_temp <= 23: + sensor_temp_pwm = 40 + elif sensor_temp >= 49: + sensor_temp_pwm = self.duty_max + else: + sensor_temp_pwm = int((60 / 23) * sensor_temp - b) + return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm) + + @staticmethod + def choose_pwm(status, last_pwm, now_pwm): + """ + choose the pwm with Thermal rules + :param status: Temperature rises (True) or falls(False) + :param last_pwm:last pwm value + :param now_pwm:Calculated pwm from current temperature + :return:int.The pwm value + """ + if status: + return last_pwm if last_pwm >= now_pwm else now_pwm + else: + return now_pwm if last_pwm >= now_pwm else last_pwm + + def linear_control(self): + """ + According to linear adjustment return the fans pwm + :return: fans pwm + """ + new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature) + self.init_fan_temperature = self.get_all_temperature() + self.last_pwm = new_perc + return new_perc diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py new file mode 100755 index 000000000000..96f96b20369a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py @@ -0,0 +1,145 @@ +#!/usr/bin/env python +# -*- coding: UTF-8 -*- +# @Time : 2023/6/19 16:26 +# @Mail : yajiang@celestica.com +# @Author : jiang tao +# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team + +try: + import os + import sys + import getopt + import subprocess + import statistics + import logging + import logging.config + import time # this is only being used as part of the example + import signal + from sonic_platform import platform +except ImportError as e: + raise ImportError('%s - required module not found' % str(e)) + +# Defaults +FUNCTION_NAME = 'FanControl' +DUTY_MAX = 100 +SW_TEMP_MAX = 150 +SW_MAJOR_ALARM = 110 +SW_SHUTDOWN = 124 +TEMP_DIFF = 15 # abs(Tk - Tk-1) limit +SWITCH_INTERNAL_PATH = "/sys/devices/platform/fpga_sysfs/getreg" + +# PID Defaults Value +PWM_LIST = [35] # [PWMk-1] +T_LIST = [] # [Tk-2, Tk-1, Tk] +Kp = 3 +Ki = 0.3 +Kd = 0.5 +SET_POINT = 100 +PWM_MIN = 35 +PWM_MAX = 100 + + +class SwitchInternalPIDRegulation(object): + """ + Make a class we can use to capture stdout in the log + """ + _new_perc = DUTY_MAX / 2 + syslog = logging.getLogger("[" + FUNCTION_NAME + "]") + + def __init__(self): + # Needs a logger and a logger level + formatter = logging.Formatter('%(name)s %(message)s') + sys_handler = logging.handlers.SysLogHandler(address='/dev/log') + sys_handler.setFormatter(formatter) + sys_handler.ident = 'common' + self.syslog.setLevel(logging.WARNING) + self.syslog.addHandler(sys_handler) + self.platform_chassis_obj = platform.Platform().get_chassis() + + def get_switch_internal_temperature(self): + """ + Get Switch internal temperature + """ + try: + subprocess.run("echo 0x78 > {}".format(SWITCH_INTERNAL_PATH)) + ret,value_1 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH)) + value_1 = value_1.strip() + + subprocess.run("echo 0x80 > {}".format(SWITCH_INTERNAL_PATH)) + ret,value_2 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH)) + value_2 = value_2.strip() + + freq = int(value_2, 16) + freq = freq * 256 + int(value_1, 16) + temp = (434100 - ((12500000 / freq - 1) * 535)) / 1000 + return int(temp) + except Exception as E: + self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E)) + return False + + def exception_data_handling(self): + """ + Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions: + 1. The temperature range is 0~150; + 2. The temperature difference from the last time is within 15 + Otherwise, loop 5 times to get the temperature value again: + 1. if can't get the int value of temperature, return False; + 2. all temperatures are int, return the temperatures average value + """ + re_try = False + sw_temp = self.get_switch_internal_temperature() + if sw_temp is False: + re_try = True + elif sw_temp not in range(SW_TEMP_MAX+1): + re_try = True + elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF: + re_try = True + + if re_try: + error_temp_list = list() + while len(error_temp_list) < 5: + sw_temp = self.get_switch_internal_temperature() + if (type(sw_temp) is int) and \ + (sw_temp in range(SW_TEMP_MAX+1)) and \ + (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF): + return sw_temp + else: + error_temp_list.append(sw_temp) + if False in error_temp_list: + return False + return statistics.mean(error_temp_list) + return sw_temp + + def pid_control(self): + """ + PID adjustment according to Switch Internal Temperature + :return: fans pwm + """ + sw_temp = self.exception_data_handling() + if not sw_temp: + return DUTY_MAX + sw_temp = sw_temp + 3 + if sw_temp >= SW_MAJOR_ALARM: + self.syslog.warning("High temperature warning: switch internal temperature %sC, Major Alarm %sC" + % (sw_temp, SW_MAJOR_ALARM)) + if sw_temp >= SW_SHUTDOWN: + self.syslog.critical("The Switch Internal temperature exceeds %sC, " + "the Switch board will be powered off. And will reboot now" % SW_SHUTDOWN) + os.popen("i2cset -y -f 100 0x0d 0x40 0x00") + os.popen("i2cset -y -f 100 0x0d 0x40 0x01") + os.popen("reboot") + if len(T_LIST) < 2: + T_LIST.append(float(sw_temp)) + return PWM_LIST[0] + else: + T_LIST.append(float(sw_temp)) + pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \ + Ki * (T_LIST[2] - SET_POINT) + \ + Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0]) + if pwm_k < PWM_MIN: + pwm_k = PWM_MIN + elif pwm_k > PWM_MAX: + pwm_k = PWM_MAX + PWM_LIST[0] = pwm_k + T_LIST.pop(0) + return pwm_k diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py new file mode 100755 index 000000000000..fd2df8085779 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py @@ -0,0 +1,5 @@ +# -*- coding: utf-8 -*-# + +# @Time : 2023/6/20 16:01 +# @Mail : yajiang@celestica.com +# @Author : jiang tao diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py new file mode 100755 index 000000000000..d2e2b7f271f4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py @@ -0,0 +1,26 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/7/31 13:15 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import sys +import time +import json +sys.path.append(r"/usr/local/bin") +from FanControl import FanControl +import pddf_sensor_list_refresh + + +pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json' +with open(pddf_device_path) as f: + json_data = json.load(f) +bmc_present = json_data["PLATFORM"]["bmc_present"] +# Wait for a while to ensure that the corresponding system files are ready +time.sleep(30) +if bmc_present == "False": + FanControl.main() + +if bmc_present == "True": + pddf_sensor_list_refresh.main() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py new file mode 100755 index 000000000000..a320878bd242 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py @@ -0,0 +1,39 @@ +#!/usr/bin/python +# -*- coding: utf-8 -*-# + +# @Time : 2023/4/13 9:46 +# @Mail : yajiang@celestica.com +# @Author : jiang tao + +import os +import time + +try: + from sonic_platform import sensor_list_config + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sensor_info_path = sensor_list_config.Sensor_List_Info +refresh_interval = sensor_list_config.Sensor_Info_Update_Period_Secs + +log = logger.Logger() + + +def write_sensor_list_info(): + """ + Write the log of the command 'ipmitool sensor list' in sensor_info.log + """ + try: + info = os.popen("ipmitool sensor list").read() + if "System_Event" in info: + with open(sensor_info_path, "w") as f: + f.write(info) + except Exception as E: + log.log_error(str(E)) + + +def main(): + while 1: + write_sensor_list_info() + time.sleep(refresh_interval) diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf index cb8dcf640ba3..001538945867 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf @@ -9,7 +9,7 @@ i2c-ismt i2c-dev i2c-mux i2c-smbus +coretemp -i2c-mux-pca954x ipmi_devintf -ipmi_si \ No newline at end of file +ipmi_si diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile index f6ad4d9ba4d1..44b9b6147e57 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile @@ -1 +1 @@ -obj-m := baseboard-lpc.o mc24lc64t.o switchboard.o \ No newline at end of file +obj-m := baseboard-lpc.o mc24lc64t.o cls-switchboard.o xcvr-cls.o switch_cpld.o cls-i2c-mux-pca954x.o diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c index b6291f7d3ce4..50f9e2d886bc 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c @@ -98,7 +98,7 @@ static ssize_t version_show(struct device *dev, struct device_attribute *attr, c mutex_lock(&cpld_data->cpld_lock); version = inb(VERSION_ADDR); mutex_unlock(&cpld_data->cpld_lock); - return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F); + return sprintf(buf, "%x.%x\n", version >> 4, version & 0x0F); } static DEVICE_ATTR_RO(version); @@ -430,4 +430,4 @@ module_exit(cpld_b_exit); MODULE_AUTHOR("Celestica Inc."); MODULE_DESCRIPTION("Celestica Silverstone CPLD baseboard driver"); MODULE_VERSION("0.2.0"); -MODULE_LICENSE("GPL"); \ No newline at end of file +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c new file mode 100644 index 000000000000..87c51c15ad97 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * I2C multiplexer + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * + * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch + * chips made by NXP Semiconductors. + * This includes the: + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547, + * PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849. + * + * These chips are all controlled via the I2C bus itself, and all have a + * single 8-bit register. The upstream "parent" bus fans out to two, + * four, or eight downstream busses or channels; which of these + * are selected is determined by the chip type and register contents. A + * mux can select only one sub-bus at a time; a switch can select any + * combination simultaneously. + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "cls-pca954x.h" + +#define PCA954X_MAX_NCHANS 8 + +#define PCA954X_IRQ_OFFSET 4 + +enum pca_type { + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, + pca_9846, + pca_9847, + pca_9848, + pca_9849, +}; + +struct chip_desc { + u8 nchans; + u8 enable; /* used for muxes only */ + u8 has_irq; + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; + struct i2c_device_identity id; +}; + +struct pca954x { + const struct chip_desc *chip; + + u8 last_chan; /* last register value */ + /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */ + s32 idle_state; + + struct i2c_client *client; + + struct irq_domain *irq; + unsigned int irq_mask; + raw_spinlock_t lock; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9542] = { + .nchans = 2, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9543] = { + .nchans = 2, + .has_irq = 1, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .has_irq = 1, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9545] = { + .nchans = 4, + .has_irq = 1, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9546] = { + .nchans = 4, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + .id = { .manufacturer_id = I2C_DEVICE_ID_NONE }, + }, + [pca_9846] = { + .nchans = 4, + .muxtype = pca954x_isswi, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x10b, + }, + }, + [pca_9847] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x108, + }, + }, + [pca_9848] = { + .nchans = 8, + .muxtype = pca954x_isswi, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x10a, + }, + }, + [pca_9849] = { + .nchans = 4, + .enable = 0x4, + .muxtype = pca954x_ismux, + .id = { + .manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS, + .part_id = 0x109, + }, + }, +}; + +static const struct i2c_device_id pca954x_id[] = { + { "cls_pca9540", pca_9540 }, + { "cls_pca9542", pca_9542 }, + { "cls_pca9543", pca_9543 }, + { "cls_pca9544", pca_9544 }, + { "cls_pca9545", pca_9545 }, + { "cls_pca9546", pca_9546 }, + { "cls_pca9547", pca_9547 }, + { "cls_pca9548", pca_9548 }, + { "cls_pca9846", pca_9846 }, + { "cls_pca9847", pca_9847 }, + { "cls_pca9848", pca_9848 }, + { "cls_pca9849", pca_9849 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, pca954x_id); + +static const struct of_device_id pca954x_of_match[] = { + { .compatible = "nxp,cls_pca9540", .data = &chips[pca_9540] }, + { .compatible = "nxp,cls_pca9542", .data = &chips[pca_9542] }, + { .compatible = "nxp,cls_pca9543", .data = &chips[pca_9543] }, + { .compatible = "nxp,cls_pca9544", .data = &chips[pca_9544] }, + { .compatible = "nxp,cls_pca9545", .data = &chips[pca_9545] }, + { .compatible = "nxp,cls_pca9546", .data = &chips[pca_9546] }, + { .compatible = "nxp,cls_pca9547", .data = &chips[pca_9547] }, + { .compatible = "nxp,cls_pca9548", .data = &chips[pca_9548] }, + { .compatible = "nxp,cls_pca9846", .data = &chips[pca_9846] }, + { .compatible = "nxp,cls_pca9847", .data = &chips[pca_9847] }, + { .compatible = "nxp,cls_pca9848", .data = &chips[pca_9848] }, + { .compatible = "nxp,cls_pca9849", .data = &chips[pca_9849] }, + {} +}; +MODULE_DEVICE_TABLE(of, pca954x_of_match); + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int pca954x_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + union i2c_smbus_data dummy; + + return __i2c_smbus_xfer(adap, client->addr, client->flags, + I2C_SMBUS_WRITE, val, + I2C_SMBUS_BYTE, &dummy); +} + +static u8 pca954x_regval(struct pca954x *data, u8 chan) +{ + /* We make switches look like muxes, not sure how to be smarter. */ + if (data->chip->muxtype == pca954x_ismux) + return chan | data->chip->enable; + else + return 1 << chan; +} + +static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + u8 regval; + int ret = 0; + + regval = pca954x_regval(data, chan); + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(muxc->parent, client, regval); + data->last_chan = ret < 0 ? 0 : regval; + } + + return ret; +} + +static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + s32 idle_state; + + idle_state = READ_ONCE(data->idle_state); + if (idle_state >= 0) + /* Set the mux back to a predetermined channel */ + return pca954x_select_chan(muxc, idle_state); + + if (idle_state == MUX_IDLE_DISCONNECT) { + /* Deselect active channel */ + data->last_chan = 0; + return pca954x_reg_write(muxc->parent, client, + data->last_chan); + } + + /* otherwise leave as-is */ + + return 0; +} + +static ssize_t idle_state_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + + return sprintf(buf, "%d\n", READ_ONCE(data->idle_state)); +} + +static ssize_t idle_state_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + int val; + int ret; + + ret = kstrtoint(buf, 0, &val); + if (ret < 0) + return ret; + + if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT && + (val < 0 || val >= data->chip->nchans)) + return -EINVAL; + + i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT); + + WRITE_ONCE(data->idle_state, val); + /* + * Set the mux into a state consistent with the new + * idle_state. + */ + if (data->last_chan || val != MUX_IDLE_DISCONNECT) + ret = pca954x_deselect_mux(muxc, 0); + + i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT); + + return ret < 0 ? ret : count; +} + +static DEVICE_ATTR_RW(idle_state); + +static irqreturn_t pca954x_irq_handler(int irq, void *dev_id) +{ + struct pca954x *data = dev_id; + unsigned long pending; + int ret, i; + + ret = i2c_smbus_read_byte(data->client); + if (ret < 0) + return IRQ_NONE; + + pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1); + for_each_set_bit(i, &pending, data->chip->nchans) + handle_nested_irq(irq_linear_revmap(data->irq, i)); + + return IRQ_RETVAL(pending); +} + +static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) +{ + if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) + return -EINVAL; + return 0; +} + +static struct irq_chip pca954x_irq_chip = { + .name = "i2c-mux-pca954x", + .irq_set_type = pca954x_irq_set_type, +}; + +static int pca954x_irq_setup(struct i2c_mux_core *muxc) +{ + struct pca954x *data = i2c_mux_priv(muxc); + struct i2c_client *client = data->client; + int c, irq; + + if (!data->chip->has_irq || client->irq <= 0) + return 0; + + raw_spin_lock_init(&data->lock); + + data->irq = irq_domain_add_linear(client->dev.of_node, + data->chip->nchans, + &irq_domain_simple_ops, data); + if (!data->irq) + return -ENODEV; + + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_create_mapping(data->irq, c); + if (!irq) { + dev_err(&client->dev, "failed irq create map\n"); + return -EINVAL; + } + irq_set_chip_data(irq, data); + irq_set_chip_and_handler(irq, &pca954x_irq_chip, + handle_simple_irq); + } + + return 0; +} + +static void pca954x_cleanup(struct i2c_mux_core *muxc) +{ + struct pca954x *data = i2c_mux_priv(muxc); + int c, irq; + + if (data->irq) { + for (c = 0; c < data->chip->nchans; c++) { + irq = irq_find_mapping(data->irq, c); + irq_dispose_mapping(irq); + } + irq_domain_remove(data->irq); + } + i2c_mux_del_adapters(muxc); +} + +static int pca954x_init(struct i2c_client *client, struct pca954x *data) +{ + int ret; + + if (data->idle_state >= 0) + data->last_chan = pca954x_regval(data, data->idle_state); + else + data->last_chan = 0; /* Disconnect multiplexer */ + + ret = i2c_smbus_write_byte(client, data->last_chan); + if (ret < 0) + data->last_chan = 0; + + return ret; +} + +/* + * I2C init/probing/exit functions + */ +static int pca954x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); + struct device *dev = &client->dev; + struct gpio_desc *gpio; + struct i2c_mux_core *muxc; + struct pca954x *data; + int num, force; + int ret; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; + + muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0, + pca954x_select_chan, pca954x_deselect_mux); + if (!muxc) + return -ENOMEM; + data = i2c_mux_priv(muxc); + + i2c_set_clientdata(client, muxc); + data->client = client; + + /* Reset the mux if a reset GPIO is specified. */ + gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); + if (gpio) { + udelay(1); + gpiod_set_value_cansleep(gpio, 0); + /* Give the chip some time to recover. */ + udelay(1); + } + + data->chip = device_get_match_data(dev); + if (!data->chip) + data->chip = &chips[id->driver_data]; + + if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) { + struct i2c_device_identity id; + + ret = i2c_get_device_id(client, &id); + if (ret && ret != -EOPNOTSUPP) + return ret; + + if (!ret && + (id.manufacturer_id != data->chip->id.manufacturer_id || + id.part_id != data->chip->id.part_id)) { + dev_warn(dev, "unexpected device id %03x-%03x-%x\n", + id.manufacturer_id, id.part_id, + id.die_revision); + return -ENODEV; + } + } + + data->idle_state = MUX_IDLE_AS_IS; + if (device_property_read_u32(dev, "idle-state", &data->idle_state)) { + if (device_property_read_bool(dev, "i2c-mux-idle-disconnect")) + data->idle_state = MUX_IDLE_DISCONNECT; + } + + /* + * Write the mux register at addr to verify + * that the mux is in fact present. This also + * initializes the mux to a channel + * or disconnected state. + */ + ret = pca954x_init(client, data); + if (ret < 0) { + dev_warn(dev, "probe failed\n"); + return -ENODEV; + } + + ret = pca954x_irq_setup(muxc); + if (ret) + goto fail_cleanup; + + /* Now create an adapter for each channel */ + for (num = 0; num < data->chip->nchans; num++) { + force = 0; /* dynamic adap number */ + if (pdata) { + if (num < pdata->num_modes) { + /* force static number */ + force = pdata->modes[num].adap_id; + } else + /* discard unconfigured channels */ + break; + } + + ret = i2c_mux_add_adapter(muxc, force, num, 0); + if (ret) + goto fail_cleanup; + } + + if (data->irq) { + ret = devm_request_threaded_irq(dev, data->client->irq, + NULL, pca954x_irq_handler, + IRQF_ONESHOT | IRQF_SHARED, + "pca954x", data); + if (ret) + goto fail_cleanup; + } + + /* + * The attr probably isn't going to be needed in most cases, + * so don't fail completely on error. + */ + device_create_file(dev, &dev_attr_idle_state); + + dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n", + num, data->chip->muxtype == pca954x_ismux + ? "mux" : "switch", client->name); + + return 0; + +fail_cleanup: + pca954x_cleanup(muxc); + return ret; +} + +static void pca954x_remove(struct i2c_client *client) +{ + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + + device_remove_file(&client->dev, &dev_attr_idle_state); + + pca954x_cleanup(muxc); +} + +#ifdef CONFIG_PM_SLEEP +static int pca954x_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_mux_core *muxc = i2c_get_clientdata(client); + struct pca954x *data = i2c_mux_priv(muxc); + int ret; + + ret = pca954x_init(client, data); + if (ret < 0) + dev_err(&client->dev, "failed to verify mux presence\n"); + + return ret; +} +#endif + +static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); + +static struct i2c_driver pca954x_driver = { + .driver = { + .name = "cls_pca954x", + .pm = &pca954x_pm, + .of_match_table = pca954x_of_match, + }, + .probe = pca954x_probe, + .remove = pca954x_remove, + .id_table = pca954x_id, +}; + +module_i2c_driver(pca954x_driver); + +MODULE_AUTHOR("Rodolfo Giometti "); +MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h new file mode 100644 index 000000000000..2aaacf97cbac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h @@ -0,0 +1,44 @@ +/* + * + * cls-pca954x.h - I2C multiplexer/switch support + * + * Copyright (c) 2008-2009 Rodolfo Giometti + * Copyright (c) 2008-2009 Eurotech S.p.A. + * Michael Lawnick + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + + +#ifndef _CLS_I2C_PCA954X_H +#define _CLS_I2C_PCA954X_H + +/* Platform data for the PCA954x I2C multiplexers */ + +/* Per channel initialisation data: + * @adap_id: bus number for the adapter. 0 = don't care + * + */ +struct pca954x_platform_mode { + int adap_id; +}; + +/* Per mux/switch data, used with i2c_register_board_info */ +struct pca954x_platform_data { + struct pca954x_platform_mode *modes; + int num_modes; +}; + +#endif /* _CLS_I2C_PCA954X_H */ diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c new file mode 100644 index 000000000000..35ffc722e5a8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c @@ -0,0 +1,542 @@ +/* + * cls-switchboard.c - PCI device driver for Silverstone Switch board FPGA. + * + * Author: Pradchaya Phucharoen + * + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xcvr-cls.h" +#include "cls-pca954x.h" + +#define MOD_VERSION "2.1.2" +#define DRV_NAME "cls-switchboard" + +#define I2C_MUX_CHANNEL(_ch, _adap_id) \ + [_ch] = { .adap_id = _adap_id } + +#define FPGA_PCIE_DEVICE_ID 0x7021 +#define MMIO_BAR 0 +#define I2C_BUS_OFS 9 + +/* I2C ocore configurations */ +#define OCORE_REGSHIFT 2 +#define OCORE_IP_CLK_khz 62500 +#define OCORE_BUS_CLK_khz 100 +#define OCORE_REG_IO_WIDTH 1 + +/* Optical port xcvr configuration */ +#define XCVR_REG_SHIFT 2 +#define XCVR_NUM_PORT 34 +#define XCVR_PORT_REG_SIZE 0x10 + +/* i2c_bus_config - an i2c-core resource and platform data + * @id - I2C bus device ID, for identification. + * @res - resources for an i2c-core device. + * @num_res - size of the resources. + * @pdata - a platform data of an i2c-core device. + */ +struct i2c_bus_config { + int id; + struct resource *res; + ssize_t num_res; + struct ocores_i2c_platform_data pdata; +}; + +/* switchbrd_priv - switchboard private data */ +struct switchbrd_priv { + unsigned long base; + int num_i2c_bus; + struct platform_device **i2cbuses_pdev; + struct platform_device *regio_pdev; + struct platform_device *spiflash_pdev; + struct platform_device *xcvr_pdev; +}; + +/* I2C bus speed param */ +static int bus_clock_master_1 = 100; +module_param(bus_clock_master_1, int, 0660); +MODULE_PARM_DESC(bus_clock_master_1, + "I2C master 1 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_2 = 100; +module_param(bus_clock_master_2, int, 0660); +MODULE_PARM_DESC(bus_clock_master_2, + "I2C master 2 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_3 = 100; +module_param(bus_clock_master_3, int, 0660); +MODULE_PARM_DESC(bus_clock_master_3, + "I2C master 3 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_4 = 100; +module_param(bus_clock_master_4, int, 0660); +MODULE_PARM_DESC(bus_clock_master_4, + "I2C master 4 bus speed in KHz 50/80/100/200/400"); + +static int bus_clock_master_5 = 100; +module_param(bus_clock_master_5, int, 0660); +MODULE_PARM_DESC(bus_clock_master_5, + "I2C master 5 bus speed in KHz 50/80/100/200/400"); + +// NOTE: Silverstone i2c channel mapping is very wierd!!! +/* PCA9548 channel config on MASTER BUS 3 */ +static struct pca954x_platform_mode i2c_mux_70_modes[] = { + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 23), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 26), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 27), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 28), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 29), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 30), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 31), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 32) +}; + +static struct pca954x_platform_mode i2c_mux_71_modes[] = { + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 1), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 2), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 3), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 4), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 5), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 6), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 15), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 8) +}; + +static struct pca954x_platform_mode i2c_mux_72_modes[] = { + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 17), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 18), + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 19), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 20), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 21), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 22), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 25), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 24) +}; + +static struct pca954x_platform_mode i2c_mux_73_modes[] = { + I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 9), + I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 10), + I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 11), + I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 12), + I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 13), + I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 14), + I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 7), + I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 16) +}; + +static struct pca954x_platform_data om_muxes[] = { + { + .modes = i2c_mux_70_modes, + .num_modes = ARRAY_SIZE(i2c_mux_70_modes), + }, + { + .modes = i2c_mux_71_modes, + .num_modes = ARRAY_SIZE(i2c_mux_71_modes), + }, + { + .modes = i2c_mux_72_modes, + .num_modes = ARRAY_SIZE(i2c_mux_72_modes), + }, + { + .modes = i2c_mux_73_modes, + .num_modes = ARRAY_SIZE(i2c_mux_73_modes), + }, +}; + +/* Optical Module bus 3 i2c muxes info */ +static struct i2c_board_info i2c_info_3[] = { + { + I2C_BOARD_INFO("cls_pca9548", 0x70), + .platform_data = &om_muxes[0], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x71), + .platform_data = &om_muxes[1], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x72), + .platform_data = &om_muxes[2], + }, + { + I2C_BOARD_INFO("cls_pca9548", 0x73), + .platform_data = &om_muxes[3], + }, +}; + +/* RESOURCE SEPERATES BY FUNCTION */ +/* Resource IOMEM for i2c bus 1 */ +static struct resource cls_i2c_res_1[] = { + { + .start = 0x800, .end = 0x81F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 2 */ +static struct resource cls_i2c_res_2[] = { + { + .start = 0x820, .end = 0x83F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 3 */ +static struct resource cls_i2c_res_3[] = { + { + .start = 0x840, .end = 0x85F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 4 */ +static struct resource cls_i2c_res_4[] = { + { + .start = 0x860, .end = 0x87F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for i2c bus 5 */ +static struct resource cls_i2c_res_5[] = { + { + .start = 0x880, .end = 0x89F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for reg access */ +static struct resource reg_io_res[] = { + { + .start = 0x00, .end = 0xFF, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for spi flash firmware upgrade */ +static struct resource spi_flash_res[] = { + { + .start = 0x1200, .end = 0x121F, + .flags = IORESOURCE_MEM,}, +}; + +/* Resource IOMEM for front panel XCVR */ +static struct resource xcvr_res[] = { + { + .start = 0x4000, .end = 0x421F, + .flags = IORESOURCE_MEM,}, +}; + +static struct i2c_bus_config i2c_bus_configs[] = { + { + .id = 1, + .res = cls_i2c_res_1, + .num_res = ARRAY_SIZE(cls_i2c_res_1), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 2, + .res = cls_i2c_res_2, + .num_res = ARRAY_SIZE(cls_i2c_res_2), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 3, + .res = cls_i2c_res_3, + .num_res = ARRAY_SIZE(cls_i2c_res_3), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = ARRAY_SIZE(i2c_info_3), + .devices = i2c_info_3, + }, + }, + { + .id = 4, + .res = cls_i2c_res_4, + .num_res = ARRAY_SIZE(cls_i2c_res_4), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, + { + .id = 5, + .res = cls_i2c_res_5, + .num_res = ARRAY_SIZE(cls_i2c_res_5), + .pdata = { + .reg_shift = OCORE_REGSHIFT, + .reg_io_width = OCORE_REG_IO_WIDTH, + .clock_khz = OCORE_IP_CLK_khz, + .bus_khz = OCORE_BUS_CLK_khz, + .big_endian = false, + .num_devices = 0, + .devices = NULL, + }, + }, +}; + +/* xcvr front panel mapping */ +static struct port_info front_panel_ports[] = { + {"QSFP1", 1, QSFP}, + {"QSFP2", 2, QSFP}, + {"QSFP3", 3, QSFP}, + {"QSFP4", 4, QSFP}, + {"QSFP5", 5, QSFP}, + {"QSFP6", 6, QSFP}, + {"QSFP7", 7, QSFP}, + {"QSFP8", 8, QSFP}, + {"QSFP9", 9, QSFP}, + {"QSFP10", 10, QSFP}, + {"QSFP11", 11, QSFP}, + {"QSFP12", 12, QSFP}, + {"QSFP13", 13, QSFP}, + {"QSFP14", 14, QSFP}, + {"QSFP15", 15, QSFP}, + {"QSFP16", 16, QSFP}, + {"QSFP17", 17, QSFP}, + {"QSFP18", 18, QSFP}, + {"QSFP19", 19, QSFP}, + {"QSFP20", 20, QSFP}, + {"QSFP21", 21, QSFP}, + {"QSFP22", 22, QSFP}, + {"QSFP23", 23, QSFP}, + {"QSFP24", 24, QSFP}, + {"QSFP25", 25, QSFP}, + {"QSFP26", 26, QSFP}, + {"QSFP27", 27, QSFP}, + {"QSFP28", 28, QSFP}, + {"QSFP29", 29, QSFP}, + {"QSFP30", 30, QSFP}, + {"QSFP31", 31, QSFP}, + {"QSFP32", 32, QSFP}, + {"SFP1", 33, SFP}, + {"SFP2", 34, SFP} + /* END OF LIST */ +}; + +static struct cls_xcvr_platform_data xcvr_data = { + .port_reg_size = 0x10, + .num_ports = ARRAY_SIZE(front_panel_ports), + .devices = front_panel_ports, +}; + + +// TODO: Add a platform configuration struct, and use probe as a factory, +// so xcvr, fwupgrade device can configured as options. + +static int cls_fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + + struct switchbrd_priv *priv; + struct platform_device **i2cbuses_pdev; + struct platform_device *regio_pdev; + struct platform_device *xcvr_pdev; + unsigned long rstart; + int num_i2c_bus, i; + int err; + + err = pci_enable_device(dev); + if (err){ + dev_err(&dev->dev, "Failed to enable PCI device\n"); + goto err_exit; + } + + /* Check for valid MMIO address */ + rstart = pci_resource_start(dev, MMIO_BAR); + if (!rstart) { + dev_err(&dev->dev, "Switchboard base address uninitialized, " + "check FPGA\n"); + err = -ENODEV; + goto err_disable_device; + } + + dev_dbg(&dev->dev, "BAR%d res: 0x%lx-0x%llx\n", MMIO_BAR, + rstart, pci_resource_end(dev, MMIO_BAR)); + + priv = devm_kzalloc(&dev->dev, + sizeof(struct switchbrd_priv), GFP_KERNEL); + if (!priv){ + err = -ENOMEM; + goto err_disable_device; + } + + pci_set_drvdata(dev, priv); + num_i2c_bus = ARRAY_SIZE(i2c_bus_configs); + i2cbuses_pdev = devm_kzalloc( + &dev->dev, + num_i2c_bus * sizeof(struct platform_device*), + GFP_KERNEL); + + reg_io_res[0].start += rstart; + reg_io_res[0].end += rstart; + + xcvr_res[0].start += rstart; + xcvr_res[0].end += rstart; + + regio_pdev = platform_device_register_resndata( + &dev->dev, "cls-swbrd-io", + -1, + reg_io_res, ARRAY_SIZE(reg_io_res), + NULL, 0); + + if (IS_ERR(regio_pdev)) { + dev_err(&dev->dev, "Failed to register cls-swbrd-io\n"); + err = PTR_ERR(regio_pdev); + goto err_disable_device; + } + + xcvr_pdev = platform_device_register_resndata( + NULL, + "cls-xcvr", + -1, + xcvr_res, + ARRAY_SIZE(xcvr_res), + &xcvr_data, + sizeof(xcvr_data)); + + if (IS_ERR(xcvr_pdev)) { + dev_err(&dev->dev, "Failed to register xcvr node\n"); + err = PTR_ERR(xcvr_pdev); + goto err_unregister_regio; + } + + for(i = 0; i < num_i2c_bus; i++){ + + i2c_bus_configs[i].res[0].start += rstart; + i2c_bus_configs[i].res[0].end += rstart; + + switch (i + 1) { + case 1: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_1; + break; + case 2: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_2; + break; + case 3: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_3; + break; + case 4: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_4; + break; + case 5: + i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_5; + break; + default: + i2c_bus_configs[i].pdata.bus_khz = OCORE_BUS_CLK_khz; + } + + dev_dbg(&dev->dev, "i2c-bus.%d: 0x%llx - 0x%llx\n", + i2c_bus_configs[i].id, + i2c_bus_configs[i].res[0].start, + i2c_bus_configs[i].res[0].end); + + i2cbuses_pdev[i] = platform_device_register_resndata( + &dev->dev, "ocores-i2c", + i2c_bus_configs[i].id, + i2c_bus_configs[i].res, + i2c_bus_configs[i].num_res, + &i2c_bus_configs[i].pdata, + sizeof(i2c_bus_configs[i].pdata)); + + if (IS_ERR(i2cbuses_pdev[i])) { + dev_err(&dev->dev, "Failed to register ocores-i2c.%d\n", + i2c_bus_configs[i].id); + err = PTR_ERR(i2cbuses_pdev[i]); + goto err_unregister_ocore; + } + } + + priv->base = rstart; + priv->num_i2c_bus = num_i2c_bus; + priv->i2cbuses_pdev = i2cbuses_pdev; + priv->regio_pdev = regio_pdev; + priv->xcvr_pdev = xcvr_pdev; + return 0; + +err_unregister_ocore: + for(i = 0; i < num_i2c_bus; i++){ + if(priv->i2cbuses_pdev[i]){ + platform_device_unregister(priv->i2cbuses_pdev[i]); + } + } +err_unregister_xcvr: + platform_device_unregister(xcvr_pdev); +err_unregister_regio: + platform_device_unregister(regio_pdev); +err_disable_device: + pci_disable_device(dev); +err_exit: + return err; +} + +static int cls_fpga_remove(struct pci_dev *dev) +{ + int i; + struct switchbrd_priv *priv = pci_get_drvdata(dev); + + for(i = 0; i < priv->num_i2c_bus; i++){ + if(priv->i2cbuses_pdev[i]) + platform_device_unregister(priv->i2cbuses_pdev[i]); + } + platform_device_unregister(priv->xcvr_pdev); + platform_device_unregister(priv->regio_pdev); + pci_disable_device(dev); + return 0; +}; + +static const struct pci_device_id pci_clsswbrd[] = { + { PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) }, + {0, } +}; + +MODULE_DEVICE_TABLE(pci, pci_clsswbrd); + +static struct pci_driver clsswbrd_pci_driver = { + .name = DRV_NAME, + .id_table = pci_clsswbrd, + .probe = cls_fpga_probe, + .remove = cls_fpga_remove, +}; + +module_pci_driver(clsswbrd_pci_driver); + +MODULE_AUTHOR("Pradchaya P."); +MODULE_DESCRIPTION("Celestica Silverstone switchboard driver"); +MODULE_VERSION(MOD_VERSION); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c new file mode 100644 index 000000000000..b1900d03245e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c @@ -0,0 +1,416 @@ +/* + * switch_cpld.c - i2c driver for Silverstone switchboard CPLD1/CPLD2 + * provides sysfs interfaces to access CPLD register and control port LEDs + * + * Author: Budsakol Sirirattanasakul + * + * Copyright (C) 2019 Celestica Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include + +#define CPLD1_ADDR 0x30 +#define CPLD2_ADDR 0x31 + +#define SCRATCH_ADDR 0x01 +#define LED_OPMODE 0x09 +#define LED_TEST 0x0A + +struct switch_cpld_data { + struct mutex lock; + struct i2c_client *client; + struct i2c_client *client2; + uint8_t read_addr; +}; + +static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int value; + + value = i2c_smbus_read_byte_data(client, data->read_addr); + if (value < 0) + return value; + + return sprintf(buf, "0x%.2x\n", value); +} + +static ssize_t getreg_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + + status = kstrtou8(buf, 0, &value); + if (status != 0) + return status; + + data->read_addr = value; + + return size; +} + +static ssize_t setreg_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t addr, value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + char *tok; + + tok = strsep((char **)&buf, " "); + if (tok == NULL) + return -EINVAL; + status = kstrtou8(tok, 0, &addr); + if (status != 0) + return status; + + tok = strsep((char **)&buf, " "); + if (tok == NULL) + return -EINVAL; + status = kstrtou8(tok, 0, &value); + if (status != 0) + return status; + + status = i2c_smbus_write_byte_data(client, addr, value); + if (status == 0) + status = size; + return status; +} + +static ssize_t scratch_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int value; + + value = i2c_smbus_read_byte_data(client, SCRATCH_ADDR); + if (value < 0) + return value; + + return sprintf(buf, "0x%.2x\n", value); +} + +static ssize_t scratch_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + uint8_t value; + ssize_t status; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + + status = kstrtou8(buf, 0, &value); + if (status != 0) + return status; + status = i2c_smbus_write_byte_data(client, SCRATCH_ADDR, value); + if (status == 0) + status = size; + return status; +} + +DEVICE_ATTR_RW(getreg); +DEVICE_ATTR_WO(setreg); +DEVICE_ATTR_RW(scratch); + +static struct attribute *switch_cpld_attrs[] = { + &dev_attr_getreg.attr, + &dev_attr_setreg.attr, + &dev_attr_scratch.attr, + NULL, +}; +ATTRIBUTE_GROUPS(switch_cpld); + +static ssize_t port_led_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int led_mode_1, led_mode_2; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + led_mode_1 = i2c_smbus_read_byte_data(client1, LED_OPMODE); + if (led_mode_1 < 0) + return led_mode_1; + + led_mode_2 = i2c_smbus_read_byte_data(client2, LED_OPMODE); + if (led_mode_2 < 0) + return led_mode_2; + + return sprintf(buf, "%s %s\n", + led_mode_1 ? "test" : "normal", + led_mode_2 ? "test" : "normal"); +} + +static ssize_t port_led_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int status; + uint8_t led_mode; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + if (sysfs_streq(buf, "test")) + led_mode = 0x01; + else if (sysfs_streq(buf, "normal")) + led_mode = 0x00; + else + return -EINVAL; + + status = i2c_smbus_write_byte_data(client1, LED_OPMODE, led_mode); + if (status != 0) { + return status; + } + + status = i2c_smbus_write_byte_data(client2, LED_OPMODE, led_mode); + if (status != 0) { + return status; + } + + return size; +} + +static ssize_t port_led_color_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int led_color1, led_color2; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + led_color1 = i2c_smbus_read_byte_data(client1, LED_TEST); + if (led_color1 < 0) + return led_color1; + + led_color2 = i2c_smbus_read_byte_data(client2, LED_TEST); + if (led_color2 < 0) + return led_color2; + + return sprintf(buf, "%s %s\n", + led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ? + "red" : led_color1 == 0x04 ? + "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ? "cyan" : + led_color1 == 0x01 ? "magenta" : "white", + led_color2 == 0x07 ? "off" : led_color2 == 0x06 ? "green" : led_color2 == 0x05 ? + "red" : led_color2 == 0x04 ? + "yellow" : led_color2 == 0x03 ? "blue" : led_color2 == 0x02 ? "cyan" : + led_color2 == 0x01 ? "magenta" : "white"); +} + +static ssize_t port_led_color_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + int status; + uint8_t led_color; + struct switch_cpld_data *data = dev_get_drvdata(dev); + struct i2c_client *client1 = data->client; + struct i2c_client *client2 = data->client2; + + if (sysfs_streq(buf, "off")) + led_color = 0x07; + else if (sysfs_streq(buf, "green")) + led_color = 0x06; + else if (sysfs_streq(buf, "red")) + led_color = 0x05; + else if (sysfs_streq(buf, "yellow")) + led_color = 0x04; + else if (sysfs_streq(buf, "blue")) + led_color = 0x03; + else if (sysfs_streq(buf, "cyan")) + led_color = 0x02; + else if (sysfs_streq(buf, "magenta")) + led_color = 0x01; + else if (sysfs_streq(buf, "white")) + led_color = 0x00; + else + return -EINVAL; + + status = i2c_smbus_write_byte_data(client1, LED_TEST, led_color); + if (status != 0) { + return status; + } + + status = i2c_smbus_write_byte_data(client2, LED_TEST, led_color); + if (status != 0) { + return status; + } + + return size; +} + +DEVICE_ATTR_RW(port_led_mode); +DEVICE_ATTR_RW(port_led_color); + +static struct attribute *sff_led_attrs[] = { + &dev_attr_port_led_mode.attr, + &dev_attr_port_led_color.attr, + NULL, +}; + +static struct attribute_group sff_led_groups = { + .attrs = sff_led_attrs, +}; + +static int switch_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int err; + struct switch_cpld_data *drvdata1, *drvdata2; + struct device *hwmon_dev1, *hwmon_dev2; + struct i2c_client *client2; + + if (client->addr != CPLD1_ADDR) { + dev_err(&client->dev, "probe, bad i2c addr: 0x%x\n", + client->addr); + err = -EINVAL; + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) + return -EPFNOSUPPORT; + + /* CPLD1 */ + drvdata1 = devm_kzalloc(&client->dev, + sizeof(struct switch_cpld_data), GFP_KERNEL); + + if (!drvdata1) { + err = -ENOMEM; + goto exit; + } + + mutex_init(&drvdata1->lock); + drvdata1->client = client; + drvdata1->read_addr = 0x00; + i2c_set_clientdata(client, drvdata1); + hwmon_dev1 = devm_hwmon_device_register_with_groups(&client->dev, + "CPLD1", + drvdata1, + switch_cpld_groups); + + if (IS_ERR(hwmon_dev1)) { + err = PTR_ERR(hwmon_dev1); + goto exit; + } + + err = sysfs_create_link(&client->dev.kobj, &hwmon_dev1->kobj, "CPLD1"); + if (err) { + goto exit; + } + + /* CPLD2 */ + drvdata2 = devm_kzalloc(&client->dev, + sizeof(struct switch_cpld_data), GFP_KERNEL); + + if (!drvdata2) { + err = -ENOMEM; + goto err_link; + } + + client2 = i2c_new_dummy_device(client->adapter, CPLD2_ADDR); + if (!client2) { + dev_err(&client->dev, "address 0x%02x unavailable\n", + CPLD2_ADDR); + err = -EADDRINUSE; + goto err_link; + } + + mutex_init(&drvdata2->lock); + drvdata2->read_addr = 0x00; + drvdata2->client = client2; + i2c_set_clientdata(client2, drvdata2); + + /* attach client2 to be client2 of CPLD1 + for later use on port led sysfs */ + drvdata1->client2 = client2; + + hwmon_dev2 = devm_hwmon_device_register_with_groups(&client2->dev, + "CPLD2", + drvdata2, + switch_cpld_groups); + + if (IS_ERR(hwmon_dev2)) { + err = PTR_ERR(hwmon_dev2); + goto err_client2; + } + + err = sysfs_create_link(&client2->dev.kobj, &hwmon_dev2->kobj, "CPLD2"); + if (err) { + goto err_client2; + } + + //port led + err = sysfs_create_group(&client->dev.kobj, &sff_led_groups); + if (err) { + dev_err(&client->dev, + "failed to create sysfs attribute group.\n"); + goto err_link2; + } + + return 0; + +err_link2: + sysfs_remove_link(&client2->dev.kobj, "CPLD2"); + +err_client2: + if (client2) + i2c_unregister_device(client2); + +err_link: + sysfs_remove_link(&client->dev.kobj, "CPLD1"); + +exit: + dev_err(&client->dev, "probe error %d\n", err); + return err; +} + +static void switch_cpld_remove(struct i2c_client *client) +{ + struct switch_cpld_data *data = i2c_get_clientdata(client); + + sysfs_remove_group(&client->dev.kobj, &sff_led_groups); + sysfs_remove_link(&data->client2->dev.kobj, "CPLD2"); + sysfs_remove_link(&client->dev.kobj, "CPLD1"); + i2c_unregister_device(data->client2); +} + +static const struct i2c_device_id switch_cpld_ids[] = { + { "switch_cpld", 0x30 }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, switch_cpld_ids); + +static struct i2c_driver switch_cpld_driver = { + .driver = { + .name = "switch_cpld", + .owner = THIS_MODULE, + }, + .probe = switch_cpld_probe, + .remove = switch_cpld_remove, + .id_table = switch_cpld_ids, +}; + +module_i2c_driver(switch_cpld_driver); + +MODULE_AUTHOR("Budsakol Sirirattanasakul"); +MODULE_DESCRIPTION("Celestica Silverstone Switchboard CPLD driver"); +MODULE_VERSION("1.0.0"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c new file mode 100644 index 000000000000..10fda963b9b3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c @@ -0,0 +1,520 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * xcvr-cls.c - front panel port control. + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "xcvr-cls.h" + +/* FPGA front panel */ +#define PORT_CTRL 0 +#define PORT_STATUS 0x4 +#define PORT_INT_STATUS 0x8 +#define PORT_INT_MASK 0xC + +/* + * Port control degister + * LPMOD : active high, RW + * RST : active low, RW + * TXDIS : active high, RW +*/ +#define CTRL_LPMOD BIT(6) +#define CTRL_RST_L BIT(4) +#define CTRL_TXDIS BIT(0) + +/* + * Port status register + * IRQ : active low, RO + * PRESENT : active low, RO, for QSFP + * TXFAULT : active high, RO + * RXLOS : active high, RO + * MODABS : active high, RO, for SFP +*/ +#define STAT_IRQ_L BIT(5) +#define STAT_PRESENT_L BIT(4) +#define STAT_TXFAULT BIT(2) +#define STAT_RXLOS BIT(1) +#define STAT_MODABS BIT(0) + +/* + * NOTE: Interrupt and mask must be expose as bitfeild. + * Because the registers of interrupt flags are read-clear. + * + * Port interrupt flag resgister + * INT_N : interrupt flag, set when INT_N is assert. + * PRESENT : interrupt flag, set when QSFP module plugin/plugout. + * RXLOS : interrupt flag, set when rxlos is assert. + * MODABS : interrupt flag, set when SFP module plugin/plugout. +*/ +#define INTR_INT_N BIT(5) +#define INTR_PRESENT BIT(4) +#define INTR_TXFAULT BIT(2) +#define INTR_RXLOS BIT(1) +#define INTR_MODABS BIT(0) + +/* + * Port interrupt mask register + * INT_N : active low + * PRESENT : active low + * RXLOS_INT : active low + * MODABS : active low +*/ +#define MASK_INT_N_L BIT(5) +#define MASK_PRESENT_L BIT(4) +#define MASK_TXFAULT_L BIT(2) +#define MASK_RXLOS_L BIT(1) +#define MASK_MODABS_L BIT(0) + + +/* + * port_data - optical port data + * @xcvr: xcvr memory accessor + * @name: port name + * @index: front panel port index starting from 1 + */ +struct port_data { + struct xcvr_priv *xcvr; + const char *name; + unsigned int index; +}; + +/* + * xcvr_priv - port xcvr private data + * @dev: device for reference + * @base: virtual base address + * @num_ports: number of front panel ports + * @fp_devs: list of front panel port devices + */ +struct xcvr_priv { + struct device* dev; + void __iomem *base; + int port_reg_size; + int num_ports; + struct device **fp_devs; +}; + +static inline void port_setreg(struct xcvr_priv *xcvr, int reg, int index, u8 value) +{ + return iowrite8(value, xcvr->base + reg + (index - 1) * xcvr->port_reg_size); +} + +static inline u8 port_getreg(struct xcvr_priv *xcvr, int reg, int index) +{ + return ioread8(xcvr->base + reg + (index - 1) * xcvr->port_reg_size); +} + +static ssize_t qsfp_modprsL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_PRESENT_L)?1:0); +} + +static ssize_t qsfp_irqL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_IRQ_L)?1:0); +} + +static ssize_t qsfp_lpmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_LPMOD)?1:0); +} + +static ssize_t qsfp_lpmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_LPMOD; + else + data |= CTRL_LPMOD; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t qsfp_resetL_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_RST_L)?1:0); +} + +static ssize_t qsfp_resetL_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_RST_L; + else + data |= CTRL_RST_L; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t sfp_modabs_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_MODABS)?1:0); +} + +static ssize_t sfp_txfault_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_TXFAULT)?1:0); +} + +static ssize_t sfp_rxlos_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_STATUS, index); + return sprintf(buf, "%d\n", (data & STAT_RXLOS)?1:0); +} + +static ssize_t sfp_txdisable_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + return sprintf(buf, "%d\n", (data & CTRL_TXDIS)?1:0); +} + +static ssize_t sfp_txdisable_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + data = port_getreg(port_data->xcvr, PORT_CTRL, index); + if (value == 0) + data &= ~CTRL_TXDIS; + else + data |= CTRL_TXDIS; + port_setreg(port_data->xcvr, PORT_CTRL, index, data); + status = size; + } + return status; +} + +static ssize_t interrupt_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_INT_STATUS, index); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t interrupt_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtoul(buf, 0, &value); + if (status == 0) { + port_setreg(port_data->xcvr, PORT_INT_STATUS, index, value); + status = size; + } + return status; +} + +static ssize_t interrupt_mask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + u8 data; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + data = port_getreg(port_data->xcvr, PORT_INT_MASK, index); + return sprintf(buf, "0x%2.2x\n", data); +} + +static ssize_t interrupt_mask_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + ssize_t status; + long value; + struct port_data *port_data = dev_get_drvdata(dev); + unsigned int index = port_data->index; + + status = kstrtoul(buf, 0, &value); + if (status == 0) { + port_setreg(port_data->xcvr, PORT_INT_MASK, index, value); + status = size; + } + return status; +} + +DEVICE_ATTR_RO(qsfp_modprsL); +DEVICE_ATTR_RO(qsfp_irqL); +DEVICE_ATTR_RW(qsfp_lpmode); +DEVICE_ATTR_RW(qsfp_resetL); + +DEVICE_ATTR_RO(sfp_modabs); +DEVICE_ATTR_RO(sfp_txfault); +DEVICE_ATTR_RO(sfp_rxlos); +DEVICE_ATTR_RW(sfp_txdisable); + +DEVICE_ATTR_RW(interrupt); +DEVICE_ATTR_RW(interrupt_mask); + +/* qsfp_attrs */ +static struct attribute *qsfp_attrs[] = { + &dev_attr_qsfp_modprsL.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_qsfp_resetL.attr, + &dev_attr_interrupt.attr, + &dev_attr_interrupt_mask.attr, + NULL +}; + +/* sfp_attrs */ +static struct attribute *sfp_attrs[] = { + &dev_attr_sfp_modabs.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_txdisable.attr, + &dev_attr_interrupt.attr, + &dev_attr_interrupt_mask.attr, + NULL +}; + +ATTRIBUTE_GROUPS(qsfp); +ATTRIBUTE_GROUPS(sfp); + +/* A single port device init */ +static struct device* init_port(struct device *dev, + struct xcvr_priv *xcvr, + struct port_info info, + const struct attribute_group **groups) +{ + struct port_data *new_data; + + new_data = devm_kzalloc(dev, sizeof(struct port_data), GFP_KERNEL); + if (!new_data) + return ERR_PTR(-ENOMEM); + + new_data->index = info.index; + new_data->name = info.name; + new_data->xcvr = xcvr; + + return devm_hwmon_device_register_with_groups(dev, + info.name, + new_data, + groups); +} + +static void xcvr_cleanup(struct xcvr_priv *xcvr) +{ + struct device *dev; + struct port_data *data; + int i; + + for (i = 0; i < xcvr->num_ports; i++){ + dev = xcvr->fp_devs[i]; + if (dev == NULL) + continue; + data = dev_get_drvdata(dev); + sysfs_remove_link(&xcvr->dev->kobj, data->name); + } +} + +static int cls_xcvr_probe(struct platform_device *pdev) +{ + + struct xcvr_priv *xcvr; + struct cls_xcvr_platform_data *pdata; + struct resource *res; + int ret; + int i; + + struct device **port_devs; + + xcvr = devm_kzalloc(&pdev->dev, sizeof(struct xcvr_priv), GFP_KERNEL); + if (!xcvr){ + ret = -ENOMEM; + goto err_exit; + } + + dev_set_drvdata(&pdev->dev, xcvr); + + /* mmap resource */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res) { + xcvr->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(xcvr->base)){ + ret = PTR_ERR(xcvr->base); + goto err_exit; + } + } + + pdata = dev_get_platdata(&pdev->dev); + xcvr->dev = &pdev->dev; + + if (pdata) { + /* assign pdata */ + xcvr->num_ports = pdata->num_ports; + xcvr->port_reg_size = pdata->port_reg_size; + } + + /* alloc front panel device list */ + port_devs = devm_kzalloc(&pdev->dev, + xcvr->num_ports * sizeof(struct device*), + GFP_KERNEL); + if (!port_devs){ + ret = -ENOMEM; + goto err_exit; + } + + + if (pdata) { + /* create each device attrs group determined by type */ + for (i = 0; i < pdata->num_ports; i++) { + struct device *fp_dev; + + if (pdata->devices[i].type == SFP){ + fp_dev = init_port(&pdev->dev, + xcvr, + pdata->devices[i], + sfp_groups); + }else{ + fp_dev = init_port(&pdev->dev, + xcvr, + pdata->devices[i], + qsfp_groups); + } + if (IS_ERR(fp_dev)) { + dev_err(&pdev->dev, + "Failed to init port %s\n", + pdata->devices[i].name); + ret = PTR_ERR(fp_dev); + goto dev_clean_up; + } + + dev_info(&pdev->dev, + "Register port %s\n", + pdata->devices[i].name); + + WARN(sysfs_create_link(&pdev->dev.kobj, + &fp_dev->kobj, + pdata->devices[i].name), + "can't create symlink to %s\n", pdata->devices[i].name); + port_devs[i] = fp_dev; + fp_dev = NULL; + } + xcvr->fp_devs = port_devs; + } + + return 0; + +dev_clean_up: + xcvr_cleanup(xcvr); +err_exit: + return ret; + +} + + +static int cls_xcvr_remove(struct platform_device *pdev) +{ + struct xcvr_priv *xcvr = dev_get_drvdata(&pdev->dev); + xcvr_cleanup(xcvr); + return 0; +} + + +static struct platform_driver cls_xcvr_driver = { + .probe = cls_xcvr_probe, + .remove = cls_xcvr_remove, + .driver = { + .name = "cls-xcvr", + }, +}; + +module_platform_driver(cls_xcvr_driver); + +MODULE_AUTHOR("Pradchaya Phucharoen"); +MODULE_DESCRIPTION("Celestica xcvr control driver"); +MODULE_VERSION("0.0.1-3"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:cls-xcvr"); diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h new file mode 100644 index 000000000000..7659a7c0e9cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * xcvr-cls.h + * + * Pradchaya Phucharoen + * Copyright (C) 2019 Celestica Corp. + */ + +#ifndef _LINUX_I2C_CLS_H +#define _LINUX_I2C_CLS_H + +enum PORT_TYPE { + NONE = 0, + SFP, + QSFP +}; + +/* + * port_info - optical port info + * @index: front panel port index starting from 1 + * @typr: port type, see *PORT_TYPE* + */ +struct port_info { + const char *name; + unsigned int index; + enum PORT_TYPE type; +}; + +/* + * cls_xcvr_platform_data - port xcvr private data + * @port_reg_size: register range of each port + * @num_ports: number of front panel ports + * @devices: list of front panel port info + */ +struct cls_xcvr_platform_data { + unsigned int port_reg_size; + int num_ports; + struct port_info *devices; +}; + +#endif /* _LINUX_I2C_CLS_H */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py index 1aa1c0719825..0d4691b60005 100755 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py @@ -6,28 +6,39 @@ # The following data is support: # 1. Temperature sensors # 2. PSUs -# 3. Fan trays +# 3. Fan Drawers import sys import logging import subprocess -IPMI_SDR_CMD = ["ipmitool", "sdr", "elist"] +IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist'] MAX_NUM_FANS = 7 MAX_NUM_PSUS = 2 +SENSOR_NAME = 0 +SENSOR_VAL = 4 + +sensor_dict = {} def ipmi_sensor_dump(cmd): ''' Execute ipmitool command return dump output exit if any error occur. ''' + global sensor_dict sensor_dump = '' + try: - sensor_dump = subprocess.check_output(cmd) + sensor_dump = subprocess.check_output(cmd, universal_newlines=True) except subprocess.CalledProcessError as e: logging.error('Error! Failed to execute: {}'.format(cmd)) sys.exit(1) - return sensor_dump + + for line in sensor_dump.splitlines(): + sensor_info = line.split('|') + sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip() + + return True def get_reading_by_name(sensor_name, sdr_elist_dump): ''' @@ -49,7 +60,8 @@ def get_reading_by_name(sensor_name, sdr_elist_dump): ''' found = '' - for line in sdr_elist_dump.split("\n"): + for line in sdr_elist_dump.splitlines(): + line = line.decode() if sensor_name in line: found = line.strip() break @@ -67,19 +79,18 @@ def get_reading_by_name(sensor_name, sdr_elist_dump): return found -def read_temperature_sensors(ipmi_sdr_elist): - - sensor_list = [ - ('TEMP_FAN_U52', 'Fan Tray Middle Temp'), - ('TEMP_FAN_U17', 'Fan Tray Right Temp'), - ('TEMP_SW_U52', 'Switchboard Left Inlet Temp'), - ('TEMP_SW_U16', 'Switchboard Right Inlet Temp'), - ('TEMP_BB_U3', 'Baseboard Temp'), - ('TEMP_CPU', 'CPU Internal Temp'), - ('TEMP_SW_Internal', 'ASIC Internal Temp'), - ('SW_U04_Temp', 'IR3595 Chip Left Temp'), - ('SW_U14_Temp', 'IR3595 Chip Right Temp'), - ('SW_U4403_Temp', 'IR3584 Chip Temp'), +def read_temperature_sensors(): + sensor_list = [\ + ('TEMP_FAN_U52', 'Fanboard Center Temp'),\ + ('TEMP_FAN_U17', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', 'Switchboard Right Temp'),\ + ('TEMP_BB_U3', 'Baseboard Temp'),\ + ('TEMP_CPU', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', 'ASIC Internal Temp'),\ + ('SW_U04_Temp', 'IR35215 Chip Left Temp'),\ + ('SW_U14_Temp', 'IR35215 Chip Right Temp'),\ + ('SW_U4403_Temp', 'IR3584 Chip Temp'),\ ] output = '' @@ -90,20 +101,18 @@ def read_temperature_sensors(ipmi_sdr_elist): output += "Temperature Sensors\n" output += "Adapter: IPMI adapter\n" for sensor in sensor_list: - reading = get_reading_by_name(sensor[0],ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(sensor[1]), - reading, + output += sensor_format.format('{}:'.format(sensor[1]),\ + sensor_dict[sensor[0]],\ width=str(max_name_width+1)) output += '\n' return output +def read_fan_sensors(num_fans): -def read_fan_sensors(num_fans, ipmi_sdr_elist): - - sensor_list = [ - ('Fan{}_Status', 'Status'), - ('Fan{}_Front', 'Fan {} front'), - ('Fan{}_Rear', 'Fan {} rear'), + sensor_list = [\ + ('Fan{}_Status', 'Fan Drawer {} Status'),\ + ('Fan{}_Front', 'Fan {} front'),\ + ('Fan{}_Rear', 'Fan {} rear'),\ ] output = '' @@ -111,33 +120,31 @@ def read_fan_sensors(num_fans, ipmi_sdr_elist): # Find max length of sensor calling name max_name_width = max(len(sensor[1]) for sensor in sensor_list) - output += "Fan Trays\n" + output += "Fan Drawers\n" output += "Adapter: IPMI adapter\n" for fan_num in range(1, num_fans+1): for sensor in sensor_list: ipmi_sensor_name = sensor[0].format(fan_num) display_sensor_name = sensor[1].format(fan_num) - reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(display_sensor_name), - reading, + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ width=str(max_name_width+1)) output += '\n' return output - -def read_psu_sensors(num_psus, ipmi_sdr_elist): - - sensor_list = [ - ('PSU{}_Status', 'PSU {} Status'), - ('PSU{}_Fan', 'PSU {} Fan'), - ('PSU{}_VIn', 'PSU {} Input Voltag'), - ('PSU{}_CIn', 'PSU {} Input Current'), - ('PSU{}_PIn', 'PSU {} Input Power'), - ('PSU{}_Temp1', 'PSU {} Temp1'), - ('PSU{}_Temp2', 'PSU {} Temp2'), - ('PSU{}_VOut', 'PSU {} Output Voltag'), - ('PSU{}_COut', 'PSU {} Output Current'), - ('PSU{}_POut', 'PSU {} Output Power'), +def read_psu_sensors(num_psus): + + sensor_list = [\ + ('PSU{}_Status', 'PSU {} Status'),\ + ('PSU{}_Fan', 'PSU {} Fan 1'),\ + ('PSU{}_VIn', 'PSU {} Input Voltage'),\ + ('PSU{}_CIn', 'PSU {} Input Current'),\ + ('PSU{}_PIn', 'PSU {} Input Power'),\ + ('PSU{}_Temp1', 'PSU {} Ambient Temp'),\ + ('PSU{}_Temp2', 'PSU {} Hotspot Temp'),\ + ('PSU{}_VOut', 'PSU {} Output Voltage'),\ + ('PSU{}_COut', 'PSU {} Output Current'),\ + ('PSU{}_POut', 'PSU {} Output Power'),\ ] output = '' @@ -151,22 +158,21 @@ def read_psu_sensors(num_psus, ipmi_sdr_elist): for sensor in sensor_list: ipmi_sensor_name = sensor[0].format(psu_num) display_sensor_name = sensor[1].format(psu_num) - reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist) - output += sensor_format.format('{}:'.format(display_sensor_name), - reading, + output += sensor_format.format('{}:'.format(display_sensor_name),\ + sensor_dict[ipmi_sensor_name],\ width=str(max_name_width+1)) output += '\n' return output - def main(): output_string = '' - ipmi_sdr_elist = ipmi_sensor_dump(IPMI_SDR_CMD) - output_string += read_temperature_sensors(ipmi_sdr_elist) - output_string += read_psu_sensors(MAX_NUM_PSUS, ipmi_sdr_elist) - output_string += read_fan_sensors(MAX_NUM_FANS, ipmi_sdr_elist) - print(output_string) + if ipmi_sensor_dump(IPMI_SDR_CMD): + output_string += read_temperature_sensors() + output_string += read_psu_sensors(MAX_NUM_PSUS) + output_string += read_fan_sensors(MAX_NUM_FANS) + + print(output_string) if __name__ == '__main__': diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors index 405d92c2b3cc..5d740a9eb7d7 100755 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors @@ -8,4 +8,4 @@ if [ -t 1 ] ; then fi docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@" -docker exec -$DOCKER_EXEC_FLAGS pmon platform_sensors.py "$@" +docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@" diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh new file mode 100755 index 000000000000..973c90378dca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh @@ -0,0 +1,26 @@ +#!/bin/bash +REBOOT_CAUSE_DIR="/host/reboot-cause" +HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +REBOOT_TIME=$(date) + +if [ $# -ne 1 ]; then + echo "Require reboot type" + exit 1 +fi + +if [ ! -d "$REBOOT_CAUSE_DIR" ]; then + mkdir $REBOOT_CAUSE_DIR +fi + +echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE} + +# Best effort to write buffered data onto the disk +sync ; sync ; sync ; sleep 3 + +# BMC cold power-cyle +ipmitool chassis power cycle &> /dev/null + +# System should reboot by now and avoid the script returning to caller +sleep 10 + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py index 20a2b6d1063a..7da0814059d9 100644 --- a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py @@ -1,8 +1,5 @@ from setuptools import setup -DEVICE_NAME = 'celestica' -HW_SKU = 'x86_64-cel_silverstone-r0' - setup( name='sonic-platform', version='1.0', @@ -17,7 +14,7 @@ 'sonic_platform', ], package_dir={ - 'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)}, + 'sonic_platform': 'sonic_platform'}, classifiers=[ 'Development Status :: 3 - Alpha', 'Environment :: Plugins', diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py new file mode 100644 index 000000000000..d3c24cb008dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py @@ -0,0 +1,2 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import platform diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py new file mode 100644 index 000000000000..da898c9a147e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py @@ -0,0 +1,452 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Chassis information which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper + from sonic_py_common import device_info + from sonic_platform_base.sfp_base import SfpBase + from .helper import APIHelper + import time + import os + import re + import shutil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN_TRAY = 7 +NUM_FAN = 2 +NUM_PSU = 2 +NUM_THERMAL = 14 +NUM_SFP = 32 +NUM_COMPONENT = 10 + +IPMI_OEM_NETFN = "0x3A" +IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06" + +IPMI_SET_SYS_LED_CMD = "0x07 0x00 {}" +IPMI_GET_SYS_LED_CMD = "0x08 0x00" + +LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/getreg" +LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/setreg" +LPC_STATUS_LED_REG = "0xA162" + +ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt" +TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt" + +class Chassis(ChassisBase): + """Platform-specific Chassis class""" + + #led color status + SYSLED_COLOR_VAL_MAP = { + 'off': '0xff', + 'green': '0xdc', + 'amber': '0xec', + 'green_blink_1hz': '0xdd', + 'green_blink_4hz': '0xde', + 'amber_blink_1hz': '0xed', + 'amber_blink_4hz': '0xee', + 'green_amber_1hz': '0xcd', + 'green_amber_4hz': '0xce' + } + + SYSLED_VAL_COLOR_DESC_MAP = { + "0xff": "off", + "0xdc": "green", + "0xec": "amber", + "0xdd": "green blinking 1Hz", + "0xde": "green blinking 4Hz", + "0xed": "amber blinking 1Hz", + "0xee": "amber blinking 4Hz", + "0xcd": "green & amber alternate 1Hz", + "0xce": "green & amber alternate 4Hz" + } + + def __init__(self): + ChassisBase.__init__(self) + self._api_helper = APIHelper() + self.sfp_module_initialized = False + self._sfp_list = [] + self.sfp_status_dict = {} + self._watchdog = None + self._airflow_direction = None + + self.__initialize_eeprom() + self.is_host = self._api_helper.is_host() + + self.__initialize_fan() + self.__initialize_psu() + self.__initialize_thermals() + self.__initialize_components() + + def __initialize_sfp(self): + sfputil_helper = SfpUtilHelper() + port_config_file_path = device_info.get_path_to_port_config_file() + sfputil_helper.read_porttab_mappings(port_config_file_path, 0) + + #from sonic_platform.sfp import Sfp + from sonic_platform.sfp import Sfp + for index in range(0, NUM_SFP): + #sfp = Sfp(index, sfputil_helper.logical[index]) + sfp = Sfp(index, sfputil_helper.physical_to_logical[index + 1]) + self._sfp_list.append(sfp) + self.sfp_status_dict[sfp.index] = '1' if sfp.get_presence() else '0' + self.sfp_module_initialized = True + + def __initialize_psu(self): + from sonic_platform.psu import Psu + for index in range(0, NUM_PSU): + psu = Psu(index) + self._psu_list.append(psu) + + def __initialize_fan(self): + from sonic_platform.fan_drawer import FanDrawer + for i in range(NUM_FAN_TRAY): + fandrawer = FanDrawer(i) + self._fan_drawer_list.append(fandrawer) + self._fan_list.extend(fandrawer._fan_list) + + def __initialize_thermals(self): + from sonic_platform.thermal import Thermal + # airflow = self.__get_air_flow() + for index in range(0, NUM_THERMAL): + thermal = Thermal(index) + self._thermal_list.append(thermal) + + def __initialize_eeprom(self): + from sonic_platform.eeprom import Eeprom + self._eeprom = Eeprom() + + def __initialize_components(self): + from sonic_platform.component import Component + for index in range(0, NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + def initizalize_system_led(self): + pass + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_mac() + + def get_revision(self): + """ + Retrieves the hardware revision for the chassis + Returns: + A string containing the hardware revision for this chassis. + """ + return self._eeprom.get_revision() + + def get_serial(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_eeprom() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + status, raw_cause = self._api_helper.ipmi_raw( + IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE) + hx_cause = raw_cause.split()[0] if status and len( + raw_cause.split()) > 0 else 00 + + # This tmp copy is to retain the reboot-cause only for the current boot + if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE): + shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE) + + if hx_cause == "77" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE): + with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file: + reboot_info = hw_cause_file.readline().rstrip('\n') + match = re.search(r'Reason:(.*),Time:(.*)', reboot_info) + if match is not None: + if match.group(1) == 'system': + return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot') + + reboot_cause = { + "00": self.REBOOT_CAUSE_HARDWARE_OTHER, + "11": self.REBOOT_CAUSE_POWER_LOSS, + "22": self.REBOOT_CAUSE_NON_HARDWARE, + "33": self.REBOOT_CAUSE_NON_HARDWARE, + "44": self.REBOOT_CAUSE_NON_HARDWARE, + "55": self.REBOOT_CAUSE_HARDWARE_OTHER, + "66": self.REBOOT_CAUSE_WATCHDOG, + "77": self.REBOOT_CAUSE_POWER_LOSS, + "88": self.REBOOT_CAUSE_WATCHDOG + }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER) + + description = { + "00": "Hardware Reason", + "11": "Power On Reset", + "22": "Soft-Set CPU Warm Reset", + "33": "Soft-Set CPU Cold Reset", + "44": "CPU Warm Reset", + "55": "CPU Cold Reset", + "66": "GPIO Watchdog Reset", + "77": "Power Cycle Reset", + "88": "Hardware Watchdog Reset" + }.get(hx_cause, "Unknown reason") + + return (reboot_cause, description) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # SFP event + if not self.sfp_module_initialized: + self.__initialize_sfp() + + sfp_dict = {} + + SFP_REMOVED = '0' + SFP_INSERTED = '1' + + SFP_PRESENT = True + SFP_ABSENT = False + + start_time = time.time() + time_period = timeout/float(1000) #Convert msecs to secs + + while time.time() < (start_time + time_period) or timeout == 0: + for sfp in self._sfp_list: + port_idx = sfp.index + if self.sfp_status_dict[port_idx] == SFP_REMOVED and \ + sfp.get_presence() == SFP_PRESENT: + sfp_dict[port_idx] = SFP_INSERTED + self.sfp_status_dict[port_idx] = SFP_INSERTED + elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \ + sfp.get_presence() == SFP_ABSENT: + sfp_dict[port_idx] = SFP_REMOVED + self.sfp_status_dict[port_idx] = SFP_REMOVED + + if sfp_dict: + return True, {'sfp':sfp_dict} + + time.sleep(0.5) + + return True, {'sfp':{}} # Timeout + + ############################################################## + ######################## SFP methods ######################### + ############################################################## + + def get_num_sfps(self): + """ + Retrieves the number of sfps available on this chassis + Returns: + An integer, the number of sfps available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return len(self._sfp_list) + + def get_all_sfps(self): + """ + Retrieves all sfps available on this chassis + Returns: + A list of objects derived from SfpBase representing all sfps + available on this chassis + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + + return self._sfp_list + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + For example, 1 for Ethernet0, 2 for Ethernet4 and so on. + Returns: + An object dervied from SfpBase representing the specified sfp + """ + if not self.sfp_module_initialized: + self.__initialize_sfp() + return super(Chassis, self).get_sfp(index-1) + + ############################################################## + ####################### Other methods ######################## + ############################################################## + + def get_watchdog(self): + """ + Retreives hardware watchdog device on this chassis + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + if self._watchdog is None: + from sonic_platform.watchdog import Watchdog + self._watchdog = Watchdog() + + return self._watchdog + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._api_helper.hwsku + + def get_presence(self): + """ + Retrieves the presence of the Chassis + Returns: + bool: True if Chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._eeprom.get_pn() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the PSU status LED + Note: Only support green and off + Returns: + bool: True if status LED state is set successfully, False if not + """ + color_val = self.SYSLED_COLOR_VAL_MAP.get(color) + if color_val == None: + return False + + status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_STATUS_LED_REG, color_val) + return status + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + color_val = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_STATUS_LED_REG) + color = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, "N/A") + return color + + def get_airflow_direction(self): + if self._airflow_direction == None: + try: + vendor_extn = self._eeprom.get_vendor_extn() + airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF + if airflow_type == 'FB': + direction = 'exhaust' + elif airflow_type == 'BF': + direction = 'intake' + else: + direction = 'N/A' + except (AttributeError, IndexError): + direction = 'N/A' + + self._airflow_direction = direction + + return self._airflow_direction + + def get_port_or_cage_type(self, index): + """ + Retrieves sfp port or cage type corresponding to physical port + + Args: + index: An integer (>=0), the index of the sfp to retrieve. + + Returns: + The masks of all types of port or cage that can be supported on the port + Types are defined in sfp_base.py + """ + if index in range(1, 32+1): + return (SfpBase.SFP_PORT_TYPE_BIT_QSFP28 | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \ + SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFPDD | SfpBase.SFP_PORT_TYPE_BIT_QSFP) + else: + raise NotImplementedError + + diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py new file mode 100644 index 000000000000..8748404d9931 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py @@ -0,0 +1,181 @@ +############################################################################# +# Celestica +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +import os.path +import subprocess +import re + +try: + from sonic_platform_base.component_base import ComponentBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NAME_IDX = 0 +DESC_IDX = 1 +VER_API_IDX = 2 + +BASE_CPLD_VER_CMD = "0x03 0x00 0x01 0x00" +FAN_CPLD_VER_CMD = "0x03 0x01 0x01 0x00" +BIOS_VER_PATH = "/sys/class/dmi/id/bios_version" +BMC_VER_CMD1 = ["ipmitool", "mc", "info"] +BMC_VER_CMD2 = ["grep", "Firmware Revision"] +ONIE_VER_CMD = ["cat", "/host/machine.conf"] +SSD_VER_CMD = ["smartctl", " -i", "/dev/sda"] +BASE_GETREG_PATH = "/sys/devices/platform/baseboard-lpc/getreg" +MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0" +FPGA_VER_MEM_OFFSET = 0 +NETFN = "0x3A" +COME_CPLD_VER_REG = "0xA1E0" + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index): + COMPONENT_LIST = [ + ("BIOS", "Basic Input/Output System", self.__get_bios_ver), + ("ONIE", "Open Network Install Environment", self.__get_onie_ver), + ("BMC", "Baseboard Management Controller", self.__get_bmc_ver), + ("FPGA", "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver), + ("CPLD COMe", "COMe board CPLD", self.__get_come_cpld_ver), + ("CPLD BASE", "CPLD for board functions and watchdog", self.__get_cpld_ver_from_bmc), + ("CPLD SW1", "CPLD for port control QSFP(1-16)", self.__get_sw_cpld1_ver), + ("CPLD SW2", "CPLD for port control QSFP(17-32) SFP(33-34)", self.__get_sw_cpld2_ver), + ("CPLD FAN", "CPLD for fan control and status", self.__get_cpld_ver_from_bmc), + ("SSD", "Solid State Drive - {}", self.__get_ssd_ver) + ] + self.index = component_index + self.name = COMPONENT_LIST[self.index][NAME_IDX] + self.description = COMPONENT_LIST[self.index][DESC_IDX] + self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX] + self._api_helper = APIHelper() + + def __i2c_get(self, bus, i2caddr, offset): + try: + return int(subprocess.check_output(['/usr/sbin/i2cget', '-y', '-f', str(bus), str(i2caddr), str(offset)]), 16) + except (FileNotFoundError, subprocess.CalledProcessError): + return -1 + + def __get_bios_ver(self): + return self._api_helper.read_txt_file(BIOS_VER_PATH) + + def __get_onie_ver(self): + onie_ver = "N/A" + status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD) + if status: + ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data) + if ret != None: + onie_ver = ret.group(0) + return onie_ver + + def __get_bmc_ver(self): + bmc_ver = "Unknown" + status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2) + if status: + bmc_ver_data = raw_bmc_data.split(":") + bmc_ver = bmc_ver_data[-1].strip() if len( + bmc_ver_data) > 1 else bmc_ver + return bmc_ver + + def __get_fpga_ver(self): + fpga_ver = "Unknown" + status, reg_val = self._api_helper.pci_get_value( + MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET) + if status: + major = reg_val[0] >> 16 + minor = int(bin(reg_val[0])[16:32], 2) + fpga_ver = '{}.{}'.format(major, minor) + return fpga_ver + + def __get_come_cpld_ver(self): + cpld_ver_str = self._api_helper.lpc_getreg(BASE_GETREG_PATH, COME_CPLD_VER_REG) + if not cpld_ver_str: + return "N/A" + + cpld_ver = int(cpld_ver_str, 16) + return "{:x}.{:x}".format((cpld_ver >> 4) & 0xF, cpld_ver & 0xF) + + def __get_cpld_ver_from_bmc(self): + cpld_ver = "N/A" + cmd = BASE_CPLD_VER_CMD + + if self.name == "CPLD FAN": + cmd = FAN_CPLD_VER_CMD + + (rc, op) = self._api_helper.ipmi_raw(NETFN, cmd) + if rc and len(op) == 2: + cpld_ver = op[0] + '.' + op[1] + + return cpld_ver + + def __get_sw_cpld1_ver(self): + val = self.__i2c_get(4, 0x30, 0) + if val != -1: + return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf) + else: + return 'N/A' + + def __get_sw_cpld2_ver(self): + val = self.__i2c_get(4, 0x31, 0) + if val != -1: + return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf) + else: + return 'N/A' + + def __get_ssd_ver(self): + ssd_ver = "N/A" + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data) + if ret != None: + ssd_ver = ret.group(1) + return ssd_ver + + def __get_ssd_model(self): + model = "N/A" + + status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD) + if status: + ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data) + if ret != None: + try: + model = ret.group(1) + except (IndexError): + pass + + return model + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + # For SSD get the model name from device + if self.get_name() == "SSD": + return self.description.format(self.__get_ssd_model()) + + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + return self.__get_version() diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py new file mode 100644 index 000000000000..ed5891f4f5d5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py @@ -0,0 +1,123 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os + import sys + import re + import json + import fcntl + + if sys.version_info.major == 3: + from io import StringIO + else: + from cStringIO import StringIO + + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +NULL = 'N/A' +EEPROM_TMP_FILE = '/tmp/eeprom_dump.json' + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + + EEPROM_DECODE_HEADLINES = 6 + + def __init__(self): + self._eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom" + super(Eeprom, self).__init__(self._eeprom_path, 0, '', True) + self._eeprom = self._load_eeprom() + + def __parse_output(self, decode_output): + decode_output.replace('\0', '') + lines = decode_output.split('\n') + lines = lines[self.EEPROM_DECODE_HEADLINES:] + _eeprom_info_dict = dict() + + for line in lines: + try: + match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line) + if match is not None: + idx = match.group(1) + value = match.group(2).rstrip('\0') + + _eeprom_info_dict[idx] = value + except Exception: + pass + return _eeprom_info_dict + + def _load_eeprom(self): + eeprom_dict = {} + + if os.path.exists(EEPROM_TMP_FILE): + with open(EEPROM_TMP_FILE, 'r') as fd: + eeprom_dict = json.load(fd) + + return eeprom_dict + + original_stdout = sys.stdout + sys.stdout = StringIO() + rv = -1 + try: + rv = self.read_eeprom_db() + except BaseException: + pass + + if rv == 0: + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + eeprom_dict = self.__parse_output(decode_output) + else: + e = self.read_eeprom() + if e is None: + sys.stdout = original_stdout + return {} + + self.decode_eeprom(e) + decode_output = sys.stdout.getvalue() + sys.stdout = original_stdout + + (is_valid, valid_crc) = self.is_checksum_valid(e) + if not is_valid: + return {} + + eeprom_dict = self.__parse_output(decode_output) + + if len(eeprom_dict) != 0: + with open(EEPROM_TMP_FILE, 'w') as fd: + fcntl.flock(fd, fcntl.LOCK_EX) + json.dump(eeprom_dict, fd) + fcntl.flock(fd, fcntl.LOCK_UN) + + return eeprom_dict + + def get_eeprom(self): + return self._eeprom + + def get_product(self): + return self._eeprom.get('0x21', NULL) + + def get_pn(self): + return self._eeprom.get('0x22', NULL) + + def get_serial(self): + return self._eeprom.get('0x23', NULL) + + def get_mac(self): + return self._eeprom.get('0x24', NULL) + + def get_revision(self): + return self._eeprom.get('0x26', NULL) + + def get_vendor_extn(self): + return self._eeprom.get('0xFD', NULL) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py similarity index 51% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py index 1a18eed9c8d5..30ef3d934bc1 100644 --- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py @@ -17,37 +17,36 @@ raise ImportError(str(e) + "- required module not found") -FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R", "FAN-3F", "FAN-3R", - "FAN-4F", "FAN-4R", "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R", "FAN-7F", "FAN-7R"] - IPMI_OEM_NETFN = "0x3A" IPMI_SENSOR_NETFN = "0x04" IPMI_FAN_SPEED_CMD = "0x2D {}" IPMI_AIR_FLOW_CMD = "0x0A {}" IPMI_FAN_PRESENT_CMD = "0x06 0x03 {}" +IPMI_FAN_SPEED_CPLD_CMD = "0x03 0x01 0x01 {}" IPMI_SET_FAN_LED_CMD = "0x07 {} {}" IPMI_GET_FAN_LED_CMD = "0x08 {}" -IPMI_SET_PWM = "0x03 0x01 0x02 {} {}" - -IPMI_FRU_MODEL_KEY = "Board Part Number" -IPMI_FRU_SERIAL_KEY = "Board Serial" - -MAX_OUTLET = 24700 -MAX_INLET = 29700 -SPEED_TOLERANCE = 10 -FAN1_FRONT_SS_ID = "0x0D" -FAN1_REAR_SS_ID = "0x45" +FAN_NAME_TEMPLATE = "{}Fan{}{}" + +FAN_FRONT_MAX_SPEED = 24700 +FAN_REAR_MAX_SPEED = 29700 +FAN_PSU_MAX_SPEED = 26500 +FAN_SPEED_TOLERANCE = 25 + +CPLD_REG_FANTRAY_BASE = 0x22 +FAN_FRONT_SID_BASE = 0x0D # IPMI Sensor ID +FAN_REAR_SID_BASE = 0x45 # IPMI Sensor ID +FAN_FRU_ID_BASE = 6 +PSU_FRU_ID_BASE = 3 +PSU_FAN_SID_BASE = {\ + 0: 0x33,\ + 1: 0x3D\ +} FAN_LED_OFF_CMD = "0x00" FAN_LED_GREEN_CMD = "0x01" FAN_LED_RED_CMD = "0x02" FAN1_LED_CMD = "0x04" -FAN_PWM_REGISTER_START = 0x22 -FAN_PWM_REGISTER_STEP = 0x10 -FAN1_FRU_ID = 6 - -NUM_OF_FAN_TRAY = 7 -PSU_FAN1_FRONT_SS_ID = "0x33" +NUM_FAN_TRAY = 7 class Fan(FanBase): @@ -58,10 +57,24 @@ def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0): self.fan_index = fan_index self.fan_tray_index = fan_tray_index self.is_psu_fan = is_psu_fan + self.name = None if self.is_psu_fan: self.psu_index = psu_index + self.index = NUM_FAN_TRAY * 2 + self.psu_index + self.max_speed = FAN_PSU_MAX_SPEED + self.sid_offset = PSU_FAN_SID_BASE[self.psu_index] + else: + self.index = self.fan_tray_index * 2 + self.fan_index + if fan_index % 2 == 0: + self.is_front = True + self.sid_offset = FAN_FRONT_SID_BASE + self.fan_tray_index + self.max_speed = FAN_FRONT_MAX_SPEED + else: + self.is_front = False + self.sid_offset = FAN_REAR_SID_BASE + self.fan_tray_index + self.max_speed = FAN_REAR_MAX_SPEED + self._api_helper = APIHelper() - self.index = self.fan_tray_index * 2 + self.fan_index def get_direction(self): """ @@ -70,13 +83,30 @@ def get_direction(self): A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST depending on fan direction """ - direction = self.FAN_DIRECTION_EXHAUST - fan_direction_key = hex(self.fan_tray_index) if not self.is_psu_fan else hex( - self.psu_index + NUM_OF_FAN_TRAY) - status, raw_flow = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, IPMI_AIR_FLOW_CMD.format(fan_direction_key)) - if status and raw_flow == "01": - direction = self.FAN_DIRECTION_INTAKE + direction = self.FAN_DIRECTION_NOT_APPLICABLE + + if not self.is_psu_fan: + offset = hex(self.fan_tray_index) + else: + offset = hex(NUM_FAN_TRAY + self.psu_index) + + status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\ + IPMI_AIR_FLOW_CMD.format(offset)) + if status: + if output == "00": + direction = self.FAN_DIRECTION_EXHAUST + elif output == "01": + direction = self.FAN_DIRECTION_INTAKE + elif self.is_psu_fan: + # Trying to deduce from PSU model + status, output = self._api_helper.ipmi_fru_id(PSU_FRU_ID_BASE + self.fan_tray_index, + "Board Part Number") + if status and output: + model = output.split(':')[-1].strip() + if model == "TDPS1500AB7C": + direction = self.FAN_DIRECTION_INTAKE + elif model == "TDPS1500AB6E": + direction = self.FAN_DIRECTION_EXHAUST return direction @@ -86,24 +116,20 @@ def get_speed(self): Returns: An integer, the percentage of full fan speed, in the range 0 (off) to 100 (full speed) - - Note: - M = 150 - Max F2B = 24700 RPM - Max B2F = 29700 RPM """ + speed = 0 - max_rpm = MAX_OUTLET if self.fan_index % 2 == 0 else MAX_INLET - fan1_ss_start = FAN1_FRONT_SS_ID if self.fan_index % 2 == 0 else FAN1_REAR_SS_ID - - ss_id = hex(int(fan1_ss_start, 16) + self.fan_tray_index) if not self.psu_index else hex( - int(PSU_FAN1_FRONT_SS_ID, 16) + self.fan_tray_index) - status, raw_ss_read = self._api_helper.ipmi_raw( - IPMI_SENSOR_NETFN, IPMI_FAN_SPEED_CMD.format(ss_id)) + if not self.is_psu_fan: + multiplier = 150.0 + else: + multiplier = 200.0 - ss_read = raw_ss_read.split()[0] - rpm_speed = int(ss_read, 16)*150 - speed = int(float(rpm_speed)/max_rpm * 100) + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_FAN_SPEED_CMD.format(self.sid_offset)) + if status: + raw_speed = output.split()[0] + rpm_speed = int(raw_speed, 16) * multiplier + speed = int((rpm_speed/self.max_speed) * 100) return speed @@ -120,8 +146,18 @@ def get_target_speed(self): 0 : when PWM mode is use pwm : when pwm mode is not use """ - target = 0 - return target + if self.is_psu_fan: + # Ignored for tolerance check + return self.get_speed() + + offset = hex(CPLD_REG_FANTRAY_BASE + (16 * self.fan_tray_index)) + status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\ + IPMI_FAN_SPEED_CPLD_CMD.format(offset)) + if status: + fan_pwm = int(output, 16) + target_speed = int(fan_pwm / 255 * 100) + + return target_speed def get_speed_tolerance(self): """ @@ -130,7 +166,8 @@ def get_speed_tolerance(self): An integer, the percentage of variance from target speed which is considered tolerable """ - return SPEED_TOLERANCE + + return FAN_SPEED_TOLERANCE def set_speed(self, speed): """ @@ -140,29 +177,10 @@ def set_speed(self, speed): in the range 0 (off) to 100 (full speed) Returns: A boolean, True if speed is set successfully, False if not - Notes: - pwm setting mode must set as Manual - manual: ipmitool raw 0x3a 0x06 0x01 0x0 - auto: ipmitool raw 0x3a 0x06 0x01 0x1 """ - # ipmitool raw 0x3a 0x03 0x01 0x02 {register} {pwm_speed} - # register = 22 32 42 52 62 72 82 - - if self.is_psu_fan: - # TODO - return False - speed_hex = hex(int(float(speed)/100 * 255)) - fan_register_hex = hex(FAN_PWM_REGISTER_START + - (self.fan_tray_index*FAN_PWM_REGISTER_STEP)) - - set_speed_cmd = IPMI_SET_PWM.format(fan_register_hex, speed_hex) - status, set_speed_res = self._api_helper.ipmi_raw( - IPMI_OEM_NETFN, set_speed_cmd) - - set_speed = False if not status else True - - return set_speed + # FAN speed is controlled by BCM always + return False def set_status_led(self, color): """ @@ -180,7 +198,7 @@ def set_status_led(self, color): """ if self.is_psu_fan: - # Not support + # Not supported for PSU return False led_cmd = { @@ -208,9 +226,9 @@ def get_status_led(self): STATUS_LED_COLOR_RED = "red" STATUS_LED_COLOR_OFF = "off" """ - if self.is_psu_fan: - # Not support - return self.STATUS_LED_COLOR_OFF + if not self.get_presence() or self.is_psu_fan: + # Not supported for PSU + return "N/A" fan_selector = hex(int(FAN1_LED_CMD, 16) + self.fan_tray_index) status, hx_color = self._api_helper.ipmi_raw( @@ -224,16 +242,30 @@ def get_status_led(self): return status_led + ############################################################## + ###################### Device methods ######################## + ############################################################## + def get_name(self): """ Retrieves the name of the device Returns: string: The name of the device """ - fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format( - self.psu_index+1, self.fan_index+1) - return fan_name + if not self.name: + if not self.is_psu_fan: + psu_name = "" + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = " Front" if self.is_front else " Rear" + else: + psu_name = "PSU {} ".format(self.psu_index + 1) + fan_id = " {}".format(self.fan_tray_index + 1) + fan_type = "" + + self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type) + + return self.name def get_presence(self): """ @@ -241,13 +273,12 @@ def get_presence(self): Returns: bool: True if FAN is present, False if not """ - if self.is_psu_fan: - return True presence = False - status, raw_present = self._api_helper.ipmi_raw( + + status, output = self._api_helper.ipmi_raw( IPMI_OEM_NETFN, IPMI_FAN_PRESENT_CMD.format(hex(self.index))) - if status and raw_present == "00": + if status and output == "00": presence = True return presence @@ -258,17 +289,13 @@ def get_model(self): Returns: string: Model/part number of device """ - if self.is_psu_fan: - return "Unknown" - - model = "Unknown" - ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + model = "N/A" - fru_pn_list = raw_model.split() - if len(fru_pn_list) > 4: - model = fru_pn_list[4] + if not self.is_psu_fan: + status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index, + "Board Part Number") + if status and output: + model = output.split(':')[-1].strip() return model @@ -278,17 +305,13 @@ def get_serial(self): Returns: string: Serial number of device """ - if self.is_psu_fan: - return "Unknown" - - serial = "Unknown" - ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID - status, raw_model = self._api_helper.ipmi_fru_id( - ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + serial = "N/A" - fru_sr_list = raw_model.split() - if len(fru_sr_list) > 3: - serial = fru_sr_list[3] + if not self.is_psu_fan: + status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index, + "Board Serial") + if status and output: + serial = output.split(':')[-1].strip() return serial @@ -299,3 +322,24 @@ def get_status(self): A boolean value, True if device is operating properly, False if not """ return self.get_presence() and self.get_speed() > 0 + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + If the agent cannot determine the parent-relative position + for some reason, or if the associated value of + entPhysicalContainedIn is'0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device + or -1 if cannot determine the position + """ + + return self.fan_index + 1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True if not self.is_psu_fan else False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..a7e5f167ad79 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py @@ -0,0 +1,108 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the the Fan-Drawers' information available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_FAN = 2 + + +class FanDrawer(FanDrawerBase): + def __init__(self, fantray_index): + FanDrawerBase.__init__(self) + self._index = fantray_index + 1 + self._init_fan(fantray_index) + + def _init_fan(self, fantray_index): + from sonic_platform.fan import Fan + for index in range(NUM_FAN): + fan = Fan(fantray_index, index) + self._fan_list.append(fan) + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + Args: + color: A string representing the color with which to set the + fan drawer status LED + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + return self._fan_list[0].get_status_led() + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "Drawer {}".format(self._index) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self._index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py new file mode 100644 index 000000000000..3e2cb798df91 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py @@ -0,0 +1,190 @@ +import fcntl +import os +import struct +import subprocess +import fcntl + +from mmap import * +from sonic_py_common.general import check_output_pipe +from sonic_py_common.device_info import get_platform_and_hwsku + +from sonic_py_common import device_info + +HOST_CHK_CMD = "docker > /dev/null 2>&1" +EMPTY_STRING = "" + + +class APIHelper(): + + def __init__(self): + (self.platform, self.hwsku) = get_platform_and_hwsku() + + def is_host(self): + ret,data = subprocess.getstatusoutput(HOST_CHK_CMD) + if ret != 0: + return False + return True + + def pci_get_value(self, resource, offset): + status = True + result = "" + try: + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + mm.seek(int(offset)) + read_data_stream = mm.read(4) + result = struct.unpack('I', read_data_stream) + except: + status = False + return status, result + + def run_command(self, cmd1_args, cmd2_args=None): + status = True + result = "" + args = [cmd1_args] + ([cmd2_args] if cmd2_args is not None else []) + try: + result = check_output_pipe(*args) + except subprocess.CalledProcessError: + status = False + return status, result + + def run_interactive_command(self, cmd): + try: + subprocess.call(cmd) + except: + return False + return True + + def read_txt_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.read() + return data.strip() + except IOError: + pass + return None + + def read_one_line_file(self, file_path): + try: + with open(file_path, 'r') as fd: + data = fd.readline() + return data.strip() + except IOError: + pass + return None + + def write_txt_file(self, file_path, value): + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def get_cpld_reg_value(self, getreg_path, register): + cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register) + status, result = self.run_command(cmd) + return result if status else None + + def ipmi_raw(self, netfn, cmd): + status = True + result = "" + cmd = "ipmitool raw {} {}".format(netfn, cmd) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + + return status, result + + def ipmi_fru_id(self, id, key=None): + status = True + result = "" + cmd1_args = ["ipmitool", "fru", "print", str(id)] + if not key: + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + else: + cmd2_args = ["grep", str(key)] + status, result = self.run_command(cmd1_args, cmd2_args) + return status, result + + def ipmi_set_ss_thres(self, id, threshold_key, value): + status = True + result = "" + cmd = "ipmitool sensor thresh '{}' {} {}".format( + str(id), str(threshold_key), str(value)) + ret, data = subprocess.getstatusoutput(cmd) + if ret != 0: + status = False + else: + result = data.strip() + + return status, result + + def lpc_getreg(self, getreg_path, reg): + """ + Get the cpld reg through lpc interface + + Args: + getreg_path: getreg sysfs path + reg: 16 bits reg addr in hex str format + + Returns: + A str, register value in hex str format + """ + try: + file = open(getreg_path, 'w+') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_SH) + + file.write(reg) + file.flush() + + # Seek to the beginning of the file + file.seek(0) + + # Read the content of the file + result = file.readline().strip() + except (OSError, IOError, FileNotFoundError): + result = None + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return result + + def lpc_setreg(self, setreg_path, reg, val): + """ + Set the cpld reg through lpc interface + + Args: + setreg_path: setreg sysfs path + reg: 16 bits reg addr in hex str format + val: 8 bits register value in hex str format + + Returns: + A boolean, True if speed is set successfully, False if not + """ + status = True + try: + file = open(setreg_path, 'w') + # Acquire an exclusive lock on the file + fcntl.flock(file, fcntl.LOCK_EX) + + data = "{} {}".format(reg, val) + file.write(data) + file.flush() + except (OSError, IOError, FileNotFoundError): + status = False + finally: + # Release the lock and close the file + fcntl.flock(file, fcntl.LOCK_UN) + file.close() + + return status diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py new file mode 100644 index 000000000000..0f8bc0830384 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py @@ -0,0 +1,15 @@ +# +# pcie_base.py +# +# Abstract base class for implementing platform-specific +# PCIE functionality for SONiC +# + +try: + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError (str(e) + " - required module not found") + +class Pcie(PcieUtil): + def __init__(self, platform_path): + PcieUtil.__init__(self, platform_path) diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py similarity index 100% rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py new file mode 100644 index 000000000000..ced1022796de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py @@ -0,0 +1,338 @@ +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs status which are available in the platform +# +############################################################################# + +try: + from sonic_platform_base.psu_base import PsuBase + from .helper import APIHelper + from sonic_platform.fan import Fan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SENSOR_READ_CMD = "0x2D {}" +IPMI_SENSOR_THRESH_CMD = "0x27 {}" +IPMI_FRU_MODEL_KEY = "Board Part Number" +IPMI_FRU_SERIAL_KEY = "Board Serial" + +PSU_LED_OFF_CMD = "0x00" +PSU_LED_GREEN_CMD = "0x01" +PSU_LED_AMBER_CMD = "0x02" + +psu_ipmi_id = {\ + 1: {\ + "TEMP": "0x34",\ + "VOUT": "0x36",\ + "COUT": "0x37",\ + "POUT": "0x38",\ + "STATUS": "0x2f",\ + "FRU": 3,\ + }, + 2: {\ + "TEMP": "0x3E",\ + "VOUT": "0x40",\ + "COUT": "0x41",\ + "POUT": "0x42",\ + "STATUS": "0x39",\ + "FRU": 4,\ + } +} + +ANALOG_READ_OFFSET = 0 +EVENT_0_7_OFFSET = 2 +EVENT_8_14_OFFSET = 3 + +FRU_SERIAL = 3 +FRU_MODEL = 4 + +TH_LNC = 0 # Low Non-critical threshold +TH_LCR = 1 # Low Critical threshold +TH_LNR = 2 # Low Non-recoverable threshold +TH_HNC = 3 # High Non-critical threshold +TH_HCR = 4 # High Critical threshold +TH_HNR = 5 # High Non-recoverable threshold + +PSU_VOUT_SS_ID = ["0x36", "0x40"] +PSU_COUT_SS_ID = ["0x37", "0x41"] +PSU_POUT_SS_ID = ["0x38", "0x42"] +PSU_STATUS_REG = ["0x39", "0x2f"] + + +class Psu(PsuBase): + """Platform-specific Psu class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index+1 + # PSU has only one FAN + fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index) + self._fan_list.append(fan) + self._api_helper = APIHelper() + + def get_voltage(self): + """ + Retrieves current PSU voltage output + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + psu_voltage = 0.0 + psu_vout_key = psu_ipmi_id[self.index]['VOUT'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_vout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx6x10^-2 + psu_voltage = int(value, 16) * 6 / 100.0 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + psu_current = 0.0 + psu_cout_key = psu_ipmi_id[self.index]['COUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx57x10^-2 + psu_current = int(value, 16) * 57 / 100.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_power = 0.0 + psu_pout_key = psu_ipmi_id[self.index]['POUT'] + status, output = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key)) + value = output.split()[ANALOG_READ_OFFSET] + # Formula: Rx68x10^-1 + psu_power = int(value, 16) * 68 / 10.0 + + return psu_power + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and passed all + its internal self-tests, False if not. + """ + return self.get_status() + + def get_status_led(self): + """ + Gets the state of the PSU status LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + if not self.get_presence(): + return "N/A" + + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + + return self.STATUS_LED_COLOR_OFF + + def __get_sensor_threshold(self, sensor_id, th_offset): + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_THRESH_CMD.format(sensor_id)) + if status: + value = output.split() + if (int(value[0],16) >> th_offset) & 0x01 == 0x01: + return value[th_offset + 1] + + raise NotImplementedError + + def get_temperature(self): + """ + Retrieves current temperature reading from PSU + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + # PSU's ambient temperature sensor is considered as the PSU temperature + psu_temp = 0.0 + psu_temp_id = psu_ipmi_id[self.index]['TEMP'] + status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\ + IPMI_SENSOR_READ_CMD.format(psu_temp_id)) + if status: + value = output.split()[ANALOG_READ_OFFSET] + psu_temp = float(int(value, 16)) + + return psu_temp + + def get_temperature_high_threshold(self): + """ + Retrieves the high threshold temperature of PSU + Returns: + A float number, the high threshold temperature of PSU in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + # Using critical-high as high threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['TEMP'], TH_HCR) + psu_temp_high_threshold = float(int(value, 16)) + + return psu_temp_high_threshold + + def get_voltage_high_threshold(self): + """ + Retrieves the high threshold PSU voltage output + Returns: + A float number, the high threshold output voltage in volts, + e.g. 12.1 + """ + # Using critical-high as high threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_HCR) + # Formula: Rx6x10^-2 + psu_voltage_high_crit = int(value, 16) * 6 / 100.0 + + return psu_voltage_high_crit + + def get_voltage_low_threshold(self): + """ + Retrieves the low threshold PSU voltage output + Returns: + A float number, the low threshold output voltage in volts, + e.g. 12.1 + """ + # Using critical-low as low threshold + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_LCR) + # Formula: Rx6x10^-2 + psu_voltage_low_crit = int(value, 16) * 6 / 100.0 + + return psu_voltage_low_crit + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + # Using critical-high as the maximum available safe power limit + + value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['POUT'], TH_HCR) + # Formula: Rx12x10^0 + psu_power_high_crit = int(value, 16) * 12.0 + + return psu_power_high_crit + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return "PSU {}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + psu_presence = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False + + return psu_presence + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + Returns: + string: Model/part number of device + """ + model = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_MODEL_KEY) + + fru_pn_list = raw_model.split() + if len(fru_pn_list) > FRU_MODEL: + model = fru_pn_list[FRU_MODEL] + else: + model = "N/A" + + return model + + def get_serial(self): + """ + Retrieves the serial number of the device + Returns: + string: Serial number of device + """ + serial = "Unknown" + if self.get_presence(): + ipmi_fru_idx = psu_ipmi_id[self.index]['FRU'] + status, raw_model = self._api_helper.ipmi_fru_id( + ipmi_fru_idx, IPMI_FRU_SERIAL_KEY) + + fru_sr_list = raw_model.split() + if len(fru_sr_list) > FRU_SERIAL: + serial = fru_sr_list[FRU_SERIAL] + else: + model = "N/A" + + return serial + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + psu_status = False + psu_pstatus_key = psu_ipmi_id[self.index]['STATUS'] + status, raw_status_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key)) + status_byte = raw_status_read.split()[EVENT_0_7_OFFSET] + + if status: + failure_detected = True if int(status_byte, 16) & 0x02 == 0x02 else False + input_lost = True if int(status_byte, 16) & 0x08 == 0x08 else False + psu_status = False if (input_lost or failure_detected) else True + + return psu_status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py new file mode 100644 index 000000000000..204ee659f91d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py @@ -0,0 +1,232 @@ +#!/usr/bin/env python + +############################################################################# +# Celestica +# +# Module contains an implementation of SONiC Platform Base API and +# provides the sfp status which are available in the platform +# +############################################################################# + +import time + +try: + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +SFP_I2C_START = 10 +I2C_EEPROM_PATH = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom' +RESET_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_resetL' +LP_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_lpmode' +PRS_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_modprsL' + + +class Sfp(SfpOptoeBase): + """Platform-specific SfpOptoe class""" + + def __init__(self, sfp_index=0, sfp_name=None): + SfpOptoeBase.__init__(self) + + self.index = sfp_index + 1 + self._api_helper = APIHelper() + self._name = sfp_name + self._sfp_type = None + + def _detect_sfp_type(self): + sfp_type = 'N/A' + info = self.get_transceiver_info() + if info: + sfp_type = info.get("type_abbrv_name") + # XXX: Need this hack until xcvrd is refactored + if sfp_type in ["OSFP-8X", "QSFP-DD"]: + sfp_type = "QSFP_DD" + return sfp_type + + @property + def sfp_type(self): + if self._sfp_type is None: + self._sfp_type = self._detect_sfp_type() + return self._sfp_type + + def get_eeprom_path(self): + port_to_i2c_mapping = SFP_I2C_START + self.index - 1 + port_eeprom_path = I2C_EEPROM_PATH.format(port_to_i2c_mapping) + return port_eeprom_path + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self._name + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + if not self.get_presence(): + return False + reset = self.get_reset_status() + if reset: + status = False + else: + status = True + return status + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + reset_status_raw = self._api_helper.read_txt_file( + RESET_PATH.format((self.index))).rstrip() + if not reset_status_raw: + return False + + reg_value = int(reset_status_raw, 16) + bin_format = bin(reg_value)[2:].zfill(32) + return bin_format[::-1][self.index - 1] == '0' + + def get_presence(self): + """ + Retrieves the presence of the PSU + Returns: + bool: True if PSU is present, False if not + """ + presence_status_raw = self._api_helper.read_txt_file( + PRS_PATH.format((self.index))).rstrip() + + if not presence_status_raw: + return False + + content = presence_status_raw.rstrip() + reg_value = int(content, 16) + + + # Mask absent + absence_mask = 0x1 + + # ModPrsL is active low + if reg_value & absence_mask == 0: + return True + + return False + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + try: + with open(LP_PATH.format((self.index))) as reg_file: + content = reg_file.readline().rstrip() + lpmode = int(content, 16) + except (ValueError, IOError) as e: + return False + + # check LPMode is active low + if lpmode == 0: + return False + + return True + + def reset(self): + """ + Reset SFP and return all user module settings to their default srate. + Returns: + A boolean, True if successful, False if not + """ + # Check for invalid port_num + + try: + reg_file = open(RESET_PATH.format((self.index)), "r+") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + content = reg_file.readline().rstrip() + + # File content is a string containing the hex representation of the + # register + reg_value = int(content, 16) + + # Determind if port_num start from 1 or 0 + bit_index = self.index - 1 + + # Mask off the bit corresponding to our port + mask = (1 << bit_index) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register + # to take port out of reset + try: + reg_file = open(RESET_PATH.format((self.index)), "w") + except IOError as e: + print("Error: unable to open file: %s" % str(e)) + return False + + reg_value = reg_value | mask + reg_file.seek(0) + reg_file.write(hex(reg_value).rstrip('L')) + reg_file.close() + + return True + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + try: + with open(LP_PATH.format((self.index)), "r+") as reg_file: + reg_file.seek(0) + content = hex(lpmode) + reg_file.write(content) + except IOError as e: + return False + + return True + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of + vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if self.sfp_type == "QSFP_DD": + return super().get_error_description() + + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + return self.SFP_STATUS_OK + + def get_position_in_parent(self): + return self.index + + def is_replaceable(self): + return True diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py new file mode 100644 index 000000000000..9f0c9e17adfa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py @@ -0,0 +1,205 @@ +############################################################################# +# Celestica +# +# Thermal contains an implementation of SONiC Platform Base API and +# provides the thermal device status which are available in the platform +# +############################################################################# + +import os +import re +import os.path + +try: + from sonic_platform_base.thermal_base import ThermalBase + from .helper import APIHelper +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +IPMI_SENSOR_NETFN = "0x04" +IPMI_SS_READ_CMD = "0x2D {}" +IPMI_SS_THRESHOLD_CMD = "0x27 {}" +HIGH_TRESHOLD_SET_KEY = "unc" +DEFAULT_VAL = 'N/A' + +class Thermal(ThermalBase): + """Platform-specific Thermal class""" + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self._api_helper = APIHelper() + self.index = thermal_index + thermal_list = [\ + ('TEMP_FAN_U52', '0x00', 'Fanboard Center Temp'),\ + ('TEMP_FAN_U17', '0x01', 'Fanboard Right Temp'),\ + ('TEMP_SW_U52', '0x02', 'Switchboard Left Temp'),\ + ('TEMP_SW_U16', '0x03', 'Switchboard Right Temp'),\ + ('TEMP_BB_U3', '0x04', 'Baseboard Temp'),\ + ('TEMP_CPU', '0x05', 'CPU Internal Temp'),\ + ('TEMP_SW_Internal', '0x61', 'ASIC Internal Temp'),\ + ('SW_U04_Temp', '0x4F', 'IR35215 Chip Left Temp'),\ + ('SW_U14_Temp', '0x56', 'IR35215 Chip Right Temp'),\ + ('SW_U4403_Temp', '0x5D', 'IR3584 Chip Temp'),\ + ('PSU1_Temp1', '0x34', 'PSU 1 Ambient Temp'),\ + ('PSU1_Temp2', '0x35', 'PSU 1 Hotspot Temp'),\ + ('PSU2_Temp1', '0x3E', 'PSU 2 Ambient Temp'),\ + ('PSU2_Temp2', '0x3F', 'PSU 2 Hotspot Temp'),\ + ] + self.sensor_id = thermal_list[self.index][0] + self.sensor_reading_addr = thermal_list[self.index][1] + self.sensor_name = thermal_list[self.index][2] + + temp = self.get_temperature(True) + self.minimum_thermal = temp + self.maximum_thermal = temp + + def get_temperature(self, skip_record=False): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celsius up to nearest thousandth + of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + status, raw_ss_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr)) + if status and len(raw_ss_read.split()) > 0: + ss_read = raw_ss_read.split()[0] + temperature = float(int(ss_read, 16)) + + if temperature != 0.0: + if not skip_record: + # Record maximum + if temperature > self.maximum_thermal: + self.maximum_thermal = temperature + + # Record minimum + if temperature < self.minimum_thermal: + self.minimum_thermal = temperature + + return temperature + else: + return DEFAULT_VAL + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + Returns: + A float number, the high threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[4] + high_threshold = float(int(ss_read, 16)) + if high_threshold != 0.0: + return high_threshold + else: + return DEFAULT_VAL + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + Returns: + A float number, the low threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return DEFAULT_VAL + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + status, ret_txt = self._api_helper.ipmi_set_ss_thres( + self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature) + return status + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal + Args : + temperature: A float number up to nearest thousandth of one degree Celsius, + e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_critical_threshold = 0.0 + status, raw_up_thres_read = self._api_helper.ipmi_raw( + IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr)) + if status and len(raw_up_thres_read.split()) > 6: + ss_read = raw_up_thres_read.split()[5] + high_critical_threshold = float(int(ss_read, 16)) + if high_critical_threshold != 0.0: + return high_critical_threshold + else: + return DEFAULT_VAL + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded temperature of thermal + Returns: + A float number, the minimum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.minimum_thermal + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded temperature of thermal + Returns: + A float number, the maximum recorded temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + return self.maximum_thermal + + ############################################################## + ###################### Device methods ######################## + ############################################################## + + def get_name(self): + """ + Retrieves the name of the thermal device + Returns: + string: The name of the thermal device + """ + return self.sensor_name + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + return True if self.get_temperature() > 0 else False + + def get_status(self): + """ + Retrieves the operational status of the device + Returns: + A boolean value, True if device is operating properly, False if not + """ + return self.get_presence() + + def is_replaceable(self): + """ + Retrieves whether thermal module is replaceable + Returns: + A boolean value, True if replaceable, False if not + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py new file mode 100644 index 000000000000..011759b0f457 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py @@ -0,0 +1,247 @@ +############################################################################# +# Celestica Silverstone +# +# Watchdog contains an implementation of SONiC Platform Base API +# +############################################################################# +import os +import time +import ctypes +import fcntl +import subprocess +import array +import syslog + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard-lpc/' +WDT_TIMER_REG = '0xA181' +WDT_ENABLE_REG = '0xA182' +WDT_FEED_REG = '0xA183' +WDT_REMAINTIME_REG1 = '0xA185' +WDT_REMAINTIME_REG2 = '0xA186' +ENABLE_CMD = 0x1 +DISABLE_CMD = 0x0 +WDT_COMMON_ERROR = -1 + + +class Watchdog(WatchdogBase): + + timeout = 0 + + def __init__(self): + WatchdogBase.__init__(self) + + # Set default value + #self._disable() + #self.timeout = self._gettimeout() + self.keepalive = int(1) + + def _get_lpc_reg(self, reg): + file_path = os.path.join(PLATFORM_CPLD_PATH, 'getreg') + status = True + value = None + + try: + with open(file_path, "r+") as fd: + fd.seek(0) + fd.write(reg) + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e)) + return False, None + try: + with open(file_path) as fd: + value = fd.readline().rstrip() + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e)) + return False, None + return True, value + + def _set_lpc_reg(self, reg, val): + file_path = os.path.join(PLATFORM_CPLD_PATH, 'setreg') + value = '{} {}'.format(reg, hex(val)) + + try: + with open(file_path, 'w') as fd: + fd.write(str(value)) + except Exception: + return False + return True + + def _enable(self): + """ + Turn on the watchdog timer + """ + # echo 0xA182 0x1 > /sys/devices/platform/baseboard-lpc/setreg + status = self._set_lpc_reg(WDT_ENABLE_REG, ENABLE_CMD) + + if not status: + return False + + return True + + def _disable(self): + """ + Trun off the watchdog timer + """ + # echo 0xA182 0x0 > /sys/devices/platform/baseboard-lpc/setreg + status = self._set_lpc_reg(WDT_ENABLE_REG, DISABLE_CMD) + if not status: + return False + + return True + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + if bool(self.keepalive % 2): + status = self._set_lpc_reg(WDT_FEED_REG, ENABLE_CMD) + else: + status = self._set_lpc_reg(WDT_FEED_REG, DISABLE_CMD) + + if not status: + syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed") + + self.keepalive = self.keepalive+1 + if (self.keepalive >= 11): + self.keepalive = 1 + + def _settimeout(self, seconds): + """ + set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + second_int = { + 30: 1, + 60: 2, + 180: 3, + 240: 4, + 300: 5, + 420: 6, + 600: 7, + }.get(seconds) + + status = self._set_lpc_reg(WDT_TIMER_REG, second_int) + if not status: + syslog.syslog(syslog.LOG_ERR, "Set timeout failed") + return self._gettimeout() + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + status, data = self._get_lpc_reg(WDT_TIMER_REG) + if status: + pass + + bin_val = bin(int(data, 16))[2:].zfill(3) + + return { + '001': 30, + '010': 60, + '011': 180, + '100': 240, + '101': 300, + '110': 420, + '111': 600, + }.get(bin_val) + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* available + value. + Returns: + An integer specifying the *actual* number of seconds the watchdog + was armed with. On failure returns -1. + """ + avaliable_second = [30, 60, 180, 240, 300, 420, 600] + ret = WDT_COMMON_ERROR + + if seconds < 0 or seconds not in avaliable_second: + return ret + + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + + if self.is_armed(): + self._keepalive() + else: + status = self._enable() + if not status: + syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed") + return ret + + ret = self.timeout + except IOError as e: + syslog.syslog(syslog.LOG_ERR, "{}".format(e)) + + return ret + + def disarm(self): + """ + Disarm the hardware watchdog + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + disarmed = False + if self.is_armed(): + try: + status = self._disable() + if status: + disarmed = True + except IOError: + syslog.syslog(syslog.LOG_ERR, "{}".format(e)) + + return disarmed + + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + Returns: + A boolean, True if watchdog is armed, False if not + """ + status, data = self._get_lpc_reg(WDT_ENABLE_REG) + if status: + pass + + armed = int(data, 16) & 0x1 + + return bool(armed) + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds remaining on + the watchdog timer + Retruns: + An integer specifying the number of seconds remaining on the + watchdog timer. If the watchdog is not armed, returns -1 + """ + retime = 0 + + status, data1 = self._get_lpc_reg(WDT_REMAINTIME_REG1) + if status: + pass + + status, data2 = self._get_lpc_reg(WDT_REMAINTIME_REG2) + if status: + pass + + retime = (int(data2,16) & 0xff) + ((int(data1,16) & 0x3f) * 256) + + if retime <= 0: + return WDT_COMMON_ERROR + else: + return int(retime/10)