From a1b54d985ac7641f64752c0ca898f983ff79e381 Mon Sep 17 00:00:00 2001 From: Trevor Elliott Date: Thu, 21 Mar 2024 13:02:56 -0400 Subject: [PATCH] Replace a debug assert with a TODO (#8210) --- cranelift/codegen/src/isa/x64/abi.rs | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs index 5b33950d5789..20108c948bbf 100644 --- a/cranelift/codegen/src/isa/x64/abi.rs +++ b/cranelift/codegen/src/isa/x64/abi.rs @@ -212,11 +212,6 @@ impl ABIMachineSpec for X64ABIMachineSpec { continue; } - debug_assert!( - call_conv != CallConv::Winch || rcs.len() == 1, - "Winch is unable to handle values wider than 64-bits" - ); - let mut slots = ABIArgSlotVec::new(); for (rc, reg_ty) in rcs.iter().zip(reg_tys.iter()) { let intreg = *rc == RegClass::Int; @@ -1103,7 +1098,13 @@ fn get_intreg_for_retval( 1 => Some(regs::rdx()), // The Rust ABI for i128s needs this. _ => None, }, - CallConv::Winch => is_last.then(|| regs::rax()), + + CallConv::Winch => { + // TODO: Once Winch supports SIMD, this will need to be updated to support values + // returned in more than one register. + // https://github.com/bytecodealliance/wasmtime/issues/8093 + is_last.then(|| regs::rax()) + } CallConv::Probestack => todo!(), CallConv::WasmtimeSystemV | CallConv::AppleAarch64 => unreachable!(), }