From 6575b892e4d4ff132cdfbb028504d59bd8f2e0a8 Mon Sep 17 00:00:00 2001 From: slavek-kucera <53339291+slavek-kucera@users.noreply.github.com> Date: Tue, 30 Apr 2024 16:59:50 +0200 Subject: [PATCH] feat: Validate even-odd register requirements of machine instructions --- clients/vscode-hlasmplugin/CHANGELOG.md | 3 + parser_library/src/checking/instr_operand.cpp | 25 ++- parser_library/src/checking/instr_operand.h | 19 +- parser_library/src/context/instruction.h | 20 ++ .../src/context/instruction_details.thh | 176 ++++++++++-------- parser_library/src/diagnostic_op.cpp | 12 +- parser_library/src/diagnostic_op.h | 3 +- .../test/diagnostics_check_test.cpp | 2 +- .../test/processing/mach_instr_test.cpp | 26 +++ 9 files changed, 197 insertions(+), 89 deletions(-) diff --git a/clients/vscode-hlasmplugin/CHANGELOG.md b/clients/vscode-hlasmplugin/CHANGELOG.md index 9f3853dc8..81e659540 100644 --- a/clients/vscode-hlasmplugin/CHANGELOG.md +++ b/clients/vscode-hlasmplugin/CHANGELOG.md @@ -2,6 +2,9 @@ ## ****Unreleased**** +#### Added +- Validate even-odd register requirements of machine instructions + ## [1.13.0](https://github.com/eclipse-che4z/che-che4z-lsp-for-hlasm/compare/1.12.0...1.13.0) (2024-04-24) #### Added diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index 804dc3039..b1c18103c 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -51,6 +51,21 @@ bool machine_operand::is_size_corresponding_unsigned(int operand, int size) return operand >= 0 && operand <= (1ll << size) - 1; } +namespace { +bool check_value_parity(int operand, even_odd_register reg) +{ + switch (reg) + { + case even_odd_register::NONE: + return true; + case even_odd_register::ODD: + return !!(operand & 1); + case even_odd_register::EVEN: + return !(operand & 1); + } +} +} // namespace + bool machine_operand::is_simple_operand(const machine_operand_format& operand) { return (operand.first.is_signed == false && operand.first.size == 0 && operand.second.is_signed == false @@ -303,13 +318,19 @@ bool one_operand::check( } return false; } - if (!to_check.identifier.is_signed && !is_size_corresponding_unsigned(value, to_check.identifier.size)) + if (!to_check.identifier.is_signed + && (!is_size_corresponding_unsigned(value, to_check.identifier.size) + || !check_value_parity(value, to_check.identifier.evenodd) || value < to_check.identifier.min_register)) { auto boundary = (1ll << to_check.identifier.size) - 1; + static constexpr std::string_view reg_qual[] = { "", "odd", "even" }; switch (to_check.identifier.type) { case machine_operand_type::REG: - diag = diagnostic_op::error_M120(instr_name, operand_range); + diag = diagnostic_op::error_M120(instr_name, + operand_range, + reg_qual[(int)to_check.identifier.evenodd], + to_check.identifier.min_register); break; case machine_operand_type::MASK: diag = diagnostic_op::error_M121(instr_name, operand_range); diff --git a/parser_library/src/checking/instr_operand.h b/parser_library/src/checking/instr_operand.h index f95309163..8dc43e2c7 100644 --- a/parser_library/src/checking/instr_operand.h +++ b/parser_library/src/checking/instr_operand.h @@ -78,17 +78,26 @@ enum class machine_operand_type : uint8_t RELOC_IMM, }; +enum class even_odd_register : uint8_t +{ + NONE, + ODD, + EVEN, +}; + // Describes a component of machine operand format. Specifies allowed values. struct parameter { - bool is_signed; - uint8_t size; - machine_operand_type type; - - constexpr bool is_empty() const { return (!is_signed && type == machine_operand_type::NONE && size == 0); } + bool is_signed : 1; + uint8_t size : 7; + machine_operand_type type : 4; + even_odd_register evenodd : 2 = even_odd_register::NONE; + uint8_t min_register : 2 = 0; bool operator==(const parameter&) const = default; + constexpr bool is_empty() const { return *this == parameter {}; } + std::string to_string() const; }; diff --git a/parser_library/src/context/instruction.h b/parser_library/src/context/instruction.h index 3fe049870..9921dd786 100644 --- a/parser_library/src/context/instruction.h +++ b/parser_library/src/context/instruction.h @@ -207,6 +207,21 @@ enum class mach_format : unsigned char constexpr checking::parameter empty = { false, 0, checking::machine_operand_type::NONE }; constexpr checking::parameter reg = { false, 4, checking::machine_operand_type::REG }; +constexpr checking::parameter reg_nz = { + false, 4, checking::machine_operand_type::REG, checking::even_odd_register::NONE, 1 +}; +constexpr checking::parameter reg_2 = { + false, 4, checking::machine_operand_type::REG, checking::even_odd_register::NONE, 2 +}; +constexpr checking::parameter reg_odd = { + false, 4, checking::machine_operand_type::REG, checking::even_odd_register::ODD +}; +constexpr checking::parameter reg_even = { + false, 4, checking::machine_operand_type::REG, checking::even_odd_register::EVEN +}; +constexpr checking::parameter reg_even_nz = { + false, 4, checking::machine_operand_type::REG, checking::even_odd_register::EVEN, 2 +}; constexpr checking::parameter dis_reg = { false, 4, checking::machine_operand_type::DIS_REG }; constexpr checking::parameter dis_reg_r = { false, 4, checking::machine_operand_type::REG }; constexpr checking::parameter mask = { false, 4, checking::machine_operand_type::MASK }; @@ -247,6 +262,11 @@ constexpr checking::machine_operand_format dxb_12_4x4_U(dis_12u, dis_reg, base_) constexpr checking::machine_operand_format dxb_20_4x4_S(dis_20s, dis_reg, base_); constexpr checking::machine_operand_format dvb_12_5x4_U(dis_12u, vec_reg, base_); constexpr checking::machine_operand_format reg_4_U(reg, empty, empty); +constexpr checking::machine_operand_format reg_4_U_nz(reg_nz, empty, empty); +constexpr checking::machine_operand_format reg_4_U_2(reg_2, empty, empty); +constexpr checking::machine_operand_format reg_4_U_odd(reg_odd, empty, empty); +constexpr checking::machine_operand_format reg_4_U_even(reg_even, empty, empty); +constexpr checking::machine_operand_format reg_4_U_even_nz(reg_even_nz, empty, empty); constexpr checking::machine_operand_format mask_4_U(mask, empty, empty); constexpr checking::machine_operand_format imm_4_U(imm_4u, empty, empty); constexpr checking::machine_operand_format imm_8_S(imm_8s, empty, empty); diff --git a/parser_library/src/context/instruction_details.thh b/parser_library/src/context/instruction_details.thh index e1ed69623..2899b5370 100644 --- a/parser_library/src/context/instruction_details.thh +++ b/parser_library/src/context/instruction_details.thh @@ -36,38 +36,58 @@ DEFINE_INSTRUCTION_FORMAT(RIS_4, mach_format::RIS, reg_4_U, imm_8_S, mask_4_U, d DEFINE_INSTRUCTION_FORMAT(RR_1, mach_format::RR, reg_4_U) DEFINE_INSTRUCTION_FORMAT(RR_2_m, mach_format::RR, mask_4_U, reg_4_U) DEFINE_INSTRUCTION_FORMAT(RR_2, mach_format::RR, reg_4_U, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RR_2_e, mach_format::RR, reg_4_U_even, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RR_2_ee, mach_format::RR, reg_4_U_even, reg_4_U_even) DEFINE_INSTRUCTION_FORMAT(RRD_3, mach_format::RRD, reg_4_U, reg_4_U, reg_4_U) DEFINE_INSTRUCTION_FORMAT(RRE_0, mach_format::RRE) DEFINE_INSTRUCTION_FORMAT(RRE_1, mach_format::RRE, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRE_1_e, mach_format::RRE, reg_4_U_even) DEFINE_INSTRUCTION_FORMAT(RRE_2, mach_format::RRE, reg_4_U, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRE_2_e, mach_format::RRE, reg_4_U_even, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRE_2_ne, mach_format::RRE, reg_4_U, reg_4_U_even) +DEFINE_INSTRUCTION_FORMAT(RRE_2_ne_01, mach_format::RRE, reg_4_U, reg_4_U_even_nz) +DEFINE_INSTRUCTION_FORMAT(RRE_2_ee, mach_format::RRE, reg_4_U_even, reg_4_U_even) +DEFINE_INSTRUCTION_FORMAT(RRE_2_ee_11, mach_format::RRE, reg_4_U_even_nz, reg_4_U_even_nz) DEFINE_INSTRUCTION_FORMAT(RRF_a_3, mach_format::RRF_a, reg_4_U, reg_4_U, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRF_a_3_e, mach_format::RRF_a, reg_4_U_even, reg_4_U, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRF_a_3_ee_112, mach_format::RRF_a, reg_4_U_even_nz, reg_4_U_even_nz, reg_4_U_2) DEFINE_INSTRUCTION_FORMAT(RRF_a_4, mach_format::RRF_a, reg_4_U, reg_4_U, reg_4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RRF_a_4_opt, mach_format::RRF_a, reg_4_U, reg_4_U, reg_4_U_opt, mask_4_U_opt) DEFINE_INSTRUCTION_FORMAT(RRF_b_3, mach_format::RRF_b, reg_4_U, reg_4_U, reg_4_U) +DEFINE_INSTRUCTION_FORMAT(RRF_b_3_eee_111, mach_format::RRF_b, reg_4_U_even_nz, reg_4_U_even_nz, reg_4_U_even_nz) DEFINE_INSTRUCTION_FORMAT(RRF_b_4, mach_format::RRF_b, reg_4_U, reg_4_U, reg_4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RRF_b_4_opt, mach_format::RRF_b, reg_4_U, reg_4_U, reg_4_U, mask_4_U_opt) +DEFINE_INSTRUCTION_FORMAT(RRF_b_4_opt_ene, mach_format::RRF_b, reg_4_U_even, reg_4_U, reg_4_U_even, mask_4_U_opt) DEFINE_INSTRUCTION_FORMAT(RRF_c_3, mach_format::RRF_c, reg_4_U, reg_4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RRF_c_3_opt, mach_format::RRF_c, reg_4_U, reg_4_U, mask_4_U_opt) +DEFINE_INSTRUCTION_FORMAT(RRF_c_3_opt_e, mach_format::RRF_c, reg_4_U_even, reg_4_U, mask_4_U_opt) +DEFINE_INSTRUCTION_FORMAT(RRF_c_3_opt_ee, mach_format::RRF_c, reg_4_U_even, reg_4_U_even, mask_4_U_opt) DEFINE_INSTRUCTION_FORMAT(RRF_d_3, mach_format::RRF_d, reg_4_U, reg_4_U, mask_4_U) +DEFINE_INSTRUCTION_FORMAT(RRF_d_3_e, mach_format::RRF_d, reg_4_U_even, reg_4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RRF_e_3, mach_format::RRF_e, reg_4_U, mask_4_U, reg_4_U) DEFINE_INSTRUCTION_FORMAT(RRF_e_4, mach_format::RRF_e, reg_4_U, mask_4_U, reg_4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RRS_4, mach_format::RRS, reg_4_U, reg_4_U, mask_4_U, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(RS_a_2, mach_format::RS_a, reg_4_U, db_12_4_U) +DEFINE_INSTRUCTION_FORMAT(RS_a_2_e, mach_format::RS_a, reg_4_U_even, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(RS_a_3, mach_format::RS_a, reg_4_U, reg_4_U, db_12_4_U) +DEFINE_INSTRUCTION_FORMAT(RS_a_3_ee, mach_format::RS_a, reg_4_U_even, reg_4_U_even, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(RS_b_3, mach_format::RS_b, reg_4_U, mask_4_U, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(RSI_3, mach_format::RSI, reg_4_U, reg_4_U, rel_addr_imm_16_S) DEFINE_INSTRUCTION_FORMAT(RSL_a_1, mach_format::RSL_a, db_12_4x4L_U) DEFINE_INSTRUCTION_FORMAT(RSL_b_3, mach_format::RSL_b, reg_4_U, db_12_8x4L_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RSY_a_3, mach_format::RSY_a, reg_4_U, reg_4_U, db_20_4_S) +DEFINE_INSTRUCTION_FORMAT(RSY_a_3_ee, mach_format::RSY_a, reg_4_U_even, reg_4_U_even, db_20_4_S) DEFINE_INSTRUCTION_FORMAT(RSY_b_3_su, mach_format::RSY_b, reg_4_U, db_20_4_S, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RSY_b_3_us, mach_format::RSY_b, reg_4_U, mask_4_U, db_20_4_S) DEFINE_INSTRUCTION_FORMAT(RSY_b_3_ux, mach_format::RSY_b, reg_4_U, mask_4_U, dxb_20_4x4_S) DEFINE_INSTRUCTION_FORMAT(RX_a_2_ux, mach_format::RX_a, reg_4_U, dxb_12_4x4_U) +DEFINE_INSTRUCTION_FORMAT(RX_a_2_ux_e, mach_format::RX_a, reg_4_U_even, dxb_12_4x4_U) DEFINE_INSTRUCTION_FORMAT(RX_b_2, mach_format::RX_b, mask_4_U, dxb_12_4x4_U) DEFINE_INSTRUCTION_FORMAT(RXE_2, mach_format::RXE, reg_4_U, dxb_12_4x4_U) DEFINE_INSTRUCTION_FORMAT(RXE_3_xm, mach_format::RXE, reg_4_U, dxb_12_4x4_U, mask_4_U) DEFINE_INSTRUCTION_FORMAT(RXF_3_x, mach_format::RXF, reg_4_U, reg_4_U, dxb_12_4x4_U) DEFINE_INSTRUCTION_FORMAT(RXY_a_2, mach_format::RXY_a, reg_4_U, dxb_20_4x4_S) +DEFINE_INSTRUCTION_FORMAT(RXY_a_2_e, mach_format::RXY_a, reg_4_U_even, dxb_20_4x4_S) DEFINE_INSTRUCTION_FORMAT(RXY_b_2, mach_format::RXY_b, mask_4_U, dxb_20_4x4_S) DEFINE_INSTRUCTION_FORMAT(S_0, mach_format::S) DEFINE_INSTRUCTION_FORMAT(S_1_u, mach_format::S, db_12_4_U) @@ -91,7 +111,7 @@ DEFINE_INSTRUCTION_FORMAT(SS_e_4_rb, mach_format::SS_e, reg_4_U, reg_4_U, db_12_ DEFINE_INSTRUCTION_FORMAT(SS_f_2, mach_format::SS_f, db_12_4_U, db_12_8x4L_U) DEFINE_INSTRUCTION_FORMAT(SSE_2, mach_format::SSE, db_12_4_U, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(SSF_3_dr, mach_format::SSF, db_12_4_U, db_12_4_U, reg_4_U) -DEFINE_INSTRUCTION_FORMAT(SSF_3_rd, mach_format::SSF, reg_4_U, db_12_4_U, db_12_4_U) +DEFINE_INSTRUCTION_FORMAT(SSF_3_rd_e, mach_format::SSF, reg_4_U_even, db_12_4_U, db_12_4_U) DEFINE_INSTRUCTION_FORMAT(VRI_a_2, mach_format::VRI_a, vec_reg_5_U, imm_16_U) DEFINE_INSTRUCTION_FORMAT(VRI_a_3, mach_format::VRI_a, vec_reg_5_U, imm_16_S, mask_4_U) DEFINE_INSTRUCTION_FORMAT(VRI_b_4, mach_format::VRI_b, vec_reg_5_U, imm_8_U, imm_8_U, mask_4_U) @@ -384,10 +404,10 @@ DEFINE_INSTRUCTION(CDLGBR, RRF_e_4, 1501, UNI_SINCE_Z11, "Convert from Logical ( DEFINE_INSTRUCTION(CDLGTR, RRF_e_4, 1547, UNI_SINCE_Z11, "Convert from Logical (long DFP<-64)") DEFINE_INSTRUCTION(CDPT, RSL_b_3, 1548, UNI_SINCE_Z13, "Convert from Packed (To Long DFP)") DEFINE_INSTRUCTION(CDR, RR_2, 1464, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare (long HFP)", comparison) -DEFINE_INSTRUCTION(CDS, RS_a_3, 649, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Double and Swap (32)", cas) -DEFINE_INSTRUCTION(CDSG, RSY_a_3, 649, UNI_SINCE_ZOP, "Compare Double and Swap (64)", cas) +DEFINE_INSTRUCTION(CDS, RS_a_3_ee, 649, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Double and Swap (32)", cas) +DEFINE_INSTRUCTION(CDSG, RSY_a_3_ee, 649, UNI_SINCE_ZOP, "Compare Double and Swap (64)", cas) DEFINE_INSTRUCTION(CDSTR, RRE_2, 1550, UNI_SINCE_Z9, "Convert from Signed Packed (long DFP<-64)") -DEFINE_INSTRUCTION(CDSY, RSY_a_3, 649, UNI_SINCE_YOP, "Compare Double and Swap (32)", cas) +DEFINE_INSTRUCTION(CDSY, RSY_a_3_ee, 649, UNI_SINCE_YOP, "Compare Double and Swap (32)", cas) DEFINE_INSTRUCTION(CDTR, RRE_2, 1544, UNI_SINCE_Z9, "Compare (long DFP)", fp_compare) DEFINE_INSTRUCTION(CDUTR, RRE_2, 1550, UNI_SINCE_Z9, "Convert from Unsigned Packed (long DFP<-64)") DEFINE_INSTRUCTION(CDZT, RSL_b_3, 1551, UNI_SINCE_Z12, "Comvert from Zoned (to long DFP)") @@ -461,12 +481,12 @@ DEFINE_INSTRUCTION(CIB, RIS_4, 641, UNI_SINCE_Z10, "Compare Immediate and Branch DEFINE_INSTRUCTION(CIH, RIL_a_2, 656, UNI_SINCE_Z11, "Compare Immediate High (32)", comparison) DEFINE_INSTRUCTION(CIJ, RIE_c_4, 641, UNI_SINCE_Z10, "Compare Immediate and Branch Relative (32<-8)", branch_argument_nonzero<3,2>) DEFINE_INSTRUCTION(CIT, RIE_a_3, 654, UNI_SINCE_Z10, "Compare Immediate and Trap (32<-16)") -DEFINE_INSTRUCTION(CKSM, RRE_2, 553, UNI_ESA_SINCE_ZOP, "Checksum", second_interruptible) +DEFINE_INSTRUCTION(CKSM, RRE_2_ne, 553, UNI_ESA_SINCE_ZOP, "Checksum", second_interruptible) DEFINE_INSTRUCTION(CL, RX_a_2_ux, 657, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Logical (32)", comparison) DEFINE_INSTRUCTION(CLC, SS_a_2_u, 657, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Logical (character)", comparison) -DEFINE_INSTRUCTION(CLCL, RR_2, 663, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Logical Long", comparison) -DEFINE_INSTRUCTION(CLCLE, RS_a_3, 665, UNI_ESA_SINCE_ZOP, "Compare Logical Long Extended", comparison_interruptible) -DEFINE_INSTRUCTION(CLCLU, RSY_a_3, 668, UNI_SINCE_ZOP, "Compare Logical Long Unicode", comparison_interruptible) +DEFINE_INSTRUCTION(CLCL, RR_2_ee, 663, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Logical Long", comparison) +DEFINE_INSTRUCTION(CLCLE, RS_a_3_ee, 665, UNI_ESA_SINCE_ZOP, "Compare Logical Long Extended", comparison_interruptible) +DEFINE_INSTRUCTION(CLCLU, RSY_a_3_ee, 668, UNI_SINCE_ZOP, "Compare Logical Long Unicode", comparison_interruptible) DEFINE_INSTRUCTION(CLFDBR, RRF_e_4, 1505, UNI_SINCE_Z11, "Convert to Logical (32<-long BFP)", fp_conversion) DEFINE_INSTRUCTION(CLFDTR, RRF_e_4, 1554, UNI_SINCE_Z11, "Convert to Logical (32<-long DFP)", fp_conversion) DEFINE_INSTRUCTION(CLFEBR, RRF_e_4, 1505, UNI_SINCE_Z11, "Convert to Logical (32<-short BFP)", fp_conversion) @@ -519,7 +539,7 @@ DEFINE_INSTRUCTION(CLRT, RRF_c_3, 660, UNI_SINCE_Z10, "Compare Logical and Trap DEFINE_INSTRUCTION(CLST, RRE_2, 671, UNI_ESA_SINCE_ZOP, "Compare Logical String", clst_special) DEFINE_INSTRUCTION(CLT, RSY_b_3_ux, 660, UNI_SINCE_Z12, "Compare Logical and Trap (32)") DEFINE_INSTRUCTION(CLY, RXY_a_2, 657, UNI_SINCE_YOP, "Compare Logical (32)", comparison) -DEFINE_INSTRUCTION(CMPSC, RRE_2, 654, UNI_ESA_SINCE_ZOP, "Compression Call", cmpsc_special, has_parameter_list) +DEFINE_INSTRUCTION(CMPSC, RRE_2_ee, 654, UNI_ESA_SINCE_ZOP, "Compression Call", cmpsc_special, has_parameter_list) DEFINE_INSTRUCTION(CONCS, S_1_u, 0, UNI_370, "Connect Channel Set", old_pop) DEFINE_INSTRUCTION(CP, SS_b_2, 955, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare Decimal", comparison) DEFINE_INSTRUCTION(CPDT, RSL_b_3, 1555, UNI_SINCE_Z13, "Convert to Packed (From Long DFP)", fp_conversion) @@ -528,7 +548,7 @@ DEFINE_INSTRUCTION(CPXT, RSL_b_3, 1555, UNI_SINCE_Z13, "Convert to Packed (From DEFINE_INSTRUCTION(CPYA, RRE_2, 759, UNI_ESA_SINCE_ZOP, "Copy Access") DEFINE_INSTRUCTION(CR, RR_2, 640, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare (32)", comparison) DEFINE_INSTRUCTION(CRB, RRS_4, 640, UNI_SINCE_Z10, "Compare and Branch (32)", branch_argument_nonzero<3,2>) -DEFINE_INSTRUCTION(CRDTE, RRF_b_4_opt, 1034, UNI_SINCE_Z12, "Compare and Replace DAT Table Entry", cas_like_special, privileged) +DEFINE_INSTRUCTION(CRDTE, RRF_b_4_opt_ene, 1034, UNI_SINCE_Z12, "Compare and Replace DAT Table Entry", cas_like_special, privileged) DEFINE_INSTRUCTION(CRJ, RIE_b_4, 640, UNI_SINCE_Z10, "Compare and Branch Relative (32)", branch_argument_nonzero<3,2>) DEFINE_INSTRUCTION(CRL, RIL_b_2, 640, UNI_SINCE_Z10, "Compare Relative Long (32)", comparison) DEFINE_INSTRUCTION(CRT, RRF_c_3, 654, UNI_SINCE_Z10, "Compare and Trap (32)") @@ -536,22 +556,22 @@ DEFINE_INSTRUCTION(CS, RS_a_3, 649, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Compare and S DEFINE_INSTRUCTION(CSCH, S_0, 1261, UNI_ESA_XA_SINCE_ZOP, "Clear Subchannel", clear_subchannel_special, privileged, has_parameter_list) DEFINE_INSTRUCTION(CSDTR, RRF_d_3, 1557, UNI_SINCE_Z9, "Convert to Signed Packed (64<-long DFP)") DEFINE_INSTRUCTION(CSG, RSY_a_3, 649, UNI_SINCE_ZOP, "Compare and Swap (64)", cas) -DEFINE_INSTRUCTION(CSP, RRE_2, 1037, UNI_SINCE_ZOP, "Compare and Swap and Purge (32)", cas_like_special, privileged) -DEFINE_INSTRUCTION(CSPG, RRE_2, 1037, UNI_SINCE_YOP, "Compare and Swap and Purge (64)", cas_like_special, privileged) +DEFINE_INSTRUCTION(CSP, RRE_2_e, 1037, UNI_SINCE_ZOP, "Compare and Swap and Purge (32)", cas_like_special, privileged) +DEFINE_INSTRUCTION(CSPG, RRE_2_e, 1037, UNI_SINCE_YOP, "Compare and Swap and Purge (64)", cas_like_special, privileged) DEFINE_INSTRUCTION(CSST, SSF_3_dr, 651, UNI_SINCE_Z9, "Compare and Swap and Store", cass, has_parameter_list) -DEFINE_INSTRUCTION(CSXTR, RRF_d_3, 1557, UNI_SINCE_Z9, "Convert to Signed Packed (128<-extended DFP)") +DEFINE_INSTRUCTION(CSXTR, RRF_d_3_e, 1557, UNI_SINCE_Z9, "Convert to Signed Packed (128<-extended DFP)") DEFINE_INSTRUCTION(CSY, RSY_a_3, 649, UNI_SINCE_YOP, "Compare and Swap (32)", cas) -DEFINE_INSTRUCTION(CU12, RRF_c_3_opt, 751, UNI_SINCE_YOP, "Convert UTF-8 to UTF-16", unicode_convert_8) -DEFINE_INSTRUCTION(CU14, RRF_c_3_opt, 755, UNI_SINCE_YOP, "Convert UTF-8 to UTF-32", unicode_convert_8) -DEFINE_INSTRUCTION(CU21, RRF_c_3_opt, 741, UNI_SINCE_YOP, "Convert UTF-16 to UTF-8", unicode_convert_16) -DEFINE_INSTRUCTION(CU24, RRF_c_3_opt, 738, UNI_SINCE_YOP, "Convert UTF-16 to UTF-32", unicode_convert_16) -DEFINE_INSTRUCTION(CU41, RRE_2, 748, UNI_SINCE_YOP, "Convert UTF-32 to UTF-8", unicode_convert_32) -DEFINE_INSTRUCTION(CU42, RRE_2, 745, UNI_SINCE_YOP, "Convert UTF-32 to UTF-16", unicode_convert_32) +DEFINE_INSTRUCTION(CU12, RRF_c_3_opt_ee, 751, UNI_SINCE_YOP, "Convert UTF-8 to UTF-16", unicode_convert_8) +DEFINE_INSTRUCTION(CU14, RRF_c_3_opt_ee, 755, UNI_SINCE_YOP, "Convert UTF-8 to UTF-32", unicode_convert_8) +DEFINE_INSTRUCTION(CU21, RRF_c_3_opt_ee, 741, UNI_SINCE_YOP, "Convert UTF-16 to UTF-8", unicode_convert_16) +DEFINE_INSTRUCTION(CU24, RRF_c_3_opt_ee, 738, UNI_SINCE_YOP, "Convert UTF-16 to UTF-32", unicode_convert_16) +DEFINE_INSTRUCTION(CU41, RRE_2_ee, 748, UNI_SINCE_YOP, "Convert UTF-32 to UTF-8", unicode_convert_32) +DEFINE_INSTRUCTION(CU42, RRE_2_ee, 745, UNI_SINCE_YOP, "Convert UTF-32 to UTF-16", unicode_convert_32) DEFINE_INSTRUCTION(CUDTR, RRE_2, 1557, UNI_SINCE_Z9, "Convert to Unsigned Packed (64<-long DFP)") -DEFINE_INSTRUCTION(CUSE, RRE_2, 672, UNI_ESA_SINCE_ZOP, "Compare until Substring Equal", cuse_special, has_parameter_list) -DEFINE_INSTRUCTION(CUTFU, RRF_c_3_opt, 751, UNI_ESA_SINCE_ZOP, "Convert UTF-8 to Unicode", unicode_convert_8) -DEFINE_INSTRUCTION(CUUTF, RRF_c_3_opt, 741, UNI_ESA_SINCE_ZOP, "Convert Unicode to UTF-8", unicode_convert_16) -DEFINE_INSTRUCTION(CUXTR, RRE_2, 1557, UNI_SINCE_Z9, "Convert to Unsigned Packed (128<-extended DFP)") +DEFINE_INSTRUCTION(CUSE, RRE_2_ee, 672, UNI_ESA_SINCE_ZOP, "Compare until Substring Equal", cuse_special, has_parameter_list) +DEFINE_INSTRUCTION(CUTFU, RRF_c_3_opt_ee, 751, UNI_ESA_SINCE_ZOP, "Convert UTF-8 to Unicode", unicode_convert_8) +DEFINE_INSTRUCTION(CUUTF, RRF_c_3_opt_ee, 741, UNI_ESA_SINCE_ZOP, "Convert Unicode to UTF-8", unicode_convert_16) +DEFINE_INSTRUCTION(CUXTR, RRE_2_ne, 1557, UNI_SINCE_Z9, "Convert to Unsigned Packed (128<-extended DFP)") DEFINE_INSTRUCTION(CVB, RX_a_2_ux, 736, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Convert to Binary (32)") DEFINE_INSTRUCTION(CVBG, RXY_a_2, 736, UNI_SINCE_ZOP, "Convert to Binary (64)") DEFINE_INSTRUCTION(CVBY, RXY_a_2, 736, UNI_SINCE_YOP, "Convert to Binary (32)") @@ -574,14 +594,14 @@ DEFINE_INSTRUCTION(CXLGBR, RRF_e_4, 1501, UNI_SINCE_Z11, "Convert from Logical ( DEFINE_INSTRUCTION(CXLGTR, RRF_e_4, 1547, UNI_SINCE_Z11, "Convert from Logical (extended DFP<-64)") DEFINE_INSTRUCTION(CXPT, RSL_b_3, 1548, UNI_SINCE_Z13, "Convert from Packed (To Extended DFP)") DEFINE_INSTRUCTION(CXR, RRE_2, 1464, UNI_ESA_SINCE_ZOP, "Compare (extended HFP)", comparison) -DEFINE_INSTRUCTION(CXSTR, RRE_2, 1550, UNI_SINCE_Z9, "Convert from Signed Packed (extended DFP<-128)") +DEFINE_INSTRUCTION(CXSTR, RRE_2_ne, 1550, UNI_SINCE_Z9, "Convert from Signed Packed (extended DFP<-128)") DEFINE_INSTRUCTION(CXTR, RRE_2, 1544, UNI_SINCE_Z9, "Compare (extended DFP)", fp_compare) -DEFINE_INSTRUCTION(CXUTR, RRE_2, 1550, UNI_SINCE_Z9, "Convert from Unsigned Packed (extended DFP<-128)") +DEFINE_INSTRUCTION(CXUTR, RRE_2_ne, 1550, UNI_SINCE_Z9, "Convert from Unsigned Packed (extended DFP<-128)") DEFINE_INSTRUCTION(CXZT, RSL_b_3, 1551, UNI_SINCE_Z12, "Comvert from Zoned (to extended DFP)") DEFINE_INSTRUCTION(CY, RXY_a_2, 640, UNI_SINCE_YOP, "Compare (32)", comparison) DEFINE_INSTRUCTION(CZDT, RSL_b_3, 1558, UNI_SINCE_Z12, "Comvert to Zoned (from long DFP)", fp_conversion) DEFINE_INSTRUCTION(CZXT, RSL_b_3, 1558, UNI_SINCE_Z12, "Comvert to Zoned (from extended DFP)", fp_conversion) -DEFINE_INSTRUCTION(D, RX_a_2_ux, 759, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (32<-64)") +DEFINE_INSTRUCTION(D, RX_a_2_ux_e, 759, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (32<-64)") DEFINE_INSTRUCTION(DD, RX_a_2_ux, 1466, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (long HFP)") DEFINE_INSTRUCTION(DDB, RXE_2, 1507, UNI_ESA_SINCE_ZOP, "Divide (long BFP)") DEFINE_INSTRUCTION(DDBR, RRE_2, 1507, UNI_ESA_SINCE_ZOP, "Divide (long BFP)") @@ -592,21 +612,21 @@ DEFINE_INSTRUCTION(DE, RX_a_2_ux, 1466, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (s DEFINE_INSTRUCTION(DEB, RXE_2, 1507, UNI_ESA_SINCE_ZOP, "Divide (short BFP)") DEFINE_INSTRUCTION(DEBR, RRE_2, 1507, UNI_ESA_SINCE_ZOP, "Divide (short BFP)") DEFINE_INSTRUCTION(DER, RR_2, 1466, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (short HFP)") -DEFINE_INSTRUCTION(DFLTCC, RRF_a_3, 1751, UNI_SINCE_Z15, "Deflate Conversion Call", dfltcc_special, has_parameter_list) +DEFINE_INSTRUCTION(DFLTCC, RRF_a_3_ee_112, 1751, UNI_SINCE_Z15, "Deflate Conversion Call", dfltcc_special, has_parameter_list) //DEFINE_INSTRUCTION(DIAGNOSE, DIAGNOSE, 1040, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Diagnose", unpredictable, privileged) // undocumented class of instructions DEFINE_INSTRUCTION(DIDBR, RRF_b_4, 1508, UNI_ESA_SINCE_ZOP, "Divide to Integer (long BFP)", fp_integer_div) DEFINE_INSTRUCTION(DIEBR, RRF_b_4, 1508, UNI_ESA_SINCE_ZOP, "Divide to Integer (short BFP)", fp_integer_div) DEFINE_INSTRUCTION(DISCS, S_1_u, 0, UNI_370, "Disconnect Channel Set", old_pop) -DEFINE_INSTRUCTION(DL, RXY_a_2, 760, UNI_ESA_SINCE_ZOP, "Divide Logical (32<-64)") -DEFINE_INSTRUCTION(DLG, RXY_a_2, 760, UNI_SINCE_ZOP, "Divide Logical (64<-128)") -DEFINE_INSTRUCTION(DLGR, RRE_2, 760, UNI_SINCE_ZOP, "Divide Logical (64<-128)") -DEFINE_INSTRUCTION(DLR, RRE_2, 760, UNI_ESA_SINCE_ZOP, "Divide Logical (32<-64)") +DEFINE_INSTRUCTION(DL, RXY_a_2_e, 760, UNI_ESA_SINCE_ZOP, "Divide Logical (32<-64)") +DEFINE_INSTRUCTION(DLG, RXY_a_2_e, 760, UNI_SINCE_ZOP, "Divide Logical (64<-128)") +DEFINE_INSTRUCTION(DLGR, RRE_2_e, 760, UNI_SINCE_ZOP, "Divide Logical (64<-128)") +DEFINE_INSTRUCTION(DLR, RRE_2_e, 760, UNI_ESA_SINCE_ZOP, "Divide Logical (32<-64)") DEFINE_INSTRUCTION(DP, SS_b_2, 955, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide Decimal") -DEFINE_INSTRUCTION(DR, RR_2, 759, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (32<-64)") -DEFINE_INSTRUCTION(DSG, RXY_a_2, 761, UNI_SINCE_ZOP, "Divide Single (64)") -DEFINE_INSTRUCTION(DSGF, RXY_a_2, 761, UNI_SINCE_ZOP, "Divide Single (64<-32)") -DEFINE_INSTRUCTION(DSGFR, RRE_2, 761, UNI_SINCE_ZOP, "Divide Single (64<-32)") -DEFINE_INSTRUCTION(DSGR, RRE_2, 761, UNI_SINCE_ZOP, "Divide Single (64)") +DEFINE_INSTRUCTION(DR, RR_2_e, 759, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Divide (32<-64)") +DEFINE_INSTRUCTION(DSG, RXY_a_2_e, 761, UNI_SINCE_ZOP, "Divide Single (64)") +DEFINE_INSTRUCTION(DSGF, RXY_a_2_e, 761, UNI_SINCE_ZOP, "Divide Single (64<-32)") +DEFINE_INSTRUCTION(DSGFR, RRE_2_e, 761, UNI_SINCE_ZOP, "Divide Single (64<-32)") +DEFINE_INSTRUCTION(DSGR, RRE_2_e, 761, UNI_SINCE_ZOP, "Divide Single (64)") DEFINE_INSTRUCTION(DXBR, RRE_2, 1507, UNI_ESA_SINCE_ZOP, "Divide (extended BFP)") DEFINE_INSTRUCTION(DXR, RRE_2, 1466, UNI_ESA_XA_SINCE_ZOP, "Divide (extended HFP)") DEFINE_INSTRUCTION(DXTR, RRF_a_3, 1559, UNI_SINCE_Z9, "Divide (extended DFP)") @@ -631,7 +651,7 @@ DEFINE_INSTRUCTION(ESAIR, RRE_1, 1041, UNI_SINCE_YOP, "Extract Secondary ASN and DEFINE_INSTRUCTION(ESAR, RRE_1, 1041, UNI_ESA_XA_370_SINCE_ZOP, "Extract Secondary ASN", privileged_conditionally) DEFINE_INSTRUCTION(ESDTR, RRE_2, 1561, UNI_SINCE_Z9, "Extract Significance (64<-long DFP)") DEFINE_INSTRUCTION(ESEA, RRE_1, 1040, UNI_SINCE_ZOP, "Extract and Set Extended Authority", privileged) -DEFINE_INSTRUCTION(ESTA, RRE_2, 1043, UNI_ESA_SINCE_ZOP, "Extract Stacked State", esta_special) +DEFINE_INSTRUCTION(ESTA, RRE_2_e, 1043, UNI_ESA_SINCE_ZOP, "Extract Stacked State", esta_special) DEFINE_INSTRUCTION(ESXTR, RRE_2, 1561, UNI_SINCE_Z9, "Extract Significance (64<-extended DFP)") DEFINE_INSTRUCTION(ETND, RRE_1, 768, UNI_SINCE_Z12, "Extract Transaction Nesting Depth") DEFINE_INSTRUCTION(EX, RX_a_2_ux, 763, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Execute", execute) @@ -647,7 +667,7 @@ DEFINE_INSTRUCTION(FIXBR, RRF_e_3, 1512, UNI_ESA_SINCE_ZOP, "Load FP Integer (ex DEFINE_INSTRUCTION(FIXBRA, RRF_e_4, 1512, UNI_SINCE_Z11, "Load FP Integer (extended BFP)") DEFINE_INSTRUCTION(FIXR, RRE_2, 1469, UNI_ESA_SINCE_ZOP, "Load FP Integer (extended HFP)") DEFINE_INSTRUCTION(FIXTR, RRF_e_4, 1564, UNI_SINCE_Z9, "Load FP Integer (extended DFP)") -DEFINE_INSTRUCTION(FLOGR, RRE_2, 769, UNI_SINCE_Z9, "Find Leftmost One", flogr_special) +DEFINE_INSTRUCTION(FLOGR, RRE_2_e, 769, UNI_SINCE_Z9, "Find Leftmost One", flogr_special) DEFINE_INSTRUCTION(HDR, RR_2, 1467, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Halve (long HFP)") DEFINE_INSTRUCTION(HDV, S_1_u, 0, UNI_370_DOS, "Halt Device", old_pop) DEFINE_INSTRUCTION(HER, RR_2, 1467, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Halve (short HFP)") @@ -677,19 +697,19 @@ DEFINE_INSTRUCTION(ISKE, RRE_2, 1047, UNI_ESA_XA_370_SINCE_ZOP, "Insert Storage DEFINE_INSTRUCTION(IVSK, RRE_2, 1047, UNI_ESA_XA_370_SINCE_ZOP, "Insert Virtual Storage Key", privileged_conditionally) DEFINE_INSTRUCTION(KDB, RXE_2, 1498, UNI_ESA_SINCE_ZOP, "Compare and Signal (long BFP)", fp_compare) DEFINE_INSTRUCTION(KDBR, RRE_2, 1498, UNI_ESA_SINCE_ZOP, "Compare and Signal (long BFP)", fp_compare) -DEFINE_INSTRUCTION(KDSA, RRE_2, 1736, UNI_SINCE_Z15, "Compute Digital Signature Authentication", kdsa_special, has_parameter_list) +DEFINE_INSTRUCTION(KDSA, RRE_2_ne_01, 1736, UNI_SINCE_Z15, "Compute Digital Signature Authentication", kdsa_special, has_parameter_list) DEFINE_INSTRUCTION(KDTR, RRE_2, 1545, UNI_SINCE_Z9, "Compare and Signal (long DFP)", fp_compare) DEFINE_INSTRUCTION(KEB, RXE_2, 1498, UNI_ESA_SINCE_ZOP, "Compare and Signal (short BFP)", fp_compare) DEFINE_INSTRUCTION(KEBR, RRE_2, 1498, UNI_ESA_SINCE_ZOP, "Compare and Signal (short BFP)", fp_compare) -DEFINE_INSTRUCTION(KIMD, RRE_2, 693, UNI_SINCE_YOP, "Compute Intermediate Message Digest", cipher_interruptible, has_parameter_list) -DEFINE_INSTRUCTION(KLMD, RRE_2, 706, UNI_SINCE_YOP, "Compute Last Message Digest", cipher_interruptible, has_parameter_list) -DEFINE_INSTRUCTION(KM, RRE_2, 557, UNI_SINCE_YOP, "Cipher Message", cipher, has_parameter_list) -DEFINE_INSTRUCTION(KMA, RRF_b_3, 582, UNI_SINCE_Z14, "Cipher Message With Authentication", cipher_with_incomplete, has_parameter_list) -DEFINE_INSTRUCTION(KMAC, RRE_2, 725, UNI_SINCE_YOP, "Compute Message Authentication Code", cipher, has_parameter_list) -DEFINE_INSTRUCTION(KMC, RRE_2, 557, UNI_SINCE_YOP, "Cipher Message with Chaining", cipher, has_parameter_list) -DEFINE_INSTRUCTION(KMCTR, RRF_b_3, 612, UNI_SINCE_Z11, "Cipher Message with Counter", cipher, has_parameter_list) -DEFINE_INSTRUCTION(KMF, RRE_2, 596, UNI_SINCE_Z11, "Cipher Message with Cipher Feedback", cipher, has_parameter_list) -DEFINE_INSTRUCTION(KMO, RRE_2, 625, UNI_SINCE_Z11, "Cipher Message with Output Feedback", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KIMD, RRE_2_ne_01, 693, UNI_SINCE_YOP, "Compute Intermediate Message Digest", cipher_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(KLMD, RRE_2_ne_01, 706, UNI_SINCE_YOP, "Compute Last Message Digest", cipher_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(KM, RRE_2_ee_11, 557, UNI_SINCE_YOP, "Cipher Message", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KMA, RRF_b_3_eee_111, 582, UNI_SINCE_Z14, "Cipher Message With Authentication", cipher_with_incomplete, has_parameter_list) +DEFINE_INSTRUCTION(KMAC, RRE_2_ne_01, 725, UNI_SINCE_YOP, "Compute Message Authentication Code", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KMC, RRE_2_ee_11, 557, UNI_SINCE_YOP, "Cipher Message with Chaining", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KMCTR, RRF_b_3_eee_111, 612, UNI_SINCE_Z11, "Cipher Message with Counter", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KMF, RRE_2_ee_11, 596, UNI_SINCE_Z11, "Cipher Message with Cipher Feedback", cipher, has_parameter_list) +DEFINE_INSTRUCTION(KMO, RRE_2_ee_11, 625, UNI_SINCE_Z11, "Cipher Message with Output Feedback", cipher, has_parameter_list) DEFINE_INSTRUCTION(KXBR, RRE_2, 1498, UNI_ESA_SINCE_ZOP, "Compare and Signal (extended BFP)", fp_compare) DEFINE_INSTRUCTION(KXTR, RRE_2, 1545, UNI_SINCE_Z9, "Compare and Signal (extended DFP)", fp_compare) DEFINE_INSTRUCTION(L, RX_a_2_ux, 771, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Load (32)") @@ -832,17 +852,17 @@ DEFINE_INSTRUCTION(LOCHHI, RIE_g_3, 784, UNI_SINCE_Z13, "Load Halfword High Imme DEFINE_INSTRUCTION(LOCHI, RIE_g_3, 784, UNI_SINCE_Z13, "Load Halfword Immediate on Condition (32<-16)") DEFINE_INSTRUCTION(LOCR, RRF_c_3, 791, UNI_SINCE_Z11, "Load on Condition (32)") DEFINE_INSTRUCTION(LPCTL, S_1_u, 0, UNI_SINCE_Z10, "Load Peripheral-Counter-Set Controls", counter_constrols) -DEFINE_INSTRUCTION(LPD, SSF_3_rd, 792, UNI_SINCE_Z11, "Load Pair Disjoint (32)", lpd_special) +DEFINE_INSTRUCTION(LPD, SSF_3_rd_e, 792, UNI_SINCE_Z11, "Load Pair Disjoint (32)", lpd_special) DEFINE_INSTRUCTION(LPDBR, RRE_2, 1515, UNI_ESA_SINCE_ZOP, "Load Positive (long BFP)", fp_positive) DEFINE_INSTRUCTION(LPDFR, RRE_2, 996, UNI_SINCE_Z9, "Load Positive (L)") -DEFINE_INSTRUCTION(LPDG, SSF_3_rd, 792, UNI_SINCE_Z11, "Load Pair Disjoint (64)", lpd_special) +DEFINE_INSTRUCTION(LPDG, SSF_3_rd_e, 792, UNI_SINCE_Z11, "Load Pair Disjoint (64)", lpd_special) DEFINE_INSTRUCTION(LPDR, RR_2, 1470, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Load Positive (long HFP)", load_positive) DEFINE_INSTRUCTION(LPEBR, RRE_2, 1515, UNI_ESA_SINCE_ZOP, "Load Positive (short BFP)", fp_positive) DEFINE_INSTRUCTION(LPER, RR_2, 1470, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Load Positive (short HFP)", load_positive) DEFINE_INSTRUCTION(LPGFR, RRE_2, 793, UNI_SINCE_ZOP, "Load Positive (64<-32)", load_positive) DEFINE_INSTRUCTION(LPGR, RRE_2, 793, UNI_SINCE_ZOP, "Load Positive (64)", load_positive) DEFINE_INSTRUCTION(LPP, S_1_u, 0, UNI_SINCE_Z10, "Load Program Parameter") -DEFINE_INSTRUCTION(LPQ, RXY_a_2, 793, UNI_SINCE_ZOP, "Load Pair from Quadword (64&64<-128)") +DEFINE_INSTRUCTION(LPQ, RXY_a_2_e, 793, UNI_SINCE_ZOP, "Load Pair from Quadword (64&64<-128)") DEFINE_INSTRUCTION(LPR, RR_2, 793, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Load Positive (32)", load_positive) DEFINE_INSTRUCTION(LPSW, SI_1, 1072, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Load PSW", load_psw, privileged, branch_argument_unknown) DEFINE_INSTRUCTION(LPSWE, S_1_u, 1073, UNI_SINCE_ZOP, "Load PSW Extended", load_psw, privileged, branch_argument_unknown) @@ -895,7 +915,7 @@ DEFINE_INSTRUCTION(LZER, RRE_1, 997, UNI_ESA_SINCE_ZOP, "Load Zero (S)") DEFINE_INSTRUCTION(LZRF, RXY_a_2, 778, UNI_SINCE_Z13, "Load and Zero Rightmost Byte (32)") DEFINE_INSTRUCTION(LZRG, RXY_a_2, 778, UNI_SINCE_Z13, "Load and Zero Rightmost Byte (64)") DEFINE_INSTRUCTION(LZXR, RRE_1, 997, UNI_ESA_SINCE_ZOP, "Load Zero (E)") -DEFINE_INSTRUCTION(M, RX_a_2_ux, 811, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply (64<-32)") +DEFINE_INSTRUCTION(M, RX_a_2_ux_e, 811, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply (64<-32)") DEFINE_INSTRUCTION(MAD, RXF_3_x, 1473, UNI_SINCE_YOP, "Multiply and Add (long HFP)") DEFINE_INSTRUCTION(MADB, RXF_3_x, 1518, UNI_ESA_SINCE_ZOP, "Multiply and Add (long BFP)") DEFINE_INSTRUCTION(MADBR, RRD_3, 1518, UNI_ESA_SINCE_ZOP, "Multiply and Add (long BFP)") @@ -927,18 +947,18 @@ DEFINE_INSTRUCTION(MEEB, RXE_2, 1517, UNI_ESA_SINCE_ZOP, "Multiply (short BFP)") DEFINE_INSTRUCTION(MEEBR, RRE_2, 1517, UNI_ESA_SINCE_ZOP, "Multiply (short BFP)") DEFINE_INSTRUCTION(MEER, RRE_2, 1471, UNI_ESA_SINCE_ZOP, "Multiply (short HFP)") DEFINE_INSTRUCTION(MER, RR_2, 1472, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply (long HFP<-short HFP)") -DEFINE_INSTRUCTION(MFY, RXY_a_2, 811, UNI_SINCE_Z10, "Multiply (64<-32)") -DEFINE_INSTRUCTION(MG, RXY_a_2, 811, UNI_SINCE_Z14, "Multiply (128<-64)") +DEFINE_INSTRUCTION(MFY, RXY_a_2_e, 811, UNI_SINCE_Z10, "Multiply (64<-32)") +DEFINE_INSTRUCTION(MG, RXY_a_2_e, 811, UNI_SINCE_Z14, "Multiply (128<-64)") DEFINE_INSTRUCTION(MGH, RXY_a_2, 812, UNI_SINCE_Z14, "Multiply Halfword (64<-16)") DEFINE_INSTRUCTION(MGHI, RI_a_2_s, 813, UNI_SINCE_ZOP, "Multiply Halfword Immediate (64<-16)") -DEFINE_INSTRUCTION(MGRK, RRF_a_3, 811, UNI_SINCE_Z14, "Multiply (128<-64)") +DEFINE_INSTRUCTION(MGRK, RRF_a_3_e, 811, UNI_SINCE_Z14, "Multiply (128<-64)") DEFINE_INSTRUCTION(MH, RX_a_2_ux, 812, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply Halfword (32<-16)") DEFINE_INSTRUCTION(MHI, RI_a_2_s, 813, UNI_ESA_SINCE_ZOP, "Multiply Halfword Immediate (32<-16)") DEFINE_INSTRUCTION(MHY, RXY_a_2, 812, UNI_SINCE_Z10, "Multiply Halfword (64<-16)") -DEFINE_INSTRUCTION(ML, RXY_a_2, 813, UNI_ESA_SINCE_ZOP, "Multiply Logical (64<-32)") -DEFINE_INSTRUCTION(MLG, RXY_a_2, 814, UNI_SINCE_ZOP, "Multiply Logical (128<-64)") -DEFINE_INSTRUCTION(MLGR, RRE_2, 813, UNI_SINCE_ZOP, "Multiply Logical (128<-64)") -DEFINE_INSTRUCTION(MLR, RRE_2, 813, UNI_ESA_SINCE_ZOP, "Multiply Logical (64<-32)") +DEFINE_INSTRUCTION(ML, RXY_a_2_e, 813, UNI_ESA_SINCE_ZOP, "Multiply Logical (64<-32)") +DEFINE_INSTRUCTION(MLG, RXY_a_2_e, 814, UNI_SINCE_ZOP, "Multiply Logical (128<-64)") +DEFINE_INSTRUCTION(MLGR, RRE_2_e, 813, UNI_SINCE_ZOP, "Multiply Logical (128<-64)") +DEFINE_INSTRUCTION(MLR, RRE_2_e, 813, UNI_ESA_SINCE_ZOP, "Multiply Logical (64<-32)") DEFINE_INSTRUCTION(MP, SS_b_2, 960, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply Decimal") DEFINE_INSTRUCTION(MR, RR_2, 811, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Multiply (64<-32)") DEFINE_INSTRUCTION(MS, RX_a_2_ux, 814, UNI_ESA_SINCE_ZOP, "Multiply Single (32)") @@ -962,15 +982,15 @@ DEFINE_INSTRUCTION(MSGR, RRE_2, 814, UNI_SINCE_ZOP, "Multiply Single (64)") DEFINE_INSTRUCTION(MSGRKC, RRF_a_3, 814, UNI_SINCE_Z14, "Multiply Single (64)", arithmetic) DEFINE_INSTRUCTION(MSR, RRE_2, 814, UNI_ESA_SINCE_ZOP, "Multiply Single (32)") DEFINE_INSTRUCTION(MSRKC, RRF_a_3, 814, UNI_SINCE_Z14, "Multiply Single (32)", arithmetic) -DEFINE_INSTRUCTION(MSTA, RRE_1, 1079, UNI_ESA_SINCE_ZOP, "Modify Stacked State") +DEFINE_INSTRUCTION(MSTA, RRE_1_e, 1079, UNI_ESA_SINCE_ZOP, "Modify Stacked State") DEFINE_INSTRUCTION(MSY, RXY_a_2, 814, UNI_SINCE_YOP, "Multiply Single (32)") DEFINE_INSTRUCTION(MVC, SS_a_2_u, 796, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Move (character)") DEFINE_INSTRUCTION(MVCDK, SSE_2, 1085, UNI_ESA_SINCE_ZOP, "Move with Destination Key", privileged_conditionally, has_parameter_list) DEFINE_INSTRUCTION(MVCIN, SS_a_2_u, 796, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Move Inverse") DEFINE_INSTRUCTION(MVCK, SS_d_3, 1086, UNI_ESA_XA_370_SINCE_ZOP, "Move with Key", move_asn, privileged_conditionally) -DEFINE_INSTRUCTION(MVCL, RR_2, 797, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Move Long", mvcl_special) -DEFINE_INSTRUCTION(MVCLE, RS_a_3, 801, UNI_ESA_SINCE_ZOP, "Move Long Extended", mvcle_special) -DEFINE_INSTRUCTION(MVCLU, RSY_a_3, 804, UNI_SINCE_ZOP, "Move Long Unicode", mvcle_special) +DEFINE_INSTRUCTION(MVCL, RR_2_ee, 797, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Move Long", mvcl_special) +DEFINE_INSTRUCTION(MVCLE, RS_a_3_ee, 801, UNI_ESA_SINCE_ZOP, "Move Long Extended", mvcle_special) +DEFINE_INSTRUCTION(MVCLU, RSY_a_3_ee, 804, UNI_SINCE_ZOP, "Move Long Unicode", mvcle_special) DEFINE_INSTRUCTION(MVCOS, SSF_3_dr, 1088, UNI_SINCE_Z9, "Move with Optional Specifications", mvcos_special, privileged_conditionally, has_parameter_list) DEFINE_INSTRUCTION(MVCP, SS_d_3, 1083, UNI_ESA_XA_370_SINCE_ZOP, "Move to Primary", move_asn, privileged_conditionally) DEFINE_INSTRUCTION(MVCRL, SSE_2, 808, UNI_SINCE_Z15, "Move Right To Left", has_parameter_list) @@ -1061,9 +1081,9 @@ DEFINE_INSTRUCTION(PKU, SS_f_2, 823, UNI_SINCE_ZOP, "Pack Unicode") DEFINE_INSTRUCTION(PLO, SS_e_4_br, 844, UNI_ESA_SINCE_ZOP, "Perform Locked Operation", plo_special, has_parameter_list) DEFINE_INSTRUCTION(POPCNT, RRF_c_3_opt, 873, UNI_SINCE_Z11, "Population Count", logical) DEFINE_INSTRUCTION(PPA, RRF_c_3, 859, UNI_SINCE_Z12, "Perform Processor Assist") -DEFINE_INSTRUCTION(PPNO, RRE_2, 859, UNI_SINCE_Z12, "Perform Pseudorandom Number Operation", cipher_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(PPNO, RRE_2_ee_11, 859, UNI_SINCE_Z12, "Perform Pseudorandom Number Operation", cipher_interruptible, has_parameter_list) DEFINE_INSTRUCTION(PR, E_0, 1126, UNI_ESA_SINCE_ZOP, "Program Return", branch_argument_unknown) -DEFINE_INSTRUCTION(PRNO, RRE_2, 859, UNI_SINCE_Z14, "Perform Random Number Operation", cipher_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(PRNO, RRE_2_ee_11, 859, UNI_SINCE_Z14, "Perform Random Number Operation", cipher_interruptible, has_parameter_list) DEFINE_INSTRUCTION(PT, RRE_2, 1130, UNI_ESA_XA_370_SINCE_ZOP, "Program Transfer", privileged_conditionally, branch_argument_unknown) DEFINE_INSTRUCTION(PTF, RRE_1, 1112, UNI_SINCE_Z10, "Perform Topology Function", ptf_special, privileged) DEFINE_INSTRUCTION(PTFF, E_0, 1103, UNI_SINCE_Z9, "Perform Timing-Facility Function", ptff_special, privileged, has_parameter_list) @@ -1144,8 +1164,8 @@ DEFINE_INSTRUCTION(SLB, RXY_a_2, 906, UNI_ESA_SINCE_ZOP, "Subtract Logical with DEFINE_INSTRUCTION(SLBG, RXY_a_2, 906, UNI_SINCE_ZOP, "Subtract Logical with Borrow (64)", subtract_logical_borrow) DEFINE_INSTRUCTION(SLBGR, RRE_2, 906, UNI_SINCE_ZOP, "Subtract Logical with Borrow (64)", subtract_logical_borrow) DEFINE_INSTRUCTION(SLBR, RRE_2, 906, UNI_ESA_SINCE_ZOP, "Subtract Logical with Borrow (32)", subtract_logical_borrow) -DEFINE_INSTRUCTION(SLDA, RS_a_2, 886, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Left Double (64)", arithmetic) -DEFINE_INSTRUCTION(SLDL, RS_a_2, 887, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Left Double Logical (64)") +DEFINE_INSTRUCTION(SLDA, RS_a_2_e, 886, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Left Double (64)", arithmetic) +DEFINE_INSTRUCTION(SLDL, RS_a_2_e, 887, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Left Double Logical (64)") DEFINE_INSTRUCTION(SLDT, RXF_3_x, 1576, UNI_SINCE_Z9, "Shift Significand Left (long DFP)") DEFINE_INSTRUCTION(SLFI, RIL_a_2, 905, UNI_SINCE_Z9, "Subtract Logical Immediate (32)", subtract_logical) DEFINE_INSTRUCTION(SLG, RXY_a_2, 905, UNI_SINCE_ZOP, "Subtract Logical (64)", subtract_logical) @@ -1163,7 +1183,7 @@ DEFINE_INSTRUCTION(SLR, RR_2, 905, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Subtract Logic DEFINE_INSTRUCTION(SLRK, RRF_a_3, 905, UNI_SINCE_Z11, "Subtract Logical (32)", subtract_logical) DEFINE_INSTRUCTION(SLXT, RXF_3_x, 1576, UNI_SINCE_Z9, "Shift Significand Left (extended DFP)") DEFINE_INSTRUCTION(SLY, RXY_a_2, 905, UNI_SINCE_YOP, "Subtract Logical (32)", subtract_logical) -DEFINE_INSTRUCTION(SORTL, RRE_2, 1830, UNI_SINCE_Z15, "Sort Lists", sortl_special, has_parameter_list) +DEFINE_INSTRUCTION(SORTL, RRE_2_ee_11, 1830, UNI_SINCE_Z15, "Sort Lists", sortl_special, has_parameter_list) DEFINE_INSTRUCTION(SP, SS_b_2, 961, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Subtract Decimal", arithmetic) DEFINE_INSTRUCTION(SPCTR, RRE_2, 0, UNI_SINCE_Z10, "Set Peripheral Counter", counter) DEFINE_INSTRUCTION(SPKA, S_1_u, 1150, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Set PSW Key from Address", privileged_conditionally) @@ -1184,8 +1204,8 @@ DEFINE_INSTRUCTION(SR, RR_2, 903, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Subtract (32)", DEFINE_INSTRUCTION(SRA, RS_a_2, 890, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Single (32)", arithmetic_no_overflow) DEFINE_INSTRUCTION(SRAG, RSY_a_3, 890, UNI_SINCE_ZOP, "Shift Right Single (64)", arithmetic_no_overflow) DEFINE_INSTRUCTION(SRAK, RSY_a_3, 890, UNI_SINCE_Z11, "Shift Right Single (32)", arithmetic_no_overflow) -DEFINE_INSTRUCTION(SRDA, RS_a_2, 889, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Double (64)", arithmetic_no_overflow) -DEFINE_INSTRUCTION(SRDL, RS_a_2, 890, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Double Logical (64)") +DEFINE_INSTRUCTION(SRDA, RS_a_2_e, 889, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Double (64)", arithmetic_no_overflow) +DEFINE_INSTRUCTION(SRDL, RS_a_2_e, 890, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Double Logical (64)") DEFINE_INSTRUCTION(SRDT, RXF_3_x, 1576, UNI_SINCE_Z9, "Shift Significand Right (long DFP)") DEFINE_INSTRUCTION(SRK, RRF_a_3, 903, UNI_SINCE_Z11, "Subtract (32)", arithmetic) DEFINE_INSTRUCTION(SRL, RS_a_2, 891, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Shift Right Single Logical (32)") @@ -1250,7 +1270,7 @@ DEFINE_INSTRUCTION(STOC, RSY_b_3_su, 901, UNI_SINCE_Z11, "Store on Condition (32 DEFINE_INSTRUCTION(STOCFH, RSY_b_3_su, 901, UNI_SINCE_Z13, "Store High on Condition (32)") DEFINE_INSTRUCTION(STOCG, RSY_b_3_su, 901, UNI_SINCE_Z11, "Store on Condition (64)") DEFINE_INSTRUCTION(STOSM, SI_2_u, 1191, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Store Then Or System Mask", privileged) -DEFINE_INSTRUCTION(STPQ, RXY_a_2, 902, UNI_SINCE_ZOP, "Store Pair to Quadword (64,64<-128)") +DEFINE_INSTRUCTION(STPQ, RXY_a_2_e, 902, UNI_SINCE_ZOP, "Store Pair to Quadword (64,64<-128)") DEFINE_INSTRUCTION(STPT, S_1_u, 1165, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Store CPU Timer", privileged) DEFINE_INSTRUCTION(STPX, S_1_u, 1165, UNI_ESA_XA_370_SINCE_ZOP, "Store Prefix", privileged) DEFINE_INSTRUCTION(STRAG, SSE_2, 1166, UNI_SINCE_ZOP, "Store Real Address (64)", privileged) @@ -1312,15 +1332,15 @@ DEFINE_INSTRUCTION(TRACE, RS_a_3, 1200, UNI_ESA_XA_SINCE_ZOP, "Trace (32)", priv DEFINE_INSTRUCTION(TRACG, RSY_a_3, 1200, UNI_SINCE_ZOP, "Trace (64)", privileged) DEFINE_INSTRUCTION(TRAP2, E_0, 1202, UNI_ESA_SINCE_ZOP, "Trap") DEFINE_INSTRUCTION(TRAP4, S_1_u, 1202, UNI_ESA_SINCE_ZOP, "Trap") -DEFINE_INSTRUCTION(TRE, RRE_2, 924, UNI_ESA_SINCE_ZOP, "Translate Extended", trt_like_interruptible, has_parameter_list) -DEFINE_INSTRUCTION(TROO, RRF_c_3_opt, 926, UNI_SINCE_ZOP, "Translate One to One", trxx_special, has_parameter_list) -DEFINE_INSTRUCTION(TROT, RRF_c_3_opt, 926, UNI_SINCE_ZOP, "Translate One to Two", trxx_special, has_parameter_list) +DEFINE_INSTRUCTION(TRE, RRE_2_e, 924, UNI_ESA_SINCE_ZOP, "Translate Extended", trt_like_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(TROO, RRF_c_3_opt_e, 926, UNI_SINCE_ZOP, "Translate One to One", trxx_special, has_parameter_list) +DEFINE_INSTRUCTION(TROT, RRF_c_3_opt_e, 926, UNI_SINCE_ZOP, "Translate One to Two", trxx_special, has_parameter_list) DEFINE_INSTRUCTION(TRT, SS_a_2_u, 918, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Translate and Test", trt_like) -DEFINE_INSTRUCTION(TRTE, RRF_c_3_opt, 919, UNI_SINCE_Z10, "Translate and Test Extended", trt_like_interruptible, has_parameter_list) -DEFINE_INSTRUCTION(TRTO, RRF_c_3_opt, 926, UNI_SINCE_ZOP, "Translate Two to One", trxx_special, has_parameter_list) +DEFINE_INSTRUCTION(TRTE, RRF_c_3_opt_e, 919, UNI_SINCE_Z10, "Translate and Test Extended", trt_like_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(TRTO, RRF_c_3_opt_e, 926, UNI_SINCE_ZOP, "Translate Two to One", trxx_special, has_parameter_list) DEFINE_INSTRUCTION(TRTR, SS_a_2_u, 923, UNI_SINCE_YOP, "Translate and Test Reverse", trt_like) -DEFINE_INSTRUCTION(TRTRE, RRF_c_3_opt, 919, UNI_SINCE_Z10, "Translate and Test Reverse Extended", trt_like_interruptible, has_parameter_list) -DEFINE_INSTRUCTION(TRTT, RRF_c_3_opt, 927, UNI_SINCE_ZOP, "Translate Two to Two", trxx_special, has_parameter_list) +DEFINE_INSTRUCTION(TRTRE, RRF_c_3_opt_e, 919, UNI_SINCE_Z10, "Translate and Test Reverse Extended", trt_like_interruptible, has_parameter_list) +DEFINE_INSTRUCTION(TRTT, RRF_c_3_opt_e, 927, UNI_SINCE_ZOP, "Translate Two to Two", trxx_special, has_parameter_list) DEFINE_INSTRUCTION(TS, SI_1, 908, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Test and Set", ts_special) DEFINE_INSTRUCTION(TSCH, S_1_u, 1277, UNI_ESA_XA_SINCE_ZOP, "Test Subchannel", tsch_special, privileged, has_parameter_list) DEFINE_INSTRUCTION(UNPK, SS_b_2, 931, UNI_ESA_XA_370_DOS_SINCE_ZOP, "Unpack") diff --git a/parser_library/src/diagnostic_op.cpp b/parser_library/src/diagnostic_op.cpp index 866064d8d..edf7713bd 100644 --- a/parser_library/src/diagnostic_op.cpp +++ b/parser_library/src/diagnostic_op.cpp @@ -1383,11 +1383,19 @@ diagnostic_op diagnostic_op::error_M114(std::string_view instr_name, const range range); } -diagnostic_op diagnostic_op::error_M120(std::string_view instr_name, const range& range) +diagnostic_op diagnostic_op::error_M120( + std::string_view instr_name, const range& range, std::string_view qual, int min_value) { return diagnostic_op(diagnostic_severity::error, "M120", - concat("Error at ", instr_name, " instruction: register operand absolute value must be between 0 and 15"), + concat("Error at ", + instr_name, + " instruction: register operand absolute value must be ", + qual, + std::string_view(" ", +!qual.empty()), + "between ", + std::to_string(min_value), + " and 15"), range); } diff --git a/parser_library/src/diagnostic_op.h b/parser_library/src/diagnostic_op.h index 0a179dad8..82204d9cc 100644 --- a/parser_library/src/diagnostic_op.h +++ b/parser_library/src/diagnostic_op.h @@ -502,7 +502,8 @@ struct diagnostic_op static diagnostic_op error_M114(std::string_view instr_name, const range& range); - static diagnostic_op error_M120(std::string_view instr_name, const range& range); + static diagnostic_op error_M120( + std::string_view instr_name, const range& range, std::string_view qual = "", int min_value = 0); static diagnostic_op error_M121(std::string_view instr_name, const range& range); diff --git a/parser_library/test/diagnostics_check_test.cpp b/parser_library/test/diagnostics_check_test.cpp index 4bb56d3b2..84364def7 100644 --- a/parser_library/test/diagnostics_check_test.cpp +++ b/parser_library/test/diagnostics_check_test.cpp @@ -76,7 +76,7 @@ TEST(diagnostics, division_by_zero) // test ok L 1,2(2,3/0) - CLCL 10/0,3 + CLCL 10/0,4 )"); diff --git a/parser_library/test/processing/mach_instr_test.cpp b/parser_library/test/processing/mach_instr_test.cpp index b783e7007..2d081e38a 100644 --- a/parser_library/test/processing/mach_instr_test.cpp +++ b/parser_library/test/processing/mach_instr_test.cpp @@ -379,3 +379,29 @@ TEST(mach_instr_processing, check_combined_lookup) EXPECT_EQ(mn, &orig_mn); } } + +TEST(mach_instr_processing, validate_even_odd) + +{ + std::string input = R"( + MVCL 0,3 +)"; + + analyzer a(input); + a.analyze(); + + EXPECT_TRUE(matches_message_codes(a.diags(), { "M120" })); +} + +TEST(mach_instr_processing, validate_minimal) + +{ + std::string input = R"( + SORTL 0,2 +)"; + + analyzer a(input); + a.analyze(); + + EXPECT_TRUE(matches_message_codes(a.diags(), { "M120" })); +}