From c83df7dc5ef32cf246addcec216de00326e36550 Mon Sep 17 00:00:00 2001 From: Vulcain Date: Thu, 19 Sep 2024 14:27:49 +0200 Subject: [PATCH] winch aarch64 cmov: use csel --- .../disas/winch/aarch64/load/dynamic_heap.wat | 44 ++++++++----------- .../winch/aarch64/store/dynamic_heap.wat | 44 ++++++++----------- winch/codegen/src/isa/aarch64/asm.rs | 21 +++++---- winch/codegen/src/isa/aarch64/masm.rs | 5 +-- 4 files changed, 52 insertions(+), 62 deletions(-) diff --git a/tests/disas/winch/aarch64/load/dynamic_heap.wat b/tests/disas/winch/aarch64/load/dynamic_heap.wat index 35bc1b9d52d1..21988c13a2e3 100644 --- a/tests/disas/winch/aarch64/load/dynamic_heap.wat +++ b/tests/disas/winch/aarch64/load/dynamic_heap.wat @@ -34,34 +34,30 @@ ;; ldur x1, [x9, #0x68] ;; mov w2, w0 ;; add x2, x2, #4 -;; b.vs #0x14c +;; b.vs #0x134 ;; 3c: cmp x2, x1, uxtx -;; b.hi #0x150 +;; b.hi #0x138 ;; 44: ldur x3, [x9, #0x60] ;; add x3, x3, x0, uxtx ;; mov x16, #0 ;; mov x4, x16 ;; cmp x2, x1, uxtx -;; b.ls #0x64 -;; b #0x60 -;; 60: mov x3, x4 +;; csel x4, x4, x3, hi ;; ldur w0, [x3] ;; ldur w1, [x28, #0xc] ;; ldur x2, [x9, #0x68] ;; mov w3, w1 ;; add x3, x3, #8 -;; b.vs #0x154 -;; 7c: cmp x3, x2, uxtx -;; b.hi #0x158 -;; 84: ldur x4, [x9, #0x60] +;; b.vs #0x13c +;; 74: cmp x3, x2, uxtx +;; b.hi #0x140 +;; 7c: ldur x4, [x9, #0x60] ;; add x4, x4, x1, uxtx ;; add x4, x4, #4 ;; mov x16, #0 ;; mov x5, x16 ;; cmp x3, x2, uxtx -;; b.ls #0xa8 -;; b #0xa4 -;; a4: mov x4, x5 +;; csel x5, x5, x4, hi ;; ldur w1, [x4] ;; ldur w2, [x28, #0xc] ;; ldur x3, [x9, #0x68] @@ -69,19 +65,17 @@ ;; mov w16, #3 ;; movk w16, #0x10, lsl #16 ;; add x4, x4, x16, uxtx -;; b.vs #0x15c -;; c8: cmp x4, x3, uxtx -;; b.hi #0x160 -;; d0: ldur x5, [x9, #0x60] +;; b.vs #0x144 +;; b8: cmp x4, x3, uxtx +;; b.hi #0x148 +;; c0: ldur x5, [x9, #0x60] ;; add x5, x5, x2, uxtx ;; orr x16, xzr, #0xfffff ;; add x5, x5, x16, uxtx ;; mov x16, #0 ;; mov x6, x16 ;; cmp x4, x3, uxtx -;; b.ls #0xf8 -;; b #0xf4 -;; f4: mov x5, x6 +;; csel x6, x6, x5, hi ;; ldur w2, [x5] ;; sub sp, sp, #4 ;; mov x28, sp @@ -103,9 +97,9 @@ ;; mov x28, sp ;; ldp x29, x30, [sp], #0x10 ;; ret -;; 14c: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 150: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 154: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 158: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 15c: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 160: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 134: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 138: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 13c: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 140: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 144: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 148: .byte 0x1f, 0xc1, 0x00, 0x00 diff --git a/tests/disas/winch/aarch64/store/dynamic_heap.wat b/tests/disas/winch/aarch64/store/dynamic_heap.wat index 2a812d69059e..7e0fe832cd9c 100644 --- a/tests/disas/winch/aarch64/store/dynamic_heap.wat +++ b/tests/disas/winch/aarch64/store/dynamic_heap.wat @@ -37,35 +37,31 @@ ;; ldur x2, [x9, #0x68] ;; mov w3, w1 ;; add x3, x3, #4 -;; b.vs #0x120 +;; b.vs #0x108 ;; 48: cmp x3, x2, uxtx -;; b.hi #0x124 +;; b.hi #0x10c ;; 50: ldur x4, [x9, #0x60] ;; add x4, x4, x1, uxtx ;; mov x16, #0 ;; mov x5, x16 ;; cmp x3, x2, uxtx -;; b.ls #0x70 -;; b #0x6c -;; 6c: mov x4, x5 +;; csel x5, x5, x4, hi ;; stur w0, [x4] ;; ldur w0, [x28, #4] ;; ldur w1, [x28, #0xc] ;; ldur x2, [x9, #0x68] ;; mov w3, w1 ;; add x3, x3, #8 -;; b.vs #0x128 -;; 8c: cmp x3, x2, uxtx -;; b.hi #0x12c -;; 94: ldur x4, [x9, #0x60] +;; b.vs #0x110 +;; 84: cmp x3, x2, uxtx +;; b.hi #0x114 +;; 8c: ldur x4, [x9, #0x60] ;; add x4, x4, x1, uxtx ;; add x4, x4, #4 ;; mov x16, #0 ;; mov x5, x16 ;; cmp x3, x2, uxtx -;; b.ls #0xb8 -;; b #0xb4 -;; b4: mov x4, x5 +;; csel x5, x5, x4, hi ;; stur w0, [x4] ;; ldur w0, [x28] ;; ldur w1, [x28, #0xc] @@ -74,27 +70,25 @@ ;; mov w16, #3 ;; movk w16, #0x10, lsl #16 ;; add x3, x3, x16, uxtx -;; b.vs #0x130 -;; dc: cmp x3, x2, uxtx -;; b.hi #0x134 -;; e4: ldur x4, [x9, #0x60] +;; b.vs #0x118 +;; cc: cmp x3, x2, uxtx +;; b.hi #0x11c +;; d4: ldur x4, [x9, #0x60] ;; add x4, x4, x1, uxtx ;; orr x16, xzr, #0xfffff ;; add x4, x4, x16, uxtx ;; mov x16, #0 ;; mov x5, x16 ;; cmp x3, x2, uxtx -;; b.ls #0x10c -;; b #0x108 -;; 108: mov x4, x5 +;; csel x5, x5, x4, hi ;; stur w0, [x4] ;; add sp, sp, #0x20 ;; mov x28, sp ;; ldp x29, x30, [sp], #0x10 ;; ret -;; 120: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 124: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 128: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 12c: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 130: .byte 0x1f, 0xc1, 0x00, 0x00 -;; 134: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 108: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 10c: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 110: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 114: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 118: .byte 0x1f, 0xc1, 0x00, 0x00 +;; 11c: .byte 0x1f, 0xc1, 0x00, 0x00 diff --git a/winch/codegen/src/isa/aarch64/asm.rs b/winch/codegen/src/isa/aarch64/asm.rs index 10a20a37137e..875eeb22303e 100644 --- a/winch/codegen/src/isa/aarch64/asm.rs +++ b/winch/codegen/src/isa/aarch64/asm.rs @@ -618,15 +618,6 @@ impl Assembler { }); } - /// A conditional branch with resolved destination. - pub fn jmp_if_resolved(&mut self, kind: Cond, taken: i32) { - self.emit(Inst::CondBr { - taken: BranchTarget::ResolvedOffset(taken), - not_taken: BranchTarget::ResolvedOffset(4), - kind: CondBrKind::Cond(kind), - }); - } - /// Emits a jump table sequence. pub fn jmp_table( &mut self, @@ -660,6 +651,18 @@ impl Assembler { }); } + // If the condition is true, Conditional Select writes rm to rd. If the condition is false, + // it writes rn to rd + pub fn csel(&mut self, rm: Reg, rn: Reg, rd: Reg, cond: Cond) { + let writable_rd = Writable::from_reg(rd.into()); + self.emit(Inst::CSel { + rd: writable_rd, + rm: rm.into(), + rn: rn.into(), + cond, + }); + } + // Population Count per byte. pub fn cnt(&mut self, rd: Reg) { self.emit(Inst::VecMisc { diff --git a/winch/codegen/src/isa/aarch64/masm.rs b/winch/codegen/src/isa/aarch64/masm.rs index f83a4795dee7..9071c7052d1f 100644 --- a/winch/codegen/src/isa/aarch64/masm.rs +++ b/winch/codegen/src/isa/aarch64/masm.rs @@ -235,9 +235,8 @@ impl Masm for MacroAssembler { } } - fn cmov(&mut self, src: Reg, dst: Reg, cc: IntCmpKind, size: OperandSize) { - self.asm.jmp_if_resolved(Cond::from(cc).invert(), 12); - self.asm.mov_rr(src, dst, size) + fn cmov(&mut self, src: Reg, dst: Reg, cc: IntCmpKind, _size: OperandSize) { + self.asm.csel(dst, src, src, Cond::from(cc)); } fn add(&mut self, dst: Reg, lhs: Reg, rhs: RegImm, size: OperandSize) {