{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":143147942,"defaultBranch":"master","name":"nextpnr","ownerLogin":"YosysHQ","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2018-08-01T11:39:03.000Z","ownerAvatar":"https://github.com/avatars/u/35169771?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1724234337.0","currentOid":""},"activityList":{"items":[{"before":"32e2d9223c5e554860ad8d98fb02f441a5615a2b","after":"2dc712130cfd6e14f488b410add88d98f1aadc14","ref":"refs/heads/master","pushedAt":"2024-08-21T10:36:23.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"allow LFD2NX devices to be specified with --device (#1353)","shortMessageHtmlLink":"allow LFD2NX devices to be specified with --device (#1353)"}},{"before":"01737a400c1f14315c58d0b11e1e9ae05fac9d49","after":"32e2d9223c5e554860ad8d98fb02f441a5615a2b","ref":"refs/heads/master","pushedAt":"2024-08-21T10:27:59.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Gowin. BUGFIX. Timing\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. BUGFIX. Timing"}},{"before":"968da5dc01342db401d303e35b9ed7214d087442","after":null,"ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-21T09:58:57.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"}},{"before":"fa55e938482cb98102bb724f4c088257b60e7f4e","after":"01737a400c1f14315c58d0b11e1e9ae05fac9d49","ref":"refs/heads/master","pushedAt":"2024-08-21T09:58:55.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Gowin. Add clock wires delays.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Add clock wires delays."}},{"before":"2f03e8864f16a7e1887602ef51a848325f266f5f","after":"474979497bac3e062e754f80fb98b794e7030e80","ref":"refs/heads/micko/himbaechel_gui","pushedAt":"2024-08-20T07:20:16.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"mmicko","name":"Miodrag Milanović","path":"/mmicko","primaryAvatarUrl":"https://github.com/avatars/u/3623496?s=80&v=4"},"commit":{"message":"added bit more wires","shortMessageHtmlLink":"added bit more wires"}},{"before":"e11a1f02159c71ef2e4a86b1e348da6d2127b76b","after":"968da5dc01342db401d303e35b9ed7214d087442","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-20T05:40:23.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Gowin. Add clock wires delays.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Add clock wires delays."}},{"before":"0d5d32951c2f2100e436a4fbaf82d23e645ae4ff","after":"fa55e938482cb98102bb724f4c088257b60e7f4e","ref":"refs/heads/master","pushedAt":"2024-08-19T20:06:45.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Himbaechel xilinx : Fix regex to parse Zynq device names","shortMessageHtmlLink":"Himbaechel xilinx : Fix regex to parse Zynq device names"}},{"before":"f4ea2322e3579a5f13cfe4287b61eb27b69f5b56","after":"e11a1f02159c71ef2e4a86b1e348da6d2127b76b","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-18T19:22:22.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Gowin. Add clock wires delays.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Add clock wires delays."}},{"before":"f199c3e576a3a796697e9e87f44242ae1489d2da","after":"0d5d32951c2f2100e436a4fbaf82d23e645ae4ff","ref":"refs/heads/master","pushedAt":"2024-08-12T15:45:27.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"SDC parsing support (#1348)\n\n* kernel: Add SDC file parser\r\n\r\n* kernel: Add sdc as valid option\r\n\r\n* kernel/sdc: Add error on EOF when fetching strings\r\n\r\n* kernel/sdc: WIP command parsing for set_false_path\r\n\r\n* kernel/sdc: Fully parse set_false_path\r\n\r\n* kernel/sdc: Handle review comments","shortMessageHtmlLink":"SDC parsing support (#1348)"}},{"before":"e9e7dce23d537d4318dfadcf2cd22310b9fdd11a","after":"f199c3e576a3a796697e9e87f44242ae1489d2da","ref":"refs/heads/master","pushedAt":"2024-08-12T14:29:26.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Update shell.nix (#1347)","shortMessageHtmlLink":"Update shell.nix (#1347)"}},{"before":"11d335c7cec7bc62781166926ca43ab645cc2604","after":"e9e7dce23d537d4318dfadcf2cd22310b9fdd11a","ref":"refs/heads/master","pushedAt":"2024-08-03T13:57:22.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Himbaechel Gowin: HCLK Support (#1340)\n\n* Himbaechel Gowin: Add support for CLKDIV and CLKDIV2\r\n\r\n* Himbaechel Gowin: Add support for CLKDIV and CLKDIV2\r\n\r\n* Gowin Himbaechel: HCLK Bug fixes and corrections","shortMessageHtmlLink":"Himbaechel Gowin: HCLK Support (#1340)"}},{"before":"f17caa23795386c02dfdcc00f8ec582a757244b9","after":"11d335c7cec7bc62781166926ca43ab645cc2604","ref":"refs/heads/master","pushedAt":"2024-08-02T12:12:16.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Gowin. Fix GW2A-18(c) DCS and DQCE\n\nWe filter out PIPs from these chips that bypass DCS.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Fix GW2A-18(c) DCS and DQCE"}},{"before":"336c915e3f20b695e52b1b8345b45437d6cd4637","after":"f4ea2322e3579a5f13cfe4287b61eb27b69f5b56","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-02T05:12:38.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"29963f594c1b100d2c2087ee5a81df22d2b6c108","after":"336c915e3f20b695e52b1b8345b45437d6cd4637","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-02T03:29:21.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"2cce43a2d2d768a2afa3798bae74c48754a6c905","after":"29963f594c1b100d2c2087ee5a81df22d2b6c108","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-08-02T03:22:49.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"943a3e7f044722afb9cfaa6cbaa5134bdb67e8e3","after":"2cce43a2d2d768a2afa3798bae74c48754a6c905","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-07-29T10:33:08.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"eb099a9244857219ee33d627540dc5e2316893ae","after":"f17caa23795386c02dfdcc00f8ec582a757244b9","ref":"refs/heads/master","pushedAt":"2024-07-29T10:31:59.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"Gowin. BUGFIX. Fix placement checks\n\nIt was not taken into account that there are only 6 ALUs per cell. As a\nresult, on complex designs where ALUs and LUT-based memory are involved\nand there are many LUTs (like in the RISCV emulator), there were\nsometimes false positives about placement conflicts.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. BUGFIX. Fix placement checks"}},{"before":"020b1d985c454ee005401bdf297a65295cbe280e","after":"943a3e7f044722afb9cfaa6cbaa5134bdb67e8e3","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-07-26T00:52:10.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"10ed8be7c059487066d50328518c7f9533af0c54","after":"020b1d985c454ee005401bdf297a65295cbe280e","ref":"refs/heads/lofty/himbaechel-gowin-timing","pushedAt":"2024-07-26T00:51:52.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"Ravenslofty","name":"Lofty","path":"/Ravenslofty","primaryAvatarUrl":"https://github.com/avatars/u/1503707?s=80&v=4"},"commit":{"message":"himbaechel/gowin: add timing information","shortMessageHtmlLink":"himbaechel/gowin: add timing information"}},{"before":"cecd6b3f4d2ff4a4931647db2337a7adcd144432","after":"eb099a9244857219ee33d627540dc5e2316893ae","ref":"refs/heads/master","pushedAt":"2024-07-09T12:18:35.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Gowin. Bugfix.\n\nThe statement in the Gowin documentation that in the reading mode\n\"READ_MODE=0\" the output register is not used and the OCE signal is\nignored is not confirmed by practice - if the OCE was left unconnected\nor connected to the constant network, then a change in output data was\nobserved even with CE=0, as well as the absence of such at CE=1.\n\nSynchronizing CE and OCE helps and the memory works properly in complex\nsystems such as RISC-V emulation and i8080 emulation (with 32K RAM and\n16K BSRAM based ROM), but there is no theoretical basis for this fix, so\nit is a hack.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Bugfix."}},{"before":"c19c3b159f101d1f3f794a375dab5b19ec86d5b5","after":null,"ref":"refs/heads/mmicko/arch_context","pushedAt":"2024-07-08T14:45:26.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"}},{"before":"7dd4a8c1d546c048b3b755d361820c865add7956","after":"cecd6b3f4d2ff4a4931647db2337a7adcd144432","ref":"refs/heads/master","pushedAt":"2024-07-08T14:45:24.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Document context related calls in HimbaechelAPI","shortMessageHtmlLink":"Document context related calls in HimbaechelAPI"}},{"before":"ba293437e02e01e09936d029d80d78ad601fc4e7","after":"7dd4a8c1d546c048b3b755d361820c865add7956","ref":"refs/heads/master","pushedAt":"2024-07-08T14:44:49.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Gowin. Implement power saving primitive\n\nAs the board on the GW1N-1 chip becomes a rarity, its replacement is the\nTangnano1k board with the GW1NZ-1 chip. This chip has a unique mechanism\nfor turning off power to important things such as OSC, PLL, etc.\n\nHere we introduce a primitive that allows energy saving to be controlled\ndynamically.\n\nWe also bring the names of some functions to uniformity.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Implement power saving primitive"}},{"before":"0639681b7328463e909cbca714ff9095476f186c","after":"ba293437e02e01e09936d029d80d78ad601fc4e7","ref":"refs/heads/master","pushedAt":"2024-07-03T13:09:27.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"ice40: Fix Python bindings for pip iterators","shortMessageHtmlLink":"ice40: Fix Python bindings for pip iterators"}},{"before":"2e8280a9496e010f49d183fdac6a6164bd88798f","after":"0639681b7328463e909cbca714ff9095476f186c","ref":"refs/heads/master","pushedAt":"2024-07-03T13:09:13.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Gowin. Fix BSRAM block selection.\n\nIn the images generated by Gowin IDE, the signals for dynamic BSRAM\nblock selection (BLKSEL[2:0]) are not always connected directly to the\nports - some chips add LUT2, LUT3 or LUT4 to turn these signals into\nClock Enable. Apparently there are chips with an error in the operation\nof these ports.\n\nHere we make such a decoder instead of using ports directly.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Fix BSRAM block selection."}},{"before":"a29a17f8f24158b31a9272d55f48cd46d7db50fa","after":"2e8280a9496e010f49d183fdac6a6164bd88798f","ref":"refs/heads/master","pushedAt":"2024-06-25T09:14:03.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"Gowin. Fix pipeline mode in BSRAM.\n\nIt seems that the internal registers on the BSRAM output pins in\nREAD_MODE=1'b1 (pipeline) mode do not function properly because in the\nimages generated by Gowin IDE an external register is added to each pin,\nand the BSRAM itself switches to READ_MODE=1'b0 (bypass) mode .\n\nThis is observed on Tangnano9k and Tangnano20k boards.\n\nHere we repeat this fix.\n\nSigned-off-by: YRabbit ","shortMessageHtmlLink":"Gowin. Fix pipeline mode in BSRAM."}},{"before":"c89037db49ff0597adc8734f68b04df7abc94d63","after":"a29a17f8f24158b31a9272d55f48cd46d7db50fa","ref":"refs/heads/master","pushedAt":"2024-06-18T11:54:15.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"clangformat\n\nSigned-off-by: gatecat ","shortMessageHtmlLink":"clangformat"}},{"before":"945cf48c6cd1579c541ef1c26ced134ea6393bd9","after":"c89037db49ff0597adc8734f68b04df7abc94d63","ref":"refs/heads/master","pushedAt":"2024-06-18T11:53:45.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"static: Speedup with parallel wirelength gradient computation\n\nSigned-off-by: gatecat ","shortMessageHtmlLink":"static: Speedup with parallel wirelength gradient computation"}},{"before":"61cc5259d9314c1d890365d9394a6e456aecd88f","after":"945cf48c6cd1579c541ef1c26ced134ea6393bd9","ref":"refs/heads/master","pushedAt":"2024-06-18T09:06:15.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"static: Various convergence improvements for ECP5\n\nSigned-off-by: gatecat ","shortMessageHtmlLink":"static: Various convergence improvements for ECP5"}},{"before":"c2d732913ee93dcb7c541865ab13eb0fa6956af6","after":"d729fbf1f25c49648ce48d1249a9dcdfd6e8d06b","ref":"refs/heads/gatecat/static-work","pushedAt":"2024-06-18T07:57:14.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"gatecat","name":"myrtle","path":"/gatecat","primaryAvatarUrl":"https://github.com/avatars/u/78621419?s=80&v=4"},"commit":{"message":"wip\n\nSigned-off-by: gatecat ","shortMessageHtmlLink":"wip"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEoA9WRwA","startCursor":null,"endCursor":null}},"title":"Activity · YosysHQ/nextpnr"}