From 7c39cd6f51d39c27f6255d135aecf415548cef89 Mon Sep 17 00:00:00 2001
From: Alessio Cosenza <cosenzaalessio17@gmail.com>
Date: Wed, 3 Jan 2024 03:02:24 +0100
Subject: [PATCH] Thumb: Correctly handles base in register list for multiple
 load/store This commit fixes thumb tests 230,231,232.

---
 emu/src/cpu/thumb/operations.rs | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/emu/src/cpu/thumb/operations.rs b/emu/src/cpu/thumb/operations.rs
index a0d7da0..0bfb6d3 100644
--- a/emu/src/cpu/thumb/operations.rs
+++ b/emu/src/cpu/thumb/operations.rs
@@ -500,6 +500,8 @@ impl Arm7tdmi {
 
         match load_store {
             LoadStoreKind::Store => {
+                let mut first_written = false;
+
                 for r in 0..=15 {
                     if register_list.is_bit_on(r) {
                         let value = self.registers.register_at(r as usize)
@@ -508,8 +510,17 @@ impl Arm7tdmi {
                                 thumb::operations::SIZE_OF_INSTRUCTION
                             } else {
                                 0
+                            }
+                            // If we store the base register as second register (or later) we store
+                            // the updated value as if it was already written back.
+                            + if first_written && r as usize == base_register {
+                                register_count * 4
+                            } else {
+                                0
                             };
 
+                        first_written = true;
+
                         self.bus.write_word(address as usize, value);
 
                         address += 4;